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1.
针对传统运算放大器共模抑制比和电源抑制比低的问题,设计了一种差分输入结构的折叠式共源共栅放大器。本设计采用两级结构,第一级为差分结构的折叠式共源共栅放大器,并采用MOS管作为电阻,进一步提高增益、共模抑制比和电源电压抑制比;第二级采用以NMOS为负载的共源放大器结构,提高增益和输出摆幅。基于LITE—ON40V1.0μm工艺,采用Spectre对电路进行仿真。仿真结果表明,电路交流增益为125.8dB,相位裕度为62.8°,共模抑制比140.9dB,电源电压抑制比125.5dB。  相似文献   

2.
Despite excellent high frequency and high speed performance, current-feedback operational amplifiers (CFOAs) generally exhibit poor common-mode rejection properties, which limits their utility. In this paper the authors analyse the conventional (CFOA) in terms of common-mode rejection ratio (CMRR) performance, and, having identified the mechanism primarily responsible for the CMRR, they present a modified CFOA input stage circuit design by introducing a combination of a bootstrapping technique and folded cascode transistors. Simulation results of this new CFOA architecture indicate that the amplifier has significantly improved both CMRR and gain accuracy. Other key characteristics are also improved, with the notable exception of slew rate, which is reduced as a consequence of the new topology.  相似文献   

3.
A CMOS realisation of a current operational amplifier operating under 3 V supply voltage is presented. The proposed implementation provides very high common-mode rejection. Results of HSPICE simulation show a high open loop current gain of 67 dB, a gain-bandwidth product of -100 MHz and a common-mode rejection ratio of 150 dB  相似文献   

4.
罗鹏  庞宇 《数字通信》2014,(2):77-80
低噪声高共模抑制比的运算放大器是将套筒式共源共栅结构、差分输出和共模负反馈相结合,设计出的一种新型运算放大器.基于SMIC0.18 μm工艺模型对电路进行设计,仿真结果表明该电路的开环增益为82.3 dB,相位裕度为66°,共模抑制比为122 dB,增益平坦带宽为15 MHz,噪声为7.781 nV/sqrt (Hz),达到设计要求.  相似文献   

5.
The behavior is investigated of a current-feedback opamp exposed to pulsed ionizing radiation sufficiently intense to produce voltage surges in the opamp. For a system using such opamps, the possibilities of maintaining normal operation under the stated conditions are explored.  相似文献   

6.
The current-feedback operational amplifier (CFOA) is a relatively new arrival in the analogue designer's tool kit. The first monolithic device was produced by Elantec Inc. in 1987 and since then it has intrigued and puzzled many. Is it really better than the conventional and well known voltage-feedback operational amplifier (VOA)? How does the CFOA differ in design? What are the applications where it performs better than the VOA and when should the VOA be used in preference to the CFOA? We attempt to give some insight into the design and performance of the CFOA and to answer these questions  相似文献   

7.
A current-mode instrumentation amplifier consists of only two current follower differential input transconductance amplifiers is proposed in this paper. The proposed circuit of instrumentation amplifier is realized without using any passive components. Thus, the proposed circuit structure is very simple and suitable to the integrated circuit technology. The input impedance is low and output impedance is high, therefore the proposed circuit is easily cascadable. The gain of the proposed instrumentation amplifier is electronically controllable. The proposed circuit also enjoys the features of high common mode rejection ratio, wide bandwidth and low power consumption. Additionally, performance of the proposed circuit is tested under process, supply voltage and temperature variations. Furthermore, another circuit of instrumentation amplifier, which is capable of providing higher differential mode gain is also shown. The non-ideal and parasitic studies are included. HSPICE simulations are performed to validate the proposed circuits of instrumentation amplifier.  相似文献   

8.
In order to increase user experience in using near field communication smartcard, analog front-end (AFE) module is required to provide a sufficient and a well-regulated voltage regardless the distance between the card and the reader. A highly stable AFE design for energy harvesting purpose is introduced in this paper. The design consists of antenna, rectifier, voltage limiter, bandgap reference, and low-dropout (LDO) voltage regulator circuit. The antenna is designed to resonate at 13.56 MHz as regulated by ISO/IEC 14443-2. In order to simplify the implementation using 0.18 μm CMOS process, a full-wave rectifier circuit is built of all low-threshold-voltage diode-connected PMOS transistors. To protect the system from undesired excessive input voltages, a voltage limiter circuit is included in the module. Moreover, control and maintain a stable supply voltage for the whole system, a robust LDO voltage regulator and bandgap circuits are specially designed for this purpose. The LDO is able to provide a stable 1.8 V of supply voltage with a sub-1% ripple factor even under a low input current as low as 20 mA.  相似文献   

9.
An operational amplifier configuration implemented as a true micropower high precision op amp is described. It includes a well controlled and predictable DC biasing network that is insensitive to variations in temperature, supply voltages, and process. Also, it permits single supply operation. Excellent DC precision characteristics, comparable to or better than the very best precision op amps currently available, are realized yet at micropower levels. By simply increasing the biasing currents, a version of this design operates in general purpose applications without any degradation in its high precision characteristics. Thus, the AC performance levels of general purpose op amps are attained at a fraction of supply current. This device is fabricated using a standard bipolar IC process; an ion-implanted JFET is added to simplify biasing.  相似文献   

10.
A single-chip (67/spl times/90 mil) integrated-circuit operational amplifier using thin-film resistors and super-gain transistors has been designed to achieve dc follower accuracies of 0.001 percent with 100-k/spl Omega/ source resistance. The circuit achieves gains of 140 dB using thermally balanced layout designs for both input and output stages, nulled drifts of 0.3 /spl mu/V//spl deg/C, and offset currents well under 1 nA. All other dc specifications including power-supply variation error (PSRR), common-mode gain error (CMRR), etc., are in the 1-10 ppm error range; and a procedure is given by which long-term drifts of less than 10 /spl mu/V/month can be assured. AC performance is comparable to general-purpose integrated-circuit operational amplifiers, i.e., f/SUB t/=300 kHz and slew rate of 1.2 V//spl mu/s at gain of ten. The circuit is externally compensated for unity gain with a single 390-pF capacitor and is fully input and output protected.  相似文献   

11.
A highly linear current-feedback (CF) transconductor with resistive source-degeneration is developed in CMOS technology. It consists of a differential source follower cascaded with a classical source-degenerated transconductor with its drain current fed back to modulate the bias of the source follower for nonlinearity cancellation, yielding an overall linear transfer function in the circuit. Designed using a 0.35 /spl mu/m CMOS process for a continuous-time delta-sigma application, the CF transconductor achieves a total harmonic distortion better than -80 dB up to 1 MHz for a 0.8 V input differential voltage while the supply voltage is 2.5 V and the power consumption is 3.4 mW.  相似文献   

12.
In this paper the authors analyze the conventional current-feedback operational amplifier (CFOA) in terms of common-mode-rejection ratio (CMRR) performance, and having identified the mechanism primarily responsible for the CMRR, they propose two new architecture CFOAs. These new CFOAs are further developed, and modified to provide improved bandwidth, AC gain accuracy and high CMRR performance. The key features of the two proposed new CFOAs are the designs of the internal voltage followers which have two separate biasing currents with a similar dynamic architecture to that of the conventional CFOA. The magnitude of one bias current determines the value of the maximum CMRR, and the second can be used to maximize bandwidth.  相似文献   

13.
The objective of this paper is to discuss the advantages and drawbacks of using Trapezoidal Association of Transistors (TAT) in the implementation of a low-power high-CMRR CMOS instrumentation amplifier (IA) aimed for biomedical applications. IAs are well suited for biomedical applications due to its high CMRR. For the sake of comparison, two versions of the circuit were designed, prototyped and characterized. The performance of a version with its current mirrors implemented with TAT, where supposedly higher CMRR could be achievable, is compared to another with single-transistor implementation of current mirrors in order to analyze the CMRR performance. The IA circuit was designed in AMIS 1.5 μm technology and manufactured through the MOSIS Service. In addition to the better performance attained by the classic implementation of the amplifier, with CMRR higher than 120 dB, this version of the IA consumed less than one third of the area from the TAT version. Comparison of both versions from same topology indicates no advantages of using TATs in the current mirrors of this type of IA.  相似文献   

14.
《Electronics letters》2008,44(25):1433-1434
The design of a current-feedback (CF) amplifier for high end power audio applications, up to 200 W RMS, is presented. Measured results prove that the proposed scheme achieves optimal signal-to-noise ratios and total harmonic distortion levels on the entire audible frequency range. Thanks to the CF topology the amplifier also features high bandwidth and high slew-rate.  相似文献   

15.
Rodeanu  E.I. 《Electronics letters》1966,2(10):372-374
High-performance wideband low-frequency discriminators can be realised by the use of feedback. The principle of a discriminator with voltage negative feedback is presented.  相似文献   

16.
设计并实现了一种应用于中枢神经信号重建系统中的跨导放大器.采用前馈结构,有效地减小了输入失调电压,并提高了对共模信号的抑制能力,且电压输入范围允许自正电源电压至负电源电压.输出电流最高可达1mA.电路采用0.6μm CMOS工艺制造,面积0.6mm2.测试得到的电路跨导为0.38mS,输入失调电压为0.57mV,共模抑制比为-54dB,可满足中枢神经信号重建系统的要求.  相似文献   

17.
设计了一种用于高速ADC中的高速高增益的全差分CMOS运算放大器。主运放采用带开关电容共模反馈的折叠式共源共栅结构,利用增益提高和三支路电流基准技术实现一个可用于12~14 bit精度,100 MS/s采样频率的高速流水线(Pipelined)ADC的运放。设计基于SMIC 0.25μm CMOS工艺,在Cadence环境下对电路进行Spectre仿真。仿真结果表明,在2.5 V单电源电压下驱动2 pF负载时,运放的直流增益可达到124 dB,单位增益带宽720 MHz,转换速率高达885 V/μs,达到0.1%的稳定精度的建立时间只需4 ns,共模抑制比153 dB。  相似文献   

18.
Wu  P. Schaumann  R. 《Electronics letters》1991,27(14):1254-1255
A simply fully-differential transconductor is presented that achieves, based on cancellation of first and higher order nonlinearities, +or-0.7% linearity error over a +or-6.4 V differential input range for +or-5 V power supplies. Common-mode input signals are cancelled at the output. The transconductance can be tuned at least by a factor 3 and f/sub (-3dB)/ is 63 MHz for 10 mu m channel length.<>  相似文献   

19.
20.
High performance electronic systems face several challenges in driving innovative integrated circuits when the internal transistors are scaled down below 45 nm. Carbon nanotube field effect transistors (CNFETs) are considered as excellent candidates for building energy-efficient electronic systems in the near future, due to their unique characteristics such as ballistic transport, scalability, and better channel electrostatics. In this paper, a new high performance operational transconductance amplifier (OTA) based on 32 nm CNFET devices is presented. The proposed OTA maintains a highly linear wide continuous tuning range and a wide frequency response range, enabled by splitting the linear voltage-to-current conversion and tuning two different blocks. As an application, a universal second-order transconductance-capacitor (G m  ? C) filter realized using the OTA is introduced. Simulation results show that the CNFET-based OTA offers very a low current consumption of 2.35 μA from a ± 0.9 V power supply, achieves a bandwidth of 9.5 MHz, and has an input dynamic range of ± 0.2 V.  相似文献   

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