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Integrated Circuits of Map Chaos Generators 总被引:1,自引:0,他引:1
Hidetoshi Tanaka Shigeo Sato Koji Nakajima 《Analog Integrated Circuits and Signal Processing》2000,25(3):329-335
A chaotic noise is one of the most important implements for information processing such as neural networks. It has been suggested that chaotic neural networks have high performance ability for information processing. In this paper, we report two designs of a compact chaotic noise generator for large integration circuits using CMOS technology. The chaotic noise is generated using map chaos. We design both of the logistic map type and the tent map type circuits. These chaotic noise generators are compact as compared with the other circuits. The results show that the successful chaotic operations of the circuits because of the positive Lyapunov number. We calculate the Lyapunov exponents to certify the results of the chaotic operations. However, it is hard to estimate its accurate number for noisy data using the conventional method. And hence, we propose the modified calculation of the Lyapunov exponent for noisy data. These two circuits are expected to be utilized for various applications. 相似文献
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基于概念地图的教学模式构建 总被引:1,自引:0,他引:1
概念地图是一种先进的认知工具。本文论述了一种基于概念地图的教学模式,该模式的理论基础是建构主义以及概念同化理论,而其操作程序由绘制预备知识的概念地图、绘制主题知识的概念地图、展示与点评、整理概念地图等四个步骤构成。文章介绍了在模拟电路教学中应用该模式的方法、实例以及结果。实践证明,应用该模式能有效提高教学质量。 相似文献
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卡诺图是组合逻辑电路设计和分析常用和有效的数学工具,既可以化简逻辑函数,也可以分析组合逻辑电路的竞争冒险。对于多输入变量的逻辑函数,要排列其卡诺图则不是易事。格雷码的相邻码之间只有1位不同,这与卡诺图的循环邻接有相同之处,因而可以利用格雷码快速排列多变量卡诺图。首先介绍二进制码转化为格雷码的方法并用C语言编程实现其码制转换,接着叙述用格雷码规律快速排列多变量卡诺图的方法,最后举例说明卡诺图在组合逻辑电路竞争冒险中的应用。 相似文献
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本文将思维导图这一全新的思维工具应用于电路课程教学中,推出了一种基于思维导图的电路高效教学与学习法,并将其融入到现代化多媒体教学中去。实践表明,教师用此方法会使备课轻松,讲授思路清晰,能让学生快速地学会并且记住要点,从而大幅度提高了教学效率和效果,达到了让学生易学、想学和会学的有效教学目的。 相似文献
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论述滚筒式地图位置指示仪控制电路的设计思想,并给出了滚筒式地图位置指示仪的简化数学模型、控制电路和灯阵控制程序。 相似文献
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文章首次提出了一种新的模运算映射用于图像位置置乱的方法,并利用混沌映射系统具有初值敏感性,参数敏感性,遍历性和类随机性的特点,设计了一种基于模运算映射与Logistic混沌映射相结合的图像加密算法,该图像加密方案具有密钥空间巨大.计算时间短的特点。 相似文献
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Hamid Nejati Ahmad Beirami Warsame H. Ali 《Analog Integrated Circuits and Signal Processing》2012,73(1):363-374
In this paper, we introduce a novel discrete chaotic map named zigzag map that demonstrates excellent chaotic behaviors and can be utilized in truly random number generators (TRNGs). We comprehensively investigate the map and explore its critical chaotic characteristics and parameters. We further present two circuit implementations for the zigzag map based on the switched current technique as well as the current-mode affine interpolation of the breakpoints. In practice, implementation variations can deteriorate the quality of the output sequence as a result of variation of the chaotic map parameters. In order to quantify the impact of variations on the map performance, we model the variations using a combination of theoretical analysis and Monte-Carlo simulations on the circuits. We demonstrate that even in the presence of the map variations, a TRNG based on the zigzag map passes all of the NIST 800-22 statistical randomness tests using simple post processing of the output data. 相似文献
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The effect of compensating module faults on the reliability of majority voting based VLSI fault-tolerant circuits is investigated using a fault injection simulation method. This simulation method facilitates consideration of multiple faults in the replicated circuit modules as well as the majority voting circuits to account for the fact that, in VLSI implementations, the majority voting circuits are constructed from components of the same reliability as those used to construct the circuit modules. From the fault injection simulation, a survivability distribution is obtained which, when combined with an area overhead expression, leads to a more accurate reliability model for majority voting based VLSI fault-tolerant circuits. The new model is extended to facilitate the calculation of reliability of fault-tolerant circuits which have sustained faults but continue to operate properly. Analysis of the reliability model indicates that, for some circuits, the reliability obtained with majority voting techniques is significantly greater than predicted by any previous model 相似文献
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分段Logistic混沌映射及其性能分析 总被引:4,自引:0,他引:4
分析了具有逐段线性特性的Tent混沌映射和其推广形式:分段Tent混沌映射在计算机有限精度影响下的性能.在此基础上,根据Logistic混沌映射与Tent混沌映射之间具有的拓扑共轭关系,研究了Logistic混沌映射的推广形式:分段Logistic混沌映射,通过实验分析指出用类似于分段Tent混沌映射的方式来定义分段Logistic混沌映射是不可取的.本文构造了一个全新的分段Logistic混沌映射,通过实验对该映射产生的序列的随机性、初值敏感性等性质进行了研究.结果表明,本文定义的分段Logistic混沌映射产生的序列具有良好的随机性和初值敏感性. 相似文献
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提出了一种基于双重混沌映射系统对商品的生产号进行数字加密的加密算法.在加密的过程中用二维lo-gistic映射和Henon映射联合对商品的生产号进行加密,得到商品的防伪码,并对双重混沌映射的性能进行了分析,利用双重混沌系统的伪随机性、初值敏感性、遍历性等所特有的性质,得出双重混沌映射具有良好的密码学特性,提高了算法的复杂度,增大了算法的密钥空间,增加了破译的难度,使商品在流通的过程中具有更强的防伪性能. 相似文献
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首先对异步时序逻辑电路的特点和分类进行描述,接着从具体的操作步骤、结果的表现方式等方面结合具体实例阐述其一般的分析方法和新出现的分析方法:计算分析法和卡诺图分析法,并对计算分析法进行改进,以期能够更好地指导异步时序电路的分析。通过实例分别阐述3种分析方法,并进行对比,在保证分析结果的前提下,改进的计算分析法分析异步时序逻辑电路时不用考虑时钟信号,使分析变得简单;而卡诺图分析法使分析过程思路清晰,状态转换更加直观化。 相似文献
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n个输入变量的逻辑函数有3n种不同的MPRM(Mixed-Polarity Reed-Muller)表达式,其对应电路的功耗和面积不尽相同。本文通过对CMOS电路功耗和动态逻辑MPRM电路低功耗分解方法的分析,建立MPRM电路功耗和面积估计模型,而后提出一种基于动态逻辑的MPRM电路快速低功耗分解算法。在此基础上,针对中小规模和大规模MPRM电路,结合列表转换技术,分别将穷尽搜索算法和遗传算法应用于基于动态逻辑的MPRM电路低功耗优化设计中。通过对MCNC和ISCAS基准电路测试表明:与Boolean电路和FPRM(Fixed-Polarity Reed-Muller)电路相比,中小规模MPRM电路的功耗平均节省80.65%和50.98%,大规模MRPM电路的功耗平均节省69.17%和46.61%。 相似文献
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