Effect of backgating on the field distribution in planar thin-film GaAs structures

The distribution of the electric field in planar film–substrate GaAs structures under backgating is considered. It is shown that backgating can make the film exhibit a long-length region of a low-gradient electric field exceeding the threshold of N-type negative differential mobility, the magnitude of negative differential mobility in this region being high enough. At values of the film doping density and film thickness typical of GaAs transferred-electron devices, this region can be as long as several tens of micrometers. The underlying physical mechanism is discussed.     

Self quenching of extrinsic photoconductivity in GaAs:Cr

Results of a combination of phototransport measurements (including extrinsic photoconductivity (PC), optical absorption, and photo Hall experiments) are presented to characterize the deep levels introduced by Cr in semi-insulating GaAs. The extrinsic PC shows a spectrum which sharpens rapidly as the temperature is lowered, and is quenched by an additive infrared source. This is explained with the aid of the photo-Hall measurements. The results are interpreted in terms of a simple model of an electron-hole recombination mechanism which is present at low temperature. This recombination causes self-quenching of the PC signal via a drastic reduction of the photogenerated free carriers.     

The use of generalised models to explain the behaviour of ohmic contacts to n-type GaAs

The use of two generalised carrier transport models to account for the N_D⁻¹ dependence of the specific contact resistance (ρ_c) of metal-semiconductor Ohmic contacts to n-type GaAs is proposed. Both models include the effects of thermionic emission and diffusion across the high-low barrier junction a priori. Calculations of ρ_c, and comparison with experimental data, show conclusively that thermionic emission is the dominant transport mechanism across the barrier. It is stressed that these models do not rely on prior choices of either of the transport processes. These conclusions are arrived at a posteriori.     

Interface characteristics of Ge3N4-(n-type) GaAs MIS devices

Passivation of GaAs surfaces was achieved by the deposition of Ge₃N₄ dielectric films at low temperatures. Electrical characteristics of MIS devices were measured to determine the interface parameters. From C-V-f and G-V-f measurements, density of interface states has been obtained as (4–6)×10¹¹ cm⁻² eV⁻¹ at the semiconductor mid-gap. Some inversion charge buildup was seen in the C-V plot although the strong inversion regime is absent. Thermally stimulated current measurements indicate a trap density of 5×10¹⁸−10¹⁹ cm⁻³ in the dielectric film, with their energy level at 0.59 eV.     

Persistent IR photoconductivity in InAs/GaAs structures with QD layers

Persistent IR photoconductivity in InAs/GaAs structures with layers of QDs with a p-and n-type conductivity was studied. At the initial stage, after the illumination is switched off, the relaxation of photoconductivity follows a logarithmic law. The relaxation time depends on temperature; it decreases as temperature increases. A simple model of photoconductivity relaxation, based on thermal activation of carriers from the QD layer, is proposed. The model is consistent with the experimental data.     

Dependence of backgating on the type of deep centres in the substrate of GaAs FETs

The reduction of the conductance of GaAs FETs by a negative voltage applied to the substrate, termed backgating or sidegating, is numerically modelled to clarify which type of traps is responsible. Modelling is carried out for several sets of deep levels in the substrate. It is observed that deep acceptors are mainly responsible for backgating independently of the shallow level type in the substrate. In this case there is no threshold. When deep donors are present in the substrate, it is observed that backgating is reduced and there is a threshold. The presence of a buffer layer between the channel and the semi-insulating substrate also helps in reducing backgating.     

Reduction of backgating effect in MBE-Grown GaAs/AlGaAs HEMT's

We have investigated the backgating effect in high electron mobility transistors (HEMT's) fabricated on MBE-grown GaAs/AlGaAs layers, which is undesirable for LSI fabrication. Comparing five different types of devices, we related the backgating effect to the interface between the GaAs substrate and the undoped GaAs buffer layer. By using a thermally etched GaAs substrate, we successfully reduced the backgating to the same order as that of ion-implanted GaAs MESFET's.     

Electronic properties of n-SnO2/a-SiC:H/Au thin-film structures

Electronic properties of n-SnO₂/i-Si_1−xC_x:H/Au MIM-type devices (with x = 0.5–0.75) have been investigated by means of current-voltage measurements in dark conditions and under illumination. Richardson-Schottky emission is demonstrated to be the main injection mechanism. The large current increase observed under illumination is related to a barrier-lowering effect due to the accumulation of photogenerated holes at the n-SnO₂/i-SiC:H interface, and a simple model is presented which is able to explain the experimental data. At high voltages, current injection is dominated by a bulk emission process, which cancels any photoeffect.     

Compositional inhomogeneity at the epitaxial layer and substrate interface of AlGaAs/GaAs heterostructures

Carrier concentration spikes at the epilayer/substrate interface were observed in some two-dimensional electron gas AIGaAs/GaAs structures grown by low pressure organometallic vapor phase epitaxy. Using secondary ion mass spectroscopy, the carrier spikes were correlated with indium. Under certain growth conditions an anomalous interfacial layer, which is compositionally inhomogeneous, is formed producing an enhanced carrier density. Procedures are described which reduce the presence of indium at the epilayer/substrate interface and eliminate the carrier spike.     

Modeling of backgating effects on GaAs digital integrated circuits

The characteristics of GaAs MESFETs are analyzed and modeled, and the results are used to simulate the performance of GaAs digital integrated circuits in the presence of backgating. The degradation of the output current of a MESFET in a circuit is theoretically calculated by treating the channel-substrate interface as a p-n junction, with the junction bias being linearly proportional to the voltage difference between the source voltage of the MESFET and the negative bias of the integrated circuit. Good agreement is obtained between theoretical calculation and the experimental results. This analysis shows that high-threshold-voltage MESFETs are less sensitive to backgating than low-threshold-voltage devices. The model developed for backgating was incorporated into a SPICE 2 program. SPICE was used to simulate the operation of several ring oscillators with different device characteristics. The computer simulation results agree well with the experimental results. Corrections in circuit design to compensate for the backgating effect have been successfully made, and improvements in the circuit performance have been observed.     

Correlation between the backgating effect of a GaAs MESFET and the compensation mechanism of a semi-insulating substrate

The backgating effect on FET'S fabricated both on a Cr-doped HB and on an undoped LEC substrate is investigated. The deep impurity compensation is found to influence the backgating effect both through the formation of the electric dipole layer at the interface between the n-channel and i-substrate, and through the voltage drop in the semi-insulating substrate.     

Effect of GaAs surface pretreatment on electrical properties of MBE-ZnSe/GaAs substrate interfaces

Interface properties of MBE-grown ZnSe/GaAs substrate systems formed on variously pretreated GaAs surfaces, which include standard chemically etched (5H₂SO₄:1H₂O₂: 1H₂O), (NH₄)₂S_x-, NH₄I-, and HF-pretreated surfaces, are investigated by capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) measurements. A HF-pretreated and annealed ZnSe/p-GaAs sample showed marked reduction of interface state density, N_ss, with N_ss,_min below 4 x 10¹¹cm^-2 eV^-1 near E_c- E_FS= 1.0 eV. The value is about one order of magnitude smaller than that of the standard chemically etched interface, and comparable to (NH₄)₂S_x- pretreated interface. Nevertheless, C-V characteristics of ZnSe/nGaAs samples, which were measured for the first time, indicate that interface Fermi level, E_FS, is not completely unpinned due to the interface states located above the midgap. A consistent result was obtained by DLTS method in determining E_FS position. The influence of N_ss distribution on vertical current conduction is also analyzed. It is found that U-shaped interface states with N_ss(E) > 1 x 10¹³ cm^-2 eV^-1 above the midgap may cause an excess voltage drop larger than a few volts at the interface.     

Reduction of backgating in GaAs/AlGaAs MESFETs by optimisation of active-layer/buffer-layer interface

Backgating measurements made on GaAs MESFETs with abrupt, graded alloy and graded superlattice interface AlGaAs buffer layers were compared to measurements made on conventional GaAs buffer-layer MESFETs. Only the superlattice interface structure showed a reduction in the backgating transconductance (by a factor of 24 compared to the GaAs buffer-layer FET). The lack of reduction in the backgating transconductance for the abrupt and graded alloy interface devices is attributed to traps resulting from GaAs growth on an AlGaAs layer.     

Metal gate-HfO/sub 2/ MOS structures on GaAs substrate with and without Si interlayer

In this letter, we studied the effects of post-deposition anneal (PDA) time and Si interface control layer (ICL) on the electrical characteristics of the MOS capacitor with high-/spl kappa/ (HfO/sub 2/) material on GaAs. Thin equivalent oxide thickness (EOT<3 nm) with excellent capacitance-voltage (C-V) characteristics has been obtained. The thickness of the Si ICL and PDA time were correlated with C-V characteristics. It was found that high temperature Si ICL deposition and longer PDA time at 600/spl deg/C improved the C-V shape, leakage current, and especially frequency dispersion (<5%).     

Long-term photoconductivity decay in n-InGaAs/GaAs heterostructures with coupled quantum wells under band-to-band excitation

The photoconductivity kinetics in n-In _x Ga_{1 ? x} As/GaAs heterostructures with double-coupled quantum wells and δ doping of one of them has been experimentally studied under interband excitation. It is shown that the long-term photoconductivity decay observed in the temperature range from 10 to 70 K is due to the chaotic potential associated with composition fluctuations in quantum-well layers.     

Carrier injection into the substrate of GaAs MESFET structures

The temperature analysis of the excess current, flowing in GaAs MESFET's structures after saturation, indicates that carrier multiplication phenomena must occur within the active layer and the interface to cause the substrate current. This current is proportional to VDSrather than tosqurt{V_{DS}}. The negative temperature gradient of the excess current is ten times higher than that of the saturation current. Noise measurements reveal the onset of avalanche.     

Enhanced spontaneous emission in hydrogen-plasma-passivatedAlGaAs/GaAs vertical-cavity surface-emitting laser structures grown onSi substrate

The effect of hydrogen (H) plasma passivation on a vertical-cavity surface-emitting laser (VCSEL) structure consisting of an active layer of Al_0.3Ga_0.7As/GaAs multi-quantum-well (MQW) grown on an Si substrate is investigated by photoluminescence (PL) measurement. Significant spontaneous emission enhancement is observed at the cavity mode for the H-plasma-passivated sample. This is attributed to the increased MQW PL emission resulting from the incorporation of hydrogen atoms which passivated the electrical activity of the defects-related nonradiative deep centres and increased the minority carrier lifetime     

MBE-grown AlGaAs/GaAs HBTs on InP substrate

AlGaAs/GaAs HBTs are fabricated on InP substrates for the first time. Preliminary results show a current gain of 5 at a collector current density of 2 × 104A/cm2 in spite of a dislocation density higher than 109/cm2.     

Technology of the production of laser diodes based on GaAs/InGaAs/AlGaAs structures grown on a Ge/Si substrate

InGaAs/GaAs/AlGaAs laser diodes with quantum wells are grown by the metal-organic chemical vapor deposition (MOCVD) method on an exact Si (001) substrate with a Ge buffer layer. The diodes generate stimulated emission in the pulsed mode at room temperature in the spectral range from 1.09 to 1.11 μm.     

The effect of backgating on the design and performance of GaAs digital integrated circuits

This paper presents an analysis of the effect of backgating on GaAs digital integrated circuits. Examples of backgating by negatively biased ohmic contacts located at various distances from a single transistor are given. The effect on individual devices within a generalized logic gate is considered and the resulting circuit performance dependence on duty cycle and power supply levels is illustrated. The relative susceptibility of various circuit configurations, including enhancement, and depletion mode technologies is discussed. Finally, mask layout considerations are presented.