基于聚类分析和骨架提取的含裂纹超声红外热像增强方法研究北大核心CSCD

超声红外热图像因噪声干扰及缺陷位置的热扩散,导致其存在对比度差、清晰度低、边缘模糊等问题。为了增强红外图像视觉效果,提高缺陷检测能力,提出了一种基于聚类分析和缺陷骨架的超声红外图像增强方法。采用基于kmeans的DBSCAN聚类算法对裂纹发热区域进行识别聚类,将图像分解为缺陷生热区域与非缺陷区域;然后,对缺陷区域进行骨架描述,并沿裂纹骨架走向采用改进的部分子块重叠直方图均衡算法对缺陷图像进行增强。提出的超声红外图像增强方法与常用的直方均衡化、限制对比度自适应直方图均衡化、自适应同态滤波三种方法进行对比,结果表明所提的增强方法可以得到对比度更显著的图像,具有明显的优势。提出的方法为增强超声红外图像视觉效果、提升裂纹诊断能力提供了一种有效方法。     

Intra-Cell Defects Diagnosis

The diagnosis is the process of isolating possible sources of observed failures in a defective circuit. Today, manufacturing defects appear not only in the cell interconnection, but also inside the cell itself (intra-cell defect). State of the art diagnosis approaches can identify the defect location at gate level (i.e., one or more standard cells and/or inter-connections can be provided as possible defect location). Some approaches have been developed to target the intra-cell defects. In this paper, we propose an intra-cell diagnosis method based on the “Effect-Cause” paradigm aiming at locating the root cause of the observed failures inside a logic cell. It is based on the Critical Path Tracing (CPT) here applied at transistor level. The main characteristic of our approach is that it exploits the analysis of the faulty behavior induced by the actual defect. In other word, we locate the defect by simply analyzing the effect induced by the defect itself. The advantage is the fact that we are defect independent (i.e., we do not have to explicitly consider the type and the size of the defect). Moreover, since the complexity of a single cell in terms of transistor number is low, the proposed intra-cell diagnosis approach requires a negligible computational time. The efficiency of the proposed approach has been evaluated by means of experimental results carried out on both simulations-based and industrial silicon data case studies.     

基于改进VGG网络的单体热电池X光图像无损检测方法研究

为解决单体热电池生产中出现的安装错误、人工检测耗时耗力的问题,提出一个结合迁移学习和卷积 神 经网络(convolutional neural network,CNN) 的单体热电池缺陷检测模型。首先,对数据集图像进行裁剪、加噪等预处理,以VGG16(visual geometry group 16) 网络作为 模型的骨干架构,在瓶颈层后增添选择性核(selective kernel,SK) 卷积;然后,增添全局平均池化(global average pooling,GAP) 层, 增加Dropout层及添加 L2 正则化等微调操作,得到单体热电池缺陷检测模型Q-VGGNet;最后,在大型公开数据集ImageNet上进 行预训练学习,将获得的权重参数迁移到单体热电池图像识别模型Q-VGGNet上。测试实验表明:6种 网络模型对数据集缺陷图像的总体识别准确率分别达到了98.39%、94.44%、97.27%、96.34%、93.71%、 95.61%,Q-VGGNet网 络模型 对合格图像和 漏装负极、极耳断裂、漏装集流片3种缺陷图像 识别准确率 分别达到了99.6%,95.9%,99.6%和98.4%。检测结果表明:该方法能够更准确、快速地检测热电池缺陷, 拥有良好的缺陷诊断能力,较传统方法提高近3%,为人工检测单体热电池缺陷提供了良好的解决途径。     

Vibration analysis for bearing fault detection and classification using an intelligent filter

This paper proposes an intelligent method based on artificial neural networks (ANNs) to detect bearing defects of induction motors. In this method, the vibration signal passes through removing non-bearing fault component (RNFC) filter, designed by neural networks, in order to remove its non-bearing fault components, and then enters the second neural network that uses pattern recognition techniques for fault classification. Four different categories include; healthy, inner race defect, outer race defect, and double holes in outer race are investigated. Compared to the regular fault detection methods that use frequency-domain features, the proposed method is based on analyzing time-domain features which needs less computational effort. Moreover, machine and bearing parameters, and the vibration signal spectrum distribution are not required in this method. It is shown that better results are achieved when the filtered component of the vibration signal is used for fault classification rather than common methods that use directly vibration signal. Experimental results on three-phase induction motor verify the ability of the proposed method in fault diagnosis despite low quality (noisy) of measured vibration signal.     

Three-Stage Optimization of Pre-Bond Diagnosis of TSV Defects

Pre-bond TSV testing and defect identification is important for yield assurance of 3D stacked devices. Building on a recently proposed pre-bond TSV probing procedure, this paper develops a three-stage optimization method named “SOS3” to greatly reduce TSV test time without losing the capability of identifying given number of faulty TSVs. The optimization stages are as follows. First, an integer linear programming (ILP) model generates a near-optimal set of test sessions for pre-bond defective TSV diagnosis. Second, an iterative greedy procedure sequences the application of those test sessions for quicker diagnosis. Third, a TSV defect identification algorithm terminates testing as quickly as possible, often before all sessions are applied. Extensive simulation experiments are done for various TSV networks and the results show that the SOS3 framework greatly speeds up the pre-bond TSV test.     

Defect Tolerance Based on Coding and Series Replication in Transistor-Logic Demultiplexer Circuits

We present a family of defect tolerant transistor-logic demultiplexer circuits that can defend against both stuck-ON (short defect) and stuck-OFF (open defect) transistors. Short defects are handled by having two or more transistors in series in the circuit, controlled by the same signal. Open defects are handled by having two or more parallel branches in the circuit, controlled by the same signals, or more efficiently, by using a transistor-replication method based on coding theory. These circuits are evaluated, in comparison with an unprotected demultiplexer circuit, by: 1) modeling each circuit's ability to tolerate defects and 2) calculating the cost of the defect tolerance as each circuit's redundancy factor R, which is the relative number of transistors required by the circuit. The defect-tolerance model takes the form of a function giving the failure probability of the entire demultiplexer circuit as a function of the defect probabilities of its component transistors, for both defect types. With the advent of defect tolerance as a new design goal for the circuit designer, this new form of performance analysis has become necessary.     

Defect inspection of solder bumps using the scanning acoustic microscopy and fuzzy SVM algorithm

Flip chip technology has been extensively used in high density electronic packaging over the past decades. With the decrease of solder bumps in dimension and pitch, defect inspection of solder bumps becomes more and more challenging. In this paper, an intelligent diagnosis system using the scanning acoustic microscopy (SAM) is investigated, and the fuzzy support vector machine (F-SVM) algorithm is developed for solder bump recognition. In the F-SVM algorithm, we apply a fuzzy membership to input feature data so that the different input features can make different contributions to the learning procedure of the network. It solves the problem of feature data aliasing in the traditional SVM. The SAM image of flip chip is captured by using an ultrasonic transducer of 230 MHz. Then the segmentation of solder bumps is based on the gradient matrix of the original image, and the statistical features corresponding to every solder bump are extracted and adopted to the F-SVM network for solder bump classification and recognition. The experiment results show a high accuracy of solder defect recognition, therefore, the diagnosis system using the F-SVM algorithm is effective and feasible for solder bump defect inspection.     

The application of submicron lithography defect simulation to ICyield improvement

Yield improvement efforts traditionally involve extensive experimental work aimed at diagnosis of defect sources. This paper proposes a methodology for supplementing such experimental work with defect simulation. In particular, it is shown that lithography defect simulation can provide insight into defect mechanisms that cause major distortions in photoresist profiles. The nature of the distorted patterns can assist us in yield improvement efforts, since by comparing simulation results with the observed photoresist profiles on wafers, defect sources may be identified. Several lithography defect diagnosis examples are presented to demonstrate the approach     

基于深度学习的燃气PE管道焊缝缺陷检测

为了解决人工与传统数字图像处理方法进行燃气PE管道焊缝缺陷识别时面临的效率低、漏检率高、评片效果不佳等问题，提出了基于深度学习算法的燃气PE管道焊缝缺陷智能检测方法，实现从输入燃气PE管道焊缝DR检测图像到输出缺陷种类及其测量值的精细化测量。首先，在宏观区域层面采用YOLOv5网络预提取缺陷区域，减少与缺陷相似的非目标区域的干扰，并设计了融合坐标注意力机制(CA)与加权双向特征金字塔网络(BiFPN)的CA-BiFPN模块，以提高对小目标缺陷检测能力，其最终的缺陷识别定位平均精确度为95.1%。然后，在微观边界层面采用语义分割算法Deeplabv3+,实现像素级别的缺陷分割，缺陷分割平均像素准确率为91.25%、平均交并比值为85.52%。最后，在几何特征层面采用最小外接矩形法计算其实际尺寸大小，其平均相对误差为5.47%。结果表明该检测方法可实现燃气PE管缺陷高效率、高精度、智能化检测。     

Smectic Liquid Crystal Defects for Self‐Assembling of Building Blocks and Their Lithographic Applications

Recently, it has been reported that liquid crystal (LC) defects can be used to create highly periodic templates by controlling the surface anchoring and the elastic properties of LC molecules. The self‐assembled defect ordering of the LC materials takes advantage of the ability to achieve fast stabilization of molecular ordering and structure due to the reversible and non‐covalent interactions of the LC molecules. In this Featre Article, the defect structures of liquid crystalline materials will be demonstrated by the surface anchoring and elastic properties. A particular focus are the focal conic domains (FCDs) that are commonly observed in SmA liquid crystals and their lamellar lyotropic counterparts, which form periodic defect ordered structures. In addition, methodologies for creating lithographic templates from the defect order will be described. Finally, the review closes with a discussion of toric focal conic domain arrays that have been fabricated in this manner and used for various applications.     

A neural-network approach to recognize defect spatial pattern insemiconductor fabrication

Yield enhancement in semiconductor fabrication is important. Even though IC yield loss may be attributed to many problems, the existence of defects on the wafer is one of the main causes. When the defects on the wafer form spatial patterns, it is usually a clue for the identification of equipment problems or process variations. This research intends to develop an intelligent system, which will recognize defect spatial patterns to aid in the diagnosis of failure causes. The neural-network architecture named adaptive resonance theory network 1 (ART1) was adopted for this purpose. Actual data obtained from a semiconductor manufacturing company in Taiwan were used in experiments with the proposed system. Comparison between ART1 and another unsupervised neural network, self-organizing map (SOM), was also conducted. The results show that ART1 architecture can recognize the similar defect spatial patterns more easily and correctly     

线路板缺陷的图像检测方法

为提高线路板缺陷的自动检测能力,结合图像处理技术,提出了线路板缺陷的图像检测方法。该方法首先对Gerber文件解析,获取标准线路板图像;其次利用定位孔检测实现标准线路板图像与待检测图像的配准;然后结合形态学滤波,完成线路板缺陷区域定位;最后根据常见缺陷的特征,综合采用面积法、连通域法和缺陷边缘邻域法,实现了常见缺陷类型的自动识别。通过对真实线路板图像仿真缺陷的检测实验,其结果证明了该方法的有效性。     

ATPG scan logic failure analysis: a case study of logic ICs – fault isolation, defect mechanism identification and yield improvement

Yield analysis of sub-micro devices has become an ever-increasing challenge. Scan based design is a powerful concept on complex designs that is routinely employed for fault isolation. To minimize the list of defect candidates according to fault diagnosis, precise failure localization with the help of failure analysis tool is needed as a complement. This example comes from a 0.13-um technology with six layers of copper interconnect. The chip has 18 scan chains with up to 2800 flip flops in each chain. Low Automatic Test Pattern Generation (ATPG) scan chain yield was reported during final scan test. This work presents the case study illustrating the application of scan diagnosis flow as an effective means to achieve yield enhancement.     

C/SiC复合材料的红外热像无损检测研究

采用红外脉冲热像检测方法对C/SiC复合材料试样中不同尺寸和深度的平底孔模拟缺陷进行无损检测,分析了红外脉冲热像检测方法的检测原理、红外脉冲热像检测结果和微分处理后的检测结果。研究结果表明,对于同一缺陷,红外脉冲热像图中显示的缺陷尺寸随时间变化规律近似服从卡方分布,并且在红外热波信号传播至缺陷深度时,显示的缺陷尺寸最大;对红外脉冲热像图进行微分处理,可提高小缺陷和深度缺陷的检测能力,且能够提高缺陷的识别度;红外脉冲热像法检测C/SiC材料,能发现最小直径为Φ2 mm的缺陷,无法发现深度大于4 mm(直径不大于Φ15 mm)的缺陷;该红外脉冲热像法检测C/SiC材料的最小径深比为1.3。     

基于LSDANet的手机芯片屏蔽壳表面缺陷检测方法

为了解决手机芯片屏蔽壳表面白印缺陷微小、尺度各异等因素影响检测快速性和准确性的问题,本文提出一种基于长短连接通路和双注意力网络(long short link and double attention network, LSDANet)的手机芯片屏蔽壳表面缺陷检测方法。首先,通过构建基于编码和解码的语义分割模型和利用长短距离连接通路,提高网络模型对尺度各异缺陷的特征提取能力。其次,分别设计基于通道和空间的注意力机制,增大5—10 pixel尺寸的白印缺陷在空间和通道上的特征权重。最后,融合双注意力机制和长短距离连接通路分割模型,构建LSDANet缺陷检测网络,应用于手机芯片屏蔽壳表面缺陷检测。实验数据表明,LSDANet网络能够达到96.21%的平均像素精度、66.13%的平均交并比和39.03的每秒检测帧数,相比多种语义分割算法均具有更高的检测精度和速度。     

Bio-Multifunctional Hydrogel Patches for Repairing Full-Thickness Abdominal Wall Defects

Developing bio-multifunctional patches with natural extracellular matrix-like structures, excellent high adhesion in the wet state, self-healing ability, antibacterial activity, and favorable cell responses for accelerating tissue healing is highly desirable in clinical applications. Herein, bio-multifunctional composite hydrogels are developed by coupling carboxymethyl chitosan and 4-arm poly (ethylene glycol) aldehyde for full-thickness abdominal wall defect repair. The prepared hydrogels exhibit excellent self-healing and mechanical properties, high adhesion in the wet state, and significant antibacterial ability. In vitro cellular experiments show that the hydrogels combined with recombinant bovine basic fibroblast growth factor remarkably promote cell proliferation and then accelerate full-thickness abdominal wall defect repair in a rat model. The histomorphological evaluation shows that compared to the commercial polypropylene mesh used clinically, the designed hydrogel patches facilitate an increase in the thickness and integrity of the abdominal wall tissue by upregulating the production of Ki67, enhancing the formation of collagen, inducing neovascularization, and inhibiting inflammation by reducing the expression of IL-6, TNF-α, and IL-1β. The results demonstrate that this novel bio-multifunctional hydrogel patch holds great potential for the treatment of full-thickness abdominal wall defects.     

有机发光器件中缺陷态行为表现

对有机发光二极管（OLED）的I-V特性曲线,用有内建电场Ei的修正F-N模型,或陷阱电荷限制电流（TCL）模型进行了模拟分析,均观察到缺陷态对器件特性的影响。对修正F-N模型拟合,Ei不是常数而是随电场变化的,对满足TCL模型的OLED器件,其I-V特性呈现类似于无机半导本器件中的“迟滞回线”状,而且随测试次数的变化呈现可恢复的变化。这些均说明OLED中存在着缺陷态,用缺陷态上电荷填充状态的变化对上述现象进行了解释。     

Back-end soft and hard defect monitoring using a single test chip

The objective of this paper is to present a mixed test structure designed to characterize yield losses due to hard defect and back-end process variation (PV) at die and wafer level. A brief overview of the structure, designed using a ST-Microelectronics’ 130 nm technology, is given. This structure is based on a SRAM memory array for detecting hard defects. Moreover each memory cell can be configured in the Ring Oscillator (RO) mode for back-end PV characterization. The structure is tested in both modes (SRAM, RO) using a single test flow. The test data analysis method is presented and applied to experimental results to confirm the ability of the structure to monitor PV and defect density.     

光学检测系统的优化和评估的新方法

PCB厂商使用自动光学检测仪的目的是为了检测到重要的缺陷,而对于一些特殊设计和装饰性设计则不需要检测。如果要达到这一效果,就必须适当调整系统的检测参数。提供一种衡量AOI侦测性能的新颖方法。此种方法可以尽可能的减少漏测或误报产生的几率,通过考量漏测与误报的各自的成本,客户可据此结果来决定特定的机器的配备。关于自动检测设备选型机制示意图和方法,相关的实用工具及生产领域的简易实施方法也作了说明。     

Using scanning acoustic microscopy and LM-BP algorithm for defect inspection of micro solder bumps

Micro solder bump has been widely used in electronic packaging. Currently a number of flip-chip products are developing towards miniaturization with more I/Os at finer pitch, and defect inspection of the high density package is increasingly challenging. In this paper, the Levenberg-Marquardt back-propagation network (LM-BP) combined with the scanning acoustic microscopy technology was investigated for intelligent diagnosis of solder defect. The flip chips were detected by using a 230 MHz ultrasonic transducer. Solder bumps were segmented from the SAM image. The statistical features were extracted and fed into the LM-BP networks for bump classification. The results demonstrate that LM-BP algorithm reached a high recognition accuracy, and is effective for defect inspection of the micro solder bump.