铁电随机存取存储器技术的发展近况

熊猫电子集团公司 岳云铁电随机存取存储器（FRAM）因为兼有RAM和ROM存储器的性能，自其问世以来便引起了人们的极大关注，并已在各种公用事业用表（如电表、水表、煤气表等）、测量和医疗仪表、非接触式智能卡、门禁系统和汽车黑匣子当中得到了日益广泛的应用。在此背景下，2001年11月，ITRS（InternationalTechnology Roadmap forSemiconductor）首次公布了FeRAM的发展计划（参见表1）。FeRAM的发展方向主要是精细化和低电压化，本文将着重介绍铁电电容器技术以及相关的电路技术方面的一些近期动向。一、铁电电容器技术从产品…     

铁电存储器研究进展

近几年来,铁电存储器研究取得了很大进展.铁电存储器因其所具有的许多优越性和良好的应用前景而受到人们的广泛关注和重视.本文介绍了铁电存储器的工作原理及设计与制作方法.并对其研究现状及进一步发展趋势作了简要的评述.     

铁电存储器的研究进展

介绍了铁电存储器的存储原理,同时对两种铁电存储器(铁电随机存取存储器和铁电场效应晶体管存储器)的研究进展、当前存在的问题以及我国目前在这一领域的研究现状进行了简单介绍,并对今后的技术发展进行了展望。     

铁电存储器制备中关键工艺的改进

传统铁电存储器制备工艺中,存在着Ｐｔ／Ｔｉ下电极刻蚀难、制作的铁电薄 貌不好和上电极容易起壳等问题。文章对铁电存储器制备中的一些关键工艺进行改进,降低了工艺复杂性,解决了上述问题。     

一个改性的用于铁电存储器设计的铁电电容宏模型

从描述铁电电容的P－V滞回特性出发,本文在ZSTT宏模型的基础上提出了一个改进的铁电电容宏模型,并成功利用此模型对铁电存储器（FeRAM)进行了电路优化和电路模拟。最后将试图对此模型做进一步的推广,以模拟铁电存储器在另一种新读写过程中的操作。     

铁电存储器FM1808

铁电存储器是Ramtron公司近年来推出的一款掉电不挥发存储器，它结合了高性能和低功耗的操作，能在没有电源的情况下保存数据。FRAM克服了EEPROM和Flash写入时间长、擦写次数少的缺点。其价格又比相同容量的不挥发锂电SRAM低很多。已在工控仪表、办公复印机、高档服务器等系统中应用，具有广阔的应用前景。     

基于HSIM的铁电电容性能的研究

基于对铁电电容实际测试性能及物理模型的分析,在仿真软件HSIM原始电容模型库的基础上,通过对实验室制备的铁电电容电滞回线的拟合,得出新的模型库参数。将这些参数导入HSIM中对铁电存储器(FRAM)进行仿真,根据仿真结果对比铁电电容的性能,并由此优化铁电电容的性能,使之更匹配于电路特性。     

Calamitic Blatter Radicals for Large-Area Solution-Coated Resistive Memories

Radical molecules exhibit fast redox kinetics, are widely explored for data processing and energy storage. However, the insulating aliphatic matrix isolates the radical units, thus resulting in a weak charge transporting ability. Herein, calamitic Blatter radicals (CBR) with highly conductive [1]benzothieno[3,2-b]benzothiophene (BTBT) as the conjugated backbone are designed and synthesized. It is found that bistable redox character associated with large conjugated backbone allows these Blatter radical derivatives to be switched with ON/OFF ratio reaching 10⁶ and retention time exceeding 10⁴ s in solution processed devices. In addition, these radicals are unveiled to perform tunable, multi-mode field-responsive resistance behaviors, including write-once-read-many (WORM), FLASH, and dynamic random access memory (DRAM), by molecular engineering strategy. This finding provides fundamental understanding for charge transferring dynamics and redox-switching mechanism of radical molecules with respect to electronic applications.     

Minimal March Tests for Detection of Dynamic Faults in Random Access Memories

The class of dynamic faults has been recently shown to be an important class of faults for the new technologies of Random Access Memories (RAM) with significant impact on defect-per-million (DPM) levels. Very little research has been done in the design of memory test algorithms targeting dynamic faults. Two March test algorithms of complexity 11N and 22N, N is the number of memory cells, for subclasses of two-operation single-cell and two-cell dynamic faults, respectively, were proposed recently [Benso et al., Proc., ITC 2005] improving the length of the corresponding tests proposed earlier [Hamdioui et al., Proc. of IEEE VLSI Test Symposium, pp. 395–400, 2002]. Also, a March test of length 100N was proposed [Benso et al., Proc. ETS 2005, Tallinn, pp. 122–127, 2005] for detection of two-cell dynamic faults with two fault-sensitizing operations both applied on the victim or aggressor cells. In this paper, for the first time, March test algorithms of minimum length are proposed for two-operation single-cell and two-cell dynamic faults. In particular, the previously known March test algorithm of length 100N for detection of two-operation two-cell dynamic faults is improved by 30N.

Ternary-Responsive Field-Effect Transistors and Multilevel Memories Based on Asymmetrically Functionalized Janus Few-Layer WSe2

Hybrids composed of 2D transition metal dichalcogenides with stimuli-responsive molecules are prototypical components for the development of multifunctional field-effect transistors (FETs), whose output currents can be remotely controlled by external inputs. Herein, ternary-responsive FETs based on a few-layer WSe₂ are realized by decorating the two opposite surfaces of the 2D semiconductor with different stimuli-responsive molecules in an asymmetric fashion: the bottom surface is interfaced with a photochromic diarylethene film and the top surface with a ferroelectric poly(vinylidene fluoride–trifluoroethylene) layer. This novel Janus ternary device architecture shows superior functional complexity compared with normal mono-stimuli-responsive FETs. The synergy between the two molecularly induced effects enables the devices to respond orthogonally to an electric field and light irradiation, with an enhanced output current modulation efficiency of 87%. The 9 ferroelectric and 84 photo-generated states ensure 756 current levels in a single device. The over 10 cycles of cyclic endurance and more than 1000 h of retention time confirm the reliability of each state, implementing the demand for high-density non-volatile memories, as well as enriching the diversification in “More than Moore” technologies.     

新模糊形态学联想记忆网络的初步研究

人工神经网络理论已经被成功地应用于各种不同的模式识别问题.重点研究了联想记忆网络,提出了一种新的基于形态学和模糊运算的联想记忆网络,即模糊形态学联想记忆网络FMAM.它与经典联想记忆和模糊联想记忆FAM有显著不同.文中分析了FMAM的记忆能力和抗腐蚀/膨胀噪声的能力.自联想FMAM具有无限存储能力,能保证完全回忆,并且回忆在一步内完成,可模糊性解释等.仿真实验验证了自联想FMAM的良好性能.     

Highly Enhanced Polarization Switching Speed in HfO2-based Ferroelectric Thin Films via a Composition Gradient Strategy

The next-generation semiconductor memories are essentially required for the advancements in modern electronic devices. Ferroelectric memories by HfO₂-based ferroelectric thin films (FE-HfO₂) have opened promising directions in recent years. Nevertheless, improving the polarization switching speed of FE-HfO₂ remains a critical task. In this study, it is demonstrated that the composition-graded Hf_1-xZr_xO₂ (HZO) ferroelectric thin film has more than two times faster polarization switching speed than the conventional composition-uniform one. Meanwhile, it has excellent ferroelectricity and improved endurance characteristics. It is also discovered that when the HZO thin film has a gradient composition, the polarization-switching dynamics shifts from the nucleation-limited-switching mechanism to the domain-wall growth mechanism. Moreover, the transition of switching dynamics is responsible for the faster speed and better endurance of the composition-graded HZO thin film. These findings not only reveal the physical mechanisms of this material system but also provide a new strategy for memory devices having faster speed and higher endurance.     

Electric Field Gradient-Controlled Domain Switching for Size Effect-Resistant Multilevel Operations in HfO2-Based Ferroelectric Field-Effect Transistor

The ferroelectric field-effect transistor (FeFET) is a promising memory technology due to its high switching speed, low power consumption, and high capacity. Since the recent discovery of ferroelectricity in Si-doped HfO₂ thin films, HfO₂-based materials have received considerable interest for the development of FeFET, particularly considering their excellent complementary metal-oxide-semiconductor (CMOS) compatibility, relatively low permittivity, and high coercive field. However, the multilevel capability is limited by the device size, and multidomain switching tends to vanish when the channel length of the HfO₂-based FeFET approaches 30 nm. Here, multiple nonvolatile memory states are realized by tuning the electric field gradient across the Hf_0.5Zr_0.5O₂ (HZO) ferroelectric thin film along the channel direction of FeFET. The multi-step domain switching can be readily and directionally controlled in the HZO-FeFETs, with a very low variation. Moreover, multiple nonvolatile memory states or multi-step domain switching can be effectively controlled in the FeFETs with a channel length less than 20 nm. This study suggests the possibility to implement multilevel memory operations and mimic biological synapse functions in highly scaled HfO₂-based FeFETs.     

模糊双向联想记忆网络的收敛性

 本文讨论模型双向联想记忆(fuzzy bidirectional associative memories(FBAMs))网络的收敛性.对任意FBAM(n,m)网络,给出了网络收敛的充分必要条件和极限环长度的上界,证明了网络由任意初态激发都一定在(n-1)²+2步内到达某个极限环;对由max-min学习规则确定的FBAM(n,m)网络,证明了网络由任意初态激发其状态序列都是单调减的,且一定在n+1步内收敛.     

A Bist Scheme for Non-Volatile Memories

A new BIST scheme for on-chip testing of non-volatile memories and based on signature analysis is presented. The signature of the whole memory, whose content can be changed selectively by the user, is dynamically self-learned by the memory and it is saved in a dedicated memory location. Either such a signature can be externally compared with the expected one in order to check for the programming operation, or it can be used for comparison purposes when data retention must be self-tested.