毫米波硅基SiP模块设计

设计了一款采用硅基板作为载体的毫米波上变频微系统系统级封装(System in Package, SiP)模块。该模块利用类同轴硅通孔(Through-Silicon-Via, TSV)结构解决了毫米波频段信号在转接板层间低损耗垂直传输的问题。该结构整体采用四层硅基板封装,并在封装完成后对硅基射频SiP模块进行了测试。测试结果显示,在工作频段29～31 GHz之间,其增益大于27 dB,端口驻波小于1.4,且带外杂散抑制大于55 dB。该毫米波硅基SiP模块具有结构简单、集成度高、射频性能良好等优点,其体积不到传统二维集成结构的5%,实现了毫米波频段模块的微系统化,可广泛运用于射频微系统。     

递进型射频SiP系统优化法研究

射频系统级封装系统具有高密度集成、高性能的优点,但其电磁问题复杂导致系统优化方法至关重要。基于板级场路协同仿真、近场等效模拟以及近场扫描测试,提出了递进型射频SiP系统优化方法,并以S波段上变频SiP模块的优化为例,进行了验证分析。利用此方法,准确地找到了系统中潜在的风险,建立近场耦合等效集总电路,提出改进措施,实现了系统的高效优化;并采用近场扫描测试方法,对模拟结果进行了比较,计算出两者的相关度为96.27%,吻合较好,证明了模拟仿真优化法的高可靠性与实用性。     

系统集成封装技术

系统集成封装技术(SiP:System in Package)是近几年来为适应模块化开发系统硬件的需求而出现的封装技术,在已经开始的新一轮封装技术发展中将发挥重要作用.SiP利用已有的电子封装和组装工艺,组合多种集成电路芯片与无源器件,封闭模块内部细节,降低系统开发难度,具有成本低、开发周期短、系统性能优良等特点,目前已经在通信系统的物理层硬件中得到广泛应用.     

面向SiP封装的层压板与LTCC板射频模块设计

随着移动无线设备面临更大的缩小体积的压力,人们开始采用系统级封装(SiP)来解决这一难题.不过,前端的射频电路通常需要首先集成在一块基板上,形成一个模块,然后再嵌入SiP中,才能保证射频电路的完整性以及与其它电路的隔离.这种射频模块通常有现成的产品可以使用,但有时为了满足特定要求,还要寻求专业厂商的定制设计.     

基于近场扫描的屏蔽效能分析

为了定量研究共型屏蔽对系统级封装(SiP)近场辐射的影响,基于课题组的近场扫描平台,对近场测试过程中超小型连接器(SMA)对测试的影响进行分析,提出将SMA与SiP分别设置在印制电路板(PCB)两侧的设计方案,有效地抑制了SMA处场泄漏对SiP辐射测试的影响。发现不同屏蔽效能定义方式所得的屏蔽效能结果有一定差异,并给出不同屏蔽效能评估方式的优劣。最后,通过仿真验证了缝隙泄漏是高频屏蔽效能恶化的主要原因。     

实施系统封装方案以提高系统整体功能和性能

系统集成是实现电子产品高性能,小型化和低成本目标的重要手段。与同芯片上的系统集成(SoC)相比,封装层次上的系统集成(SiP)的开发具有成本低、周期短和灵活性高等优势。本文以典型的无线电子系统为例,提出了有效的系统分割设计方法,介绍了一些用于子系统模块封装的方法,并强调了系统公司与封装、基板及其它主被动元件供应商之间协调合作对成功的模块式电子系统开发的重要性。     

一种用于胎压传感器的新型系统级封装技术

TPMS IC是TPMS系统模块的关键核心器件,需要采用系统级封装(SiP)技术。对TPMS IC的一种新型SiP封装技术作了研究分析。在引线框架上引入电路板中介层,改善了芯片间电气互连与分布,增大了引入薄膜电阻电容元件的设计弹性。采用预成型模制部分芯片的封装技术,满足了IC与MEMS芯片不同的封装要求,还增强了SiP产品的可测试性和故障可分析性。采用敞口模封、灌装低应力弹性凝胶和传感器校准测试相结合的方法有效避免封装应力对MEMS压力传感器的影响。     

系统级封装(SiP)模块的热阻应用研究

半导体行业正朝着高集成度、小尺寸方向飞速发展,具有大规模、多芯片、3D立体化封装等优势的系统级封装(SiP)受到越来越多的关注.SiP中IC芯片多且集中,功耗密度大,因此其散热特性研究尤为重要.封装模块的散热特性用热阻表征,以塑封SiP模块为研究对象,介绍了器件级结-壳热阻和板级结-板热阻分析方法,采用热阻矩阵描述了芯...     

基于SiP技术的多片DDR3高速动态存储器设计

基于系统级封装(System in Package,SiP)技术,结合自研自主可控DSP处理器“魂芯”II-A和多片DDR3颗粒,详细介绍了一款高速动态存储控制一体化SiP设备的设计方案和仿真验证分析结果。重点介绍了此款SiP的电路拓扑设计、版图设计,并从拓扑结构波形仿真、DDR3时序裕量计算、与板级实现方案对比三方面对其PCB后仿进行了分析和验证,仿真结果符合规范要求,证明了所采用的Fly-By拓扑适用于CPU与多片DDR3颗粒所组成的一体化SiP设备,且SiP设备性能优于板级实现方案。     

超高速光互连系统级封装技术前沿研究

光互连系统级封装技术是用光互连在封装尺度上代替铜互连,以突破目前芯片间通信低速度瓶颈。超高速光互连系统级封装的目标是开发出可集成光子收发器,并嵌入到现代尖端的系统级封装中(SiP)中,以提高并行计算系统的数据传输效率或速度。文章介绍了超高速光互连系统级封装关键技术及前沿研究情况,通过分析IMEC、Intel、BAE系统公司等研究机构的开发现状和技术发展路线,论述了光互连SiP关键技术的发展趋势。     

系统模块(SiP)和三维封装(3D)在移动通讯中的应用

电子封装业界正遭受着前所未有的来自手机和其他移动通讯终端设备挑战。在这一领域里,IC封装的关键是尺寸微型化,缩减成本和市场时机。这一挑战的背后隐含着手机技术发展的两大趋势:系统模块化和日益增长的复杂性及功能。越来越多的功能正在被组合到手机上即PDA、MP3、照相机、互联网等等。功能的增加需要靠模块化来实现,而模块化又促进了更多功能的组合。同时,模块化使得移动通讯终端设备得以微型化、降低成本和缩短设计周期。业界越来越多地感受到整体射频模块和通讯模块解决方案的必要性。这些整体模块把手机设计师从电路设计的细节中解脱出来,从而能专著于高层的手机应用和系统的设计。为了满足上诉移动通讯产品的苛刻要求,大量的新兴电子封装技术和封装产品应运而生。最引人注目的例子在于对系统模块穴SiP雪和三维穴3D雪封装的重点资金和技术投入。这两项先进封装技术有着各自不同的特征和应用范围。总体介绍先进封装技术在移动通讯中的应用,重点讨论电子封装材料和工艺所面临的挑战和最新发展趋势。对移动通讯带来的新一轮集成化及其所产生的潜在供应链问题也做了适当的讨论。     

Single-package integration of RF blocks for a 5 GHz WLANapplication

Transceivers for future digital telecommunications applications (third generation cellular, wireless LAN) need to be portable (compact), battery-powered and wireless. Today's single-chip solutions for RF front-ends do not yield complete system integration. For example, they typically still need external components for impedance matching, for antenna switches, for power amplifiers and for RF bandpass filters (BPFs). Furthermore, problems of substrate coupling (either manifesting as analog crosstalk or as noise coupling from the digital part to the analog part on mixed-signal chip) become more important with increasing integration. A system-in-a-package (SiP) approach can address these problems. High quality components can be integrated in the package, avoiding lower quality on-chip passives or circumventing expensive chip technology adaptations. Virtually all external components can be integrated, as shown in this paper for the case of the bandpass filters and the impedance matching. Even the antenna is a candidate for integration in the package. Further, a clever chip partitioning can reduce the substrate coupling problem. Partitioning also allows using the best IC-technoiogy for each component. This paper reports on a fully integrated single-package RF prototype module for a 5 GHz WLAN receiver front-end, which is intended to demonstrate the concept of SiP integration. The approach, that is illustrated here with prototype RF blocks for a 5 GHz WLAN application, is implemented with a thin film multichip module (MCM-D) interconnect technology. This technology also allows the integration of high quality passive components. With these passives, low-loss filters can be implemented. The use of passives, filters and off-the-shelf, active, bare die components opens the way to successful system integration     

射频系统的系统级封装

论述了高速数据处理和高密度封装技术的特点及对射频系统封装的特殊要求,介绍了射频系统封装的基本技术和一种包含LNA、PPA、滤波器及天线开关的射频系统级封装模块.概述了射频系统级封装的设计、仿真和测试的方法和步骤.     

基于IFM的小型化线性射频放大器设计

采用六级VMMK-2503高线性度增益方块级联,插入增益均衡与带通滤波模块,设计了一款小型化线性射频放大器,在5.8～8 GHz频带内,其小信号增益达70 dB,增益平坦度小于±1 dB,输入输出驻波比等技术指标优良。由于VMMK-2503采用晶片级封装技术与内匹配设计,电路设计简单,缩短了研发周期,降低了设计成本,提高了技术指标,有利于射频电路的小型化与集成化,放大器电路尺寸仅为92 mm×9 mm×1.2 mm。并对其进行了模块电磁兼容设计,以提高组件稳定性,最终满足用户要求,已成功用于某型号瞬时测频接收机中。     

一种应用于12 GHz的AlN多层陶瓷外壳

以AlN材料为陶瓷基材,采用陶瓷绝缘子的射频传输端口结构及陶瓷焊球阵列封装形式,结合多层陶瓷加工工艺,设计并制备了一款可封装多个芯片的X波段AlN陶瓷外壳。采用应力仿真软件对外壳进行结构设计,利用电磁仿真软件对该外壳的射频端口进行仿真优化。采用微带线直接穿墙形式,设计了共面波导-带状线-共面波导的射频传输结构,并与陶瓷外壳进行一体化设计和制作。利用GSG探针对外壳样品进行测试,实测结果表明,在0~12 GHz频段内,外壳射频端口的插入损耗不小于-0.5 dB,回波损耗不大于-15 dB,AlN一体化外壳尺寸为10.25 mm×16.25 mm×4 mm,可广泛应用于高频高速信号一体化封装领域。     

射频系统封装的发展现状和影响

电子产品小型化将进一步依赖微电子封装技术的进步.SiP（系统封装）所强调的是将一个尽可能完整的电子系统或子系统高密度地集成于单个封装体内,随着其技术的研究不断深入,封装规模不断扩大,其作用不断提升,它在射频领域中的应用特性也日趋突出,成为实现视频系统小型化、轻量化、高性能和高可靠的有效方法.针对当前RF SiP（射频系...     

Thermo-mechanical reliability analysis of a RF SiP module based on LTCC substrate

The RF SiP module based on LTCC substrate has attracted considerable attention in wireless communications for the last two decades. However, the thermo-mechanical reliability of this 3D LTCC architecture has not been well-studied as common as its traditional ceramic package structure. A practical RF SiP module based on LTCC substrate was presented and its thermo-mechanical reliability was analyzed in this paper, with emphasis on the reliability of heat reflow process, the operating state and fatigue of second-level solder joints. The configuration and assembly process of the SiP module were briefly introduced at first, and qualitative analysis was made according to the reliability problem that may occur in the manufacturing process and the operating state. Through FEM simulation, this paper studied the warpage and stress variation of the RF SiP module, as well as parametric studies of some key package dimensions. Solder joint reliability under temperature cycling condition was also analyzed in particular in this paper. The results show that for the heat reflow process and operating state, the maximum warpage is both on the top LTCC substrate, but the maximum stresses are on the outermost solder ball and the kovar column at the corner, respectively. There is a large residual stress on the critical solder ball at the end of the reflow process and the key package dimensions has little effect on it. The thickness of top LTCC substrate has a significant impact on the thermal deformation and thermal stress, followed by the height of kovar columns. The reason for the considerable thermal stress on the kovar column is the non-uniform of temperature distribution. The key to reducing thermal deformation and stress in the operating state is the employment of effective cooling measures. It is found by comparison that the reliability of critical solder joints can be greatly improved by adding suitable underfill.     

SoC and SiP, the Yin and Yang of the Tao for the New Electronic Era

“More than Moore” is becoming the password for these coming years. New steps to overcome technology limitations to diffuse, on the same die, different chips to have a complete system have been developed. This approach is called system in package (SiP), a way to have in a package dies of logic, analog, memory, passive components, etc., assembled to obtain a miniaturized board. SiP performances and limitations are here analyzed to understand advantages versus system on chip (SoC). This paper is a discussion about the main items that can lead to the choice of the right approach—SiP or SoC—before a system design start. Three persons attend to our virtual meeting: an SoC technology development manager, expert in microcontroller embedded memories and technology integration; an SiP analog radio-frequency design senior expert; and a moderator that designed embedded memories and now SiP, all involved to understand how to reach a tradeoff among these two approaches. Like for the Yin and Yang, symbol of the equilibrium for the Taoist philosophy, the two opposites divide the circle of the life, with a piece of each in the other.      

Integrated RF architectures in fully-organic SOP technology

Future wireless communications systems require better performance, lower cost, and compact RF front-end footprint. The RF front-end module development and its level of integration are, thus, continuous challenges. In most of the presently used microwave integrated circuit technologies, it is difficult to integrate the passives efficiently with required quality. Another critical obstacle in the design of passive components, which occupy the highest percentage of integrated circuit and circuit board real estate, includes the effort to reduce the module size. These issues can be addressed with multilayer substrate technology. A multilayer organic (MLO)-based process offers the potential as the next generation technology of choice for electronic packaging. It uses a cost effective process, while offering design flexibility and optimized integration due to its multilayer topology. We present the design, model, and measurement data of RF-microwave multilayer transitions and integrated passives implemented in a MLO system on package (SOP) technology. Compact, high Q inductors, and embedded filter designs for wireless module applications are demonstrated for the first time in this technology.     

基于数字中频预处理专用芯片的SiP设计

随着电子科学技术的快速发展，系统级封装（SiP）技术成为实现信号处理系统小体积、轻重量、低功耗及低成本方面要求的又一有效途径。针对数字中频预处理应用要求，提出了一种将波形产生、数字滤波处理、数字信号上传和下发及时钟和同步等复杂预处理功能集成设计的方法，采用PBGA225 封装形式，大大缩小了系统体积和功耗。