载流子迁移率测量的光电方法

本文评述了载流子迁移率测量的各种方法,着重介绍了光电测量的渡越时间(TOF)方法,并对几种新的含偶氮基、硝基及咔唑基的光电功能材料进行了测量,给出了迁移率的测量结果.     

偶氮类有机薄膜的光存储与光调制特性研究

本文利用光致双折射技术,研究了两种新型偶氮类光电功能材料的光存储与光调制特性.对比研究结果表明:含偶氮侧链聚合物具有更好的光存储功能,而偶氮小分子掺杂聚合物则更适用于光调制.文中还利用偶氮小分子掺杂聚合物薄膜,通过改变附加偏振光的偏振方向得到了一级自衍射的放大和衰减信号,从而在0°～90°范围内完成了偏振光调制光学全息技术.     

High-gain, V-band, low-noise MMIC amplifiers usingpseudomorphic MODFETs

State-of-the-art, 60-GHz, low-noise MMICs based on pseudomorphic modulation-doped FETs, with 0.25-μm×60-μm gates offset 0.3 μm from the source ohmic, are discussed. Single-state low-noise amplifiers (LNAs) exhibited minimum noise figures of 2.90 dB with 4.1 dB of associated gain at 59.25 GHz. Dual-state MMICs had minimum noise figures of 3.5 dB and 10.8 dB of associated gain at 58.50 GHz. Cascaded four-stage LNAs (two dual-stage MMICs) had minimum noise figures of 3.7 dB and over 20.7 dB of associated gain at 58.0 GHz. Finally, when biased for maximum gain, the four-stage amplifier exhibited over 30.4 dB of gain at 60.0 GHz     

X-band 0.5, 1, and 2 watt power amplifiers with markedimprovement in power-added efficiency

Very efficient X-band MESFET power amplifiers, showing greater power-added efficiency over a wider bandwidth than any X-band amplifiers of comparable output reported to date, are discussed. The amplifiers were designed with attention given to optimum bias, proper harmonic termination, and efficient power combining. These device and design issues are discussed, and a straightforward design method which achieved the increased levels of efficiency is described     

vol. 15, no. 1, Cover

vol. 15, no. 1, Cover     

双频CO_2激光多光子离解CF_3CHCl_2分离氘

本文研究在双频CO_2激光辐照下CF_3CDCl_2-CF_3CHCl_2混合气的多光子离解。所获得的氘的一步浓缩系数β_(产物)达1600,比单频CO_2激光辐照下离解的浓缩系数大。     

Realization of Finite Impulse Response Filters Using Coefficients +1, 0, and -1

New classes of nonrecursive linear digital filters are proposed as alternatives to conventional methods for digital signal processing devices. In fact, the traditional approach, where signal samples are represented by 8-15 bit words, can be very expensive to implement due to the complexity of multibit multipliers and adders. Filter structures consisting of a transversal filter with tap coefficients restricted to - 1, 0, or + 1 and cascaded with simple recursive sections are proposed. Using a mean square error criterion, dynamic programming methods to select optimum sets of coefficient values for the taps are presented and evaluated. It is shown that these structures lend themselves to very simple hardware implementations and offer a valid alternative to the conventional filtering approach. Designs for several example filters are presented, and their implementation complexity is examined.     

为微控制器提供振荡器的LED驱动电路

白光LED驱动器的主要构件是一个振荡器，一个电荷泵和一个稳流电流源。美国国家半导体公司（WWW.national.com）生产一种在高度集成的LM2791/2型IC内包含以上三种构件的器件。白光LED驱动器通常与手机基带控制器或微控制器串联使用。你可以方便地采用LM2791／2来提供一个时钟源：你只要考虑到在快速充放电电容器（C1）两个引脚上有一个伪方波，就可以实现一个简单而有用的电路。     

赵小丁EX1摄动中国——张艺谋“御用”摄影师赵小丁全面解读索尼PMW—EX1

“我看青山多妩媚,料青山,看我应如是。”美景因观赏者的参与而赋予了灵气,有了人,景才会活。有了人的驻足,注目,才会有景的赏心悦目。中国先哲一直强调“天人合一”。景与人,一静一动,人赏景,景感人,动静相衬。如何挖掘,勾勒,呈现这幅壮观的天人合一图,对执笔者绝对是个挑战。对于成功执导奥运会开闭幕式的张艺谋导演来说,应对这种挑战也并非易事。     

Fast low energy RNS comparators for 4-moduli sets {2n±1, 2n,m} with m∈{2n+1±1, 2n−1−1}

Comparison is a difficult operation in residue number systems (RNS). Besides the straightforward comparison of binary equivalents of RNS numbers, shortcut methods for moduli-set τ={2ⁿ−1, 2ⁿ, 2ⁿ+1} have been proposed that only slightly improve the corresponding figures of merit. On the other hand, we have encountered only one hardware realization of 4-moduli RNS comparison, where the corresponding moduli-set does not include any power-of-two modulo. In this paper, we examine and provide shortcut RNS comparators for three moduli-sets with four modulus, all containing τ as a subset. Evaluation results show 15–136% speed-up and 39–366% less energy in comparison to the straightforward reverse-and-compare comparators.     

处理器设计的谬误(Ⅰ)

本系列深度分析文章将调查13种不成功的处理器种群,探索了造成每一个处理器种群死亡的主要设计错误。每一个主要设计错误还用一个或几个例子来阐述。     

A 1-V, 10-MHz, 3.5-mW, 1-Mb MTCMOS SRAM: with charge-recyclinginput/output buffers

This paper presents a high-speed and low-power SRAM for portable equipment, which is operated by a single battery cell of around 1 V. Its memory cells are made up of high-threshold-voltage (high-V_th) MOSFETs in order to suppress the power dissipation due to large subthreshold leakage currents. For designing peripheral circuitry, we use SRAM's special feature that input signals of each logic gate during the standby time can be predicted. Low-V_th MOSFETs are assigned for the critical paths of memory-cell access. The leakage current in each logic gate is reduced by high-V_th MOSFETs, which are cut off during standby. The high-V_th, MOSFET in one logic gate can be shared with another logic gate in order to enlarge effective channel width. To shorten the readout time, a step-down boosted-wordline scheme suitable for current-sense readout and a new half-swing bidirectional double-rail bus are used. The data-writing time is halved by means of a pulse-reset wordline architecture. To reduce the power dissipation, a 32-divided memory array structure is employed with a new redundant address-decoding scheme. Also, data transition detectors and a charge-recycling technique are employed for reducing the power dissipation of data-I/O buffers. A 64-K-words×16-bits SRAM test chip, which was fabricated with a 0.5-μm multithreshold voltage CMOS (MTCMOS) process, has demonstrated a 75-ns address access time at a 1-V power supply. The power dissipation during standby is 1.2 μW, and that at a 10-MHz read operation with the modified checkerboard test pattern is 3.9 mW for 30-pF loads     

Neural networks, error-correcting codes, and polynomials over thebinary n-cube

Several ways of relating the concept of error-correcting codes to the concept of neural networks are presented. Performing maximum-likelihood decoding in a linear block error-correcting code is shown to be equivalent to finding a global maximum of the energy function of a certain neural network. Given a linear block code, a neural network can be constructed in such a way that every codeword corresponds to a local maximum. The connection between maximization of polynomials over the n-cube and error-correcting codes is also investigated; the results suggest that decoding techniques can be a useful tool for solving such maximization problems. The results are generalized to both nonbinary and nonlinear codes     

A new method of timing-signal recovery for (1, 0, ?1) multiple-response signals

A powerful method of timing signal recovery for use in (1, 0, ?1) multiple-response v.s.b.a.m. data modems is described. The phase of the recovered timing signal relative to the data eye pattern is substantially independent of the demodulating carrier phase and the transmission distortion.