Electrical Characterization of Defects Introduced During Sputter Deposition of Schottky Contacts on <Emphasis Type="Italic">n</Emphasis>-type Ge

The authors have investigated by deep level transient spectroscopy the electron traps introduced in n-type Ge during sputter deposition of Au Schottky contacts. They have compared the properties of these defects with those introduced in the same material during high-energy electron irradiation. They found that sputter deposition introduces several electrically active defects near the surface of Ge. All these defects have also been observed after high-energy electron irradiation. However, the main defect introduced by electron irradiation, the V-Sb center, was not observed after sputter deposition. Annealing at 250°C in Ar removed the defects introduced during sputter deposition.     

Electrical characterization of defects introduced during electron beam deposition of W Schottky contacts on n-type 4H-SiC

We have studied the defects introduced in n-type 4H-SiC during electron beam deposition (EBD) of tungsten by deep-level transient spectroscopy (DLTS). The results from current-voltage and capacitance-voltage measurements showed deviations from ideality due to damage, but were still well suited to a DLTS study. We compared the electrical properties of six electrically active defects observed in EBD Schottky barrier diodes with those introduced in resistively evaporated material on the same material, as-grown, as well as after high energy electron irradiation (HEEI). We observed that EBD introduced two electrically active defects with energies E_C – 0.42 and E_C – 0.70 eV in the 4H-SiC at and near the interface with the tungsten. The defects introduced by EBD had properties similar to defect attributed to the silicon or carbon vacancy, introduced during HEEI of 4H-SiC. EBD was also responsible for the increase in concentration of a defect attributed to nitrogen impurities (E_C – 0.10) as well as a defect linked to the carbon vacancy (E_C – 0.67). Annealing at 400 °C in Ar ambient removed these two defects introduced during the EBD.     

Metal contacts to gallium arsenide

In this paper, some aspects that determine the properties of Schottky and ohmic contacts to GaAs are discussed. For Schottky barrier diodes (SBD), we present results of a comprehensive study involving 41 different metals. We pay special attention to Ru and show that its thermal and chemical stability makes it ideal for use in devices operating above room temperature and for experiments involving annealing. Further, we discuss the effect of different metallization methods on SBD properties and show that methods which use energetic particles, such as electron beam deposition and sputter deposition, often result in inferior SBD properties—the consequence of electrically active defects introduced by the energetic particles at and close to the semiconductor surface. The advantages of using Ru as contact material to GaAs are that it forms high quality, thermally stable Schottky contacts to n-GaAs and thermally stable ohmic contacts with low specific contact resistance to p-GaAs. The versatile applicability of Ru contacts makes them extremely important for future use in devices such as heterojunction bipolar transistors and solid state lasers.     

An investigation of electrical and structural properties of Ni-germanosilicided Schottky diode

Ni-germanosilicided Schottky barrier diode has been fabricated by annealing the deposited Ni film on strained-Si and characterized electrically in the temperature range of 125 K–300 K. The chemical phases and morphology of the germanosilicided films were studied by using scanning electron microscopy (SEM), cross-sectional transmission electron microscopy (TEM) and energy dispersive spectroscopy (EDS). The Schottky barrier height (_b), ideality factor (n) and interface state density (D_it) have been determined from the current–voltage (I–V) and capacitance–voltage (C–V) characteristics. The current–voltage characteristics have also been simulated using SEMICAD device simulator to model the Schottky junction. An interfacial layer and a series resistance were included in the diode model to achieve a better agreement with the experimental data. It has been found that the barrier height values extracted from the I–V and C–V characteristics are different, indicating the existence of an in-homogeneous Schottky interface. Results are also compared with bulk-Si Schottky diode processed in the same run. The variation of electrical properties between the strained- and bulk-Si Schottky diodes has been attributed to the presence of out-diffused Ge at the interface.     

Defect characterization of n-type Si1−xGex after 1.0 kev helium-ion etching

SiGe heterostructures with their associated geometries and properties promise a novel generation of Si-based devices. Surface processing and, in particular, dry or plasma etching of semiconductors is a key technology for producing optoelectronic integrated circuits and high speed electronic devices. We have used deep-level transient spectroscopy (DLTS) in an investigation of the electronic properties of defects introduced in n-Si ₁ −xGe_x (x = 0.00 to 0.25) during 1 keV helium-ion etching (fluence = 1 × 10¹² cm²) prior to the deposition of gold Schottky barrier diodes (SBDs). Six electron defects (EHel-EHe6) were detected after this processing stage. The defects detected after etching are compared to those introduced by 5.4 MeV alpha-particle (α-) irradiation and, also, radio frequency (rf) sputter-deposition of Au SBDs on material from the same wafer. Four of the electron defects (EHel, EHe2, EHe4, and EHe6) are detected in Si. The remaining two defects (EHe3 and EHe5) are only detected in material containing germanium. It was noted that defects introduced during the He-ion etch process have the same DLTS “signatures” as defects after the sputter deposition process, but none were the same as those introduced during the α-particle irradiation. The influence of increased Ge content on DLTS peak shape and positions is also illustrated and discussed.     

Influence of the pre-treatment anneal on Co–germanide Schottky contacts

A thin cobalt layer is deposited by electron beam evaporation onto a germanium substrate after an in situ cleaning annealing at 400 or 700 °C. The effect of these pre-treatments on the Co/Ge Schottky barrier properties and on the germanide formation is investigated by using different techniques. A strong influence of the pre-treatment is observed. The pre-treatment at 700 °C removes the native oxide but enhances the diffusion of contaminants. After post-metal deposition annealing, the sample pre-treated at 700 °C shows a double layer structure due to interdiffusion, whereas some large isolated islands are present in the sample pre-treated at 400 °C.     

Ballistic electron emission microscopy studies of the temperature dependence of Schottky barrier height distribution in CoSi2/n-Si(1 0 0) diodes formed by solid phase reaction

Ballistic electron emission microscopy (BEEM) and ballistic electron emission spectroscopy have been performed on polycrystalline and epitaxial CoSi₂/n-Si(1 0 0) contacts at temperatures ranging from −144°C to −20°C. The ultra-thin CoSi₂ films (10 nm) were fabricated by solid state reaction of a single layer of Co (3 nm) or a multilayer of Ti (1 nm)/Co (3 nm)/amorphous-Si(1 nm)/Ti (1 nm) with a Si substrate, respectively. The spatial distribution of barrier height over the contact area obeys a Gaussian function at each temperature. The mean barrier height increases almost linearly with decreasing temperature with a coefficient of −0.23±0.02 meV/K for polycrystalline CoSi₂/Si diodes and −0.13±0.03 meV/K for epitaxial diodes. This is approximately equal to one or one-half of the temperature coefficient of the indirect energy gap in Si, respectively. It suggests that the Fermi level is pinned to different band positions of Si. The width of the Gaussian distribution is about 30–40 meV, without clear dependence on the temperature. The results obtained from conventional current–voltage and capacitance–voltage (I–V/C–V) measurements are compared to BEEM results.     

High-quality NiGe/Ge diodes for Schottky barrier MOSFETs

Schottky barrier (SB) Ge channel MOSFETs suffer from high drain-body leakage at the required elevated substrate doping concentrations to suppress source–drain leakage. Here, we show that electrodeposited Ni–Ge and NiGe/Ge Schottky diodes on highly doped Ge show low off current, which might make them suitable for SB-MOSFETs. The Schottky diodes showed rectification of up to five orders in magnitude. At low forward biases, the overlap of the forward current density curves for the as-deposited Ni/n-Ge and NiGe/n-Ge Schottky diodes indicates Fermi-level pinning in the Ge bandgap. The SB height for electrons remains virtually constant at 0.52 eV (indicating a hole barrier height of 0.14 eV) under various annealing temperatures. The series resistance decreases with increasing annealing temperature in agreement with four-point probe measurements indicating the lower specific resistance of NiGe as compared with Ni, which is crucial for high drive current in SB-MOSFETs. We show by numerical simulation that by incorporating such high-quality Schottky diodes in the source/drain of a Ge channel PMOS, highly doped substrate could be used to minimize the subthreshold source to drain leakage current.     

Study of electrically active defects in n-GaN layer

Deep level defects in both p⁺/n junctions and n-type Schottky GaN diodes are studied using the Fourier transform deep level transient spectroscopy. An electron trap level was detected in the range of energies at E_c−E_t=0.23–0.27 eV with a capture cross-section of the order of 10⁻¹⁹–10⁻¹⁶ cm² for both the p⁺/n and n-type Schottky GaN diodes. For one set of p⁺/n diodes with a structure of Au/Pt/p⁺–GaN/n–GaN/n⁺–GaN/Ti/Al/Pd/Au and the n-type Schottky diodes, two other common electron traps are found at energy positions, E_c−E_t=0.53–0.56 eV and 0.79–0.82 eV. In addition, an electron trap level with energy position at E_c−E_t=1.07 eV and a capture cross-section of σ_n=1.6×10⁻¹³ cm² are detected for the n-type Schottky diodes. This trap level has not been previously reported in the literature. For the other set of p⁺/n diodes with a structure of Au/Ni/p⁺–GaN/n–GaN/n⁺–GaN/Ti/Al/Pd/Au, a prominent minority carrier (hole) trap level was also identified with an energy position at E_t−E_v=0.85 eV and a capture cross-section of σ_n=8.1×10⁻¹⁴ cm². The 0.56 eV electron trap level observed in n-type Schottky diode and the 0.23 eV electron trap level detected in the p⁺/n diode with Ni/Au contact are attributed to the extended defects based on the observation of logarithmic capture kinetics.     

Passivation of Surface and Interface States in AlGaN/GaN HEMT Structures by Annealing

The Ni/AlGaN interfaces in AlGaN/GaN Schottky diodes were investigated to explore the physical origin of post-annealing effects using electron beam induced current (EBIC), current–voltage (I–V) characteristics, and X-ray photoelectron spectroscopy (XPS). The EBIC images of the annealed diodes showed that the post-annealing process reduces electrically active states at the Schottky metal/AlGaN interfaces, leading to improvement of diode performance, for example a decrease in reverse leakage current and an increase in Schottky barrier heights. Pulsed I–V characteristics indicate the Fermi level is up-shifted after annealing, resulting in a larger sheet carrier density at the AlGaN/GaN interface. Unintentional oxidation of the free AlGaN surface during the post-annealing process, revealed by XPS analysis, may prevent electron trapping near the drain-side of the gate edges. We suggest that the post-annealing process under an optimized conditions can be an effective way of passivating AlGaN/GaN heterojunction field-effect transistors.     

Electrical passivation by hydrogen plasma treatment of transition metal impurities in germanium

Transition metal impurities in germanium introduce deep levels in the band gap, which may influence the lifetime of carriers and leakage currents of devices. In this work it is shown that Ti, Cr and Fe centres in germanium can be passivated using plasma hydrogenation. The metals have been implanted at 90 keV in n- and p-type wafers and in-diffused during a 5 min thermal anneal at 500 °C. Samples have been hydrogenated using a DC plasma for 4 h at 200 °C and Schottky diodes were made for measurement using DLTS. It is found that the levels of metal impurities are passivated by hydrogenation. Characteristic hole and electron traps are assigned to the irradiation damage induced by the direct plasma exposure. Metal-specific levels are tentatively assigned to transition metal–hydrogen-related centres. Two hole traps at 0.05 and 0.10 eV above the valence band are only present in the Cr-doped samples and are tentatively assigned to chromium–hydrogen complexes. A comparison is made with copper–hydrogen in germanium.     

Isochronal annealing study of hydrogen interaction with implantation-induced point defects in p-type silicon

Isochronal annealing with zero and reverse bias applied to Schottky diodes was used to monitor the evolution of hydrogen interaction with point defects observed in hydrogen-implanted p-type silicon, i.e., divacancy (VV), carbon–oxygen interstitial pair (C_iO_i) and two levels at E_v+0.28 and E_v+0.50 eV. The VV and C_iO_i are passivated by hydrogen liberated from hydrogen-containing defects during annealing in the temperature range 90–150°C and reappear upon annealing above 180°C under reverse bias due to hydrogen liberation and its field drift. Two levels at E_v+0.50 and E_v+0.28 eV are ascribed to irradiation-induced and hydrogen-related defects, respectively.     

Impact of the electron, proton and helium irradiation on the forward I–V characteristics of high-power P–i–N diode

2.5 kV/100 A high-power P–i–N diode was electron, proton and helium irradiated in a wide range of irradiation doses with irradiation energies in the MeV range. The resulting forward I–V curves were registered in the temperature range 30–125 °C to investigate the magnitude of the crossing point current of the I–V curves––I_XING. I_XING was found to decrease with increasing irradiation dose and to disappear at high doses for all three irradiation treatments with exception of ion irradiated diodes with defect peaks placed deeply into the anode region. Using a simple model based on the thermal and injection dependence of the carrier lifetime, the explanation of this effect is presented with the support of the non-isothermal 2-D device simulation of helium irradiated devices.     

Study of the electrical cycling stressed large area Schottky diodes using I–V and noise measurements

Large area commercial Al/n-Si Schottky diodes were subjected to an electrical cycling stress in order to cause degradation of diodes with local contact irregularities. Using the I–V characteristics and noise measurements in the frequency range of 10 Hz to 10 kHz at room temperature and using the corresponding equivalent circuit representation of degraded diodes, it has been shown that the latent leakage paths contribute to the degradation of the Schottky diodes under the test conditions. The results could be used to confirm that the ideality factor cannot be alone used as prediction tool of diode behavior under electrical cycling stress. The conclusion of this paper is that the results show that this kind of the stress test can be used as a screening test for diodes with latent leakage current paths.     

Optical and electrical characterization of hafnium oxide deposited by liquid injection atomic layer deposition

Optical and electrical properties of a set of high-k dielectric HfO₂ films, deposited by liquid injection atomic layer deposition (LI-ALD) and post deposition annealed (PDA) in nitrogen (N₂) ambient at various temperatures (400–600 °C), were investigated. The films were prepared using the cyclopentadienyl of hafnium precursor [Cp₂Hf(CH₃)₂] with water deposited at 340 °C. The spectroscopic ellipsometric (SE) results show that the characteristics of the dielectric functions of these films are strongly affected by annealing temperatures. I–V results show that N₂-based PDA enhances the average energy depth of the shallow trapping defects from Poole–Frenkel conduction fitting. This also correlated with the measured increase in MOS capacitance–voltage hysteresis.     

High-Quality Schottky Contacts for Limiting Leakage Currents in Ge-Based Schottky Barrier MOSFETs

Schottky barrier (SB) Ge channel MOSFETs suffer from high drain-body leakage at the required elevated substrate doping concentrations to suppress source–drain leakage. Here, we show that electrodeposited Ni–Ge and NiGe/Ge Schottky diodes on highly doped Ge show low off current, which might make them suitable for SB p-MOSFETs. The Schottky diodes showed rectification of up to five orders of magnitude. At low forward biases, the overlap of the forward current density curves for the as-deposited Ni/n-Ge and NiGe/n-Ge Schottky diodes indicates Fermi-level pinning in the Ge bandgap. The SB height for electrons remains virtually constant at 0.52 eV (indicating a hole barrier height of 0.14 eV) under various annealing temperatures. The series resistance decreases with increasing annealing temperature in agreement with four-point probe measurements indicating the lower specific resistance of NiGe as compared to Ni, which is crucial for high drive current in SB p-MOSFETs. We show by numerical simulation that by incorporating such high-quality Schottky diodes in the source/drain of a Ge channel PMOS, a highly doped substrate could be used to minimize the source-to-drain subthreshold leakage current.      

Comparative studies of Pt and Ir schottky contacts on undoped Al0.36Ga0.64N

Schottky contacts of Pt and Ir on undoped Al_0.36Ga_0.64N have been fabricated and the ideality factor, the built-in voltage and the reverse bias current were determined using current–voltage measurements to make a comparison.The smallest ideality factors, the lowest reverse bias current and the highest built-in voltages have been obtained for Ir Schottky contacts.We have studied the effect of an annealing for Pt and Ir Schottky contacts, on the ideality factor, the built-in voltage and the reverse bias current. A decrease of the ideality factor and the reverse bias current associated to an increase of the built-in voltage have been obtained except for high annealing temperature (T > 400 °C).Reductions of 37% and 43% of the ideality factor and improvements of 24% and 41% of the built-in voltage have been obtained for Pt and Ir Schottky contacts, respectively, after an annealing performed at 350 °C during 30 min.Two different electrical stresses have also been applied on the ohmic and Schottky contacts during 164 h to study the reliability of the employed technology. In a first time, the devices have been stressed with a drain-to-source voltage V_DS of 20 V and a gate-to-source voltage V_GS of −5 V to submit the devices to an electrical field only and not to a thermal effect induced by the electrical current. In a second time, the aging stress has been applied for a V_DS of 20 V and for a V_GS of 0 V in order to study the impact of the electrical field and the thermal effect induced by the drain current on the electrical behaviours of Al_0.36Ga_0.64N/GaN transistors. This study has also shown the existence of electrical traps in the device structure and proved the good reliability of the involved technology.These comparative studies demonstrate that Ir is a better candidate than Pt for the realisation of Schottky contacts on undoped Al_0.36Ga_0.64N.     

Device assessment of the electrical activity of threading dislocations in strained Ge epitaxial layers

It is shown that the high density of threading dislocations (TDs) and, more specifically, the high density of point defects associated with it and present in our strained Ge epitaxial layers on a Si_0.2Ge_0.8 relaxed buffer layer degrades the mobility and the leakage current of pMOSFETs and p⁺n junctions fabricated therein. Annealing in the range 550–650 °C prior to gate stack deposition improves the device performance, although there is no marked change in the TD density. From this, it is concluded that the annealing may reduce the density of point defects grown in during the epitaxial deposition.     

Silicon dioxide deposited by ECR-PECVD for low-temperature Si devices processing

Silicon dioxide films have been deposited at temperatures less than 270 °C in an electron cyclotron resonance (ECR) plasma reactor from a gas phase combination of O₂, SiH₄ and He. The physical characterization of the material was carried out through pinhole density analysis as a function of substrate temperature for different μ-wave power (E_w). Higher E_w at room deposition temperature (RT) shows low defects densities (<7 pinhole/mm²) ensuring low-temperatures process integration on large area. From FTIR analysis and Thermal Desorption Spectroscopy we also evaluated very low hydrogen content if compared to conventional rf-PECVD SiO₂ deposited at 350 °C. Electrical properties have been measured in MOS devices, depositing SiO₂ at RT. No significant charge injection up to fields 6–7 MV/cm and average breakdown electric field >10 MV/cm are observed from ramps I–V. Moreover, from high frequency and quasi-static C–V characteristics we studied interface quality as function of annealing time and annealing temperature in N₂. We found that even for low annealing temperature (200 °C) is possible to reduce considerably the interface state density down to 5 × 10¹¹ cm⁻² eV⁻¹. These results show that a complete low-temperatures process can be achieved for the integration of SiO₂ as gate insulator in polysilicon TFTs on plastic substrates.     

Temperature-dependence of barrier height of swift heavy ion irradiated Au/n-Si Schottky structure

The electrical characteristics of swift heavy ion (SHI) irradiated Au/n-Si (1 0 0) structure has been investigated in a wide temperature range (50–300 K). The forward bias current–voltage (I–V) measurements have been used to extract the diode parameters as a function of temperature. The Zero-bias Schottky barrier height decreases with decreasing temperature. However, the flat-band barrier height is almost independent of the temperature. These results are interpreted using the models of Fermi level pinning. The behavior of Schottky diode parameters is explained by taking into account the role of the irradiation induced defects at Au/n-Si (1 0 0) interface.