Symbolic analysis of analog circuits containing voltage mirrors and current mirrors

The pathological elements voltage mirror (VM) and current mirror (CM) have shown advantages in analog behavioral modeling and circuit synthesis, where many nullor-mirror equivalences have been explored to design and to transform voltage-mode circuits to current-mode ones and viceversa. However, both the VM and CM have not equivalents to perform automatic symbolic circuit analysis. In this manner, we introduce nullor-equivalents for these pathological elements allowing to include parasitics and to perform only symbolic nodal analysis. The nullor-equivalent of the CM is extended to provide multiple-outpus (MO-CM). Finally, two active filters containing VMs, CMs and MO-CMs are analysed to show the usefulness of the models.     

On the Voltage Mirrors and the Current Mirrors

The voltage mirror and the current mirror are two pathological elements used to represent active devices featuring voltage or current reversing properties. The properties of these ideal elements are presented and it is demonstrated that they form a complete set analogous to that formed by the nullator and the norator.     

Pathological equivalents of CMs and VMs with multi-outputs

New models based on pathological elements are introduced to describe the behavior of current- and voltage-mirrors with multi-outputs. To do so, simple element stamps for a current-controlled current source and a voltage controlled voltage source have been deduced. The difference of the new stamps with those reported in the literature is that herein, input–output impedances of the controlled sources are taken into account. As a consequence, not only the behavior of controlled sources can be directly introduced on the admittance matrix without extra variables, but also the new stamps have few nonzero elements. Relying on these stamps, the modeling of current- and voltage-mirrors with multi-outputs based on pathological elements is generated. Gain and parasitic elements associated to each input–output terminal of current- and voltage-mirrors are considered in the proposed models. Due to the simplicity of our models, a reduced and sparse system of equations is obtained for analog circuits containing current- and/or voltage-mirrors. As a consequence, the computational complexity used in the solution of the system of equations is diminished when recursive determinant-expansion techniques are applied. The usefulness of the models to realize symbolic analysis of analog circuits is demonstrated and compared with nullor-based models of current- and voltage-mirrors previously reported. Furthermore, these models can be used either at the transistor or circuit level of abstraction in order to compute fully-symbolic small-signal characteristics of analog circuits.     

Construction of CDBA and CDTA behavioral models and the applications in symbolic circuits analysis

This paper describes a systematic method to create behavioral models of active elements and circuits using pathological cells that are unity gain cells and voltage-current/current–voltage transformation with identical/reverse value cells. Blocks of CDBA and CDTA behavioral models are respectively proposed and applications of current-mode symbolic circuit analysis are illustrated.     

Symbolic noise modeling,analysis and optimization of a CMOS input buffer

This paper presents the symbolic noise modeling, analysis and optimization of an Input Buffer designed using RFCMOS technology, intended to be used in a high speed Track and Hold Amplifier (THA). The symbolic noise modeling and analysis are carried out by modeling each RF-MOSFET present in the Input Buffer by its nullor equivalent noise model. This helps in better understanding the noise involvement with the circuit and its optimization. All the extrinsic and intrinsic components associated with the RF-MOSFET used for the symbolic noise analysis are obtained using parameter extraction technique. The parameter extraction and symbolic noise analysis are done using MATLAB. The results obtained through MATLAB simulation are in good agreement with the results obtained from SPICE.     

Monolithic nullor-a universal active network element

The design of a monolithic integrated nullor is described. It is a universal active element with floating input and output ports and with large internal gain. The element consists of a differential input stage, a symmetrical level shift stage, and a differential output stage. In the latter stage the collectors of a long-tailed transistor pair function as a pair of connected vessels for the output currents at high common-mode output impedance. This gives the output port its floating character. The element is capable of conveying a potential from one input terminal to the other input terminal and a current from one input terminal to the other output terminal at an accurate unity gain. The total inaccuracy of these operations is in the order of 2/spl times/10/SUP 4/ at signal voltage levels of 1 V and 1 mA. The element has a bandwidth of 25 MHz and can handle maximum signal values of 10 V and 1 mA. The availability of such universal active elements makes it possible to minimize the number of active elements and passive precision elements in implementation of analog system functions.     

Symbolic Analysis of Nullor-Based Circuits with the Two-Graph Technique

Symbolic analysis is a powerful tool which accelerates the electronic design process by providing insight about the behavior of a circuit. Recently, the analysis and synthesis of electronic circuits with nullors have received considerable attention. This is due to the fact that nullors are very flexible and versatile active elements. Very efficient analysis methods, such as nodal analysis, Coates flow graphs, and two-graphs are proposed in the literature and are widely used. It has arguably been reported (because it does not generate vanishing terms in the symbolic network functions) that the last cited analysis method may be considered as the most promising. Actually, using the two-graph method, symbolic transfer functions can be calculated via either signal flow graphs and Mason’s formula, without any restriction on the type of the sources (dependent and independent), or the spanning tree enumeration method for RLC circuits with nullor equivalent circuits of independent voltage sources and all types of controlled sources. In this paper we propose a new method for symbolic analysis of circuits with nullors using the two-graph method in both versions, i.e. signal flow graphs and enumeration of spanning trees. This new method helps us to see distinctly the relationships between various circuit components (for the method using the signal flow graph) and enables us to calculate the symbolic network functions without the excess terms (for the method using the enumeration of spanning trees).     

Floating immittance realisation: nullor approach

Employing `CCII⊖/nullor equivalence' a number of new current conveyor-based single-resistance-tunable floating-L and FDNR circuits are derived which require only two CCs and three passive elements, and do not require passive component-matching. Also, the unifying role of the nullor approach in relating a variety of practicable floating immittance structures obtainable by using different kinds of active devices is highlighted     

Characteristic Investigation of New Pathological Elements

A characteristic investigation of the new pathological elements (i.e voltage mirror and current mirror) has been presented. Many nullor-mirror equivalences are explored. The circuit cascadability is discussed with nullor and mirror concepts. Also, the conventional inverse network transformation has been extended for applying to the circuits with current mirror output. To demonstrate the use of presented properties, practical examples have been given. The derived circuits have been verified with HSPICE simulation and the simulation results confirm with our theoretical prediction.Hung-Yu Wang was born in Kaohsiung, Taiwan, Republic of China, on January 4, 1969. He received the Ph.D. degree in optical sciences from National Central University, Chung-Li, Taiwan in 2002.Since 1993 he has worked on promoting the prototyping IC implementation of academic researches, and propelling the collaboration of the academia and industries in Chip Implementation Center (CIC), National Science Council of the Republic of China. In 2003 he became a researcher and the deputy director in Division of Chip Implementation Service of CIC. He is currently working on South Region Office of National Chip Implementation Center, National Applied Research Laboratories as a researcher and the department manager. His research interests are in current-mode circuits design, analog IC design and analog IP design.Ching-Ting Lee was born in Taoyuan, Taiwan, R.O.C., on November 1, 1949. He received his B.S. and M.S. in Electrical Engineering Department of the National Cheng-Kung University, Taiwan, in 1972 and 1974, respectively. He received Ph.D. degree in Electrical Engineering Department from the Carnegie-Mellon University, Pittsburgh, PA, in 1982.He worked on Chung Shan Institute of Science and Technology, before he joined the Institute of Optical Sciences, National Central University, Chung-Li, Taiwan, as a Professor in 1990. He works on National Cheng-Kung University as the dean of Electrical Engineering and Computer Science and the professor or the Institute of Microelectronics, Department of Electrical Engineering in 2003. His current research interests include theory, design, and application of guided-wave structures and devices for integrated optics and waveguide lasers. His research activities have also involved in the research concerning semiconductor lasers, photodetectors and high-speed electronic devices, and their associated integration for electrooptical integrated circuits. He received the outstanding Research Professor Fellowship from the National Science Council (NSC), R.O.C. in 2000 and 2002. He also received the Optical Engineering Medal from Optical Engineering Society and Distinguish Electrical Engineering professor award from Chinese Institute of Electrical Engineering Society in 2003.Chun-Yueh Huang was born in Taichung, Taiwan, Republic of China, on March 24, 1967. He received the B.S. degree in industrial education from National Chang Hwa Normal University, Chang Hwa, Taiwan in 1991, M.S. and Ph.D. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan in 1993 and 1997, respectively. Since 1999 he has been with the Kan Shan University of Technology, where he is currently Associate Professor and Chairman of Department of Electronic Engineering. His biography is included in the 7th Edition (2003–2004) of Who’s Who in Science and Engineering.His current researches include current-mode circuits design, VLSI design, analog IC design and analog IP design.     

一种用于半桥功率IC的新型高压电平位移电路

In order to reduce the chip area and improve the reliability of HVICs,a new high-voltage level-shifting circuit with an integrated low-voltage power supply,two PMOS active resistors and a current mirror is proposed.The integrated low-voltage power supply not only provides energy for the level-shifting circuit and the logic circuit,but also provides voltage signals for the gates and sources of the PMOS active resistors to ensure that they are normally-on.The normally-on PMOS transistors do not,therefore,need to be fabricated in the depletion process.The current mirror ensures that the level-shifting circuit has a constant current,which can reduce the process error of the high-voltage devices of the circuit.Moreover,an improved RS trigger is also proposed to improve the reliability of the circuit.The proposed level-shifting circuit is analyzed and confirmed by simulation with MEDICI,and the simulation results show that the function is achieved well.     

Optical interaction in active analog circuit elements

This publication introduces (spectral) photon emission (PEM) and electro-optical frequency mapping (EOFM/LVI) measurements to analog circuit elements (simple, cascode and low-voltage current mirrors). Different operating conditions of the devices are probed and the voltage dependence of the signals is analyzed. Results partly show close similarities to optical probing of digital IC's, but also differences in voltage dependence and signal levels due to more complicated voltage and signal distributions along the devices.     

An analog trimming circuit based on a floating-gate device

The application of floating-gate elements as adjustable components in analog CMOS circuits such as amplifiers is proposed. A simple trimming circuit based on this principle and delivering a differential current is described. Experimental results of a differential difference amplifier (DDA) containing two such circuits are given. After trimming, an offset voltage of 10 μV and a nonlinearity of 0.1% are achieved. Other analog circuits based on floating-gate elements like adjustable voltage sources and transconductances have been realized. Because they can be electrically reprogrammed, a wide range of applications, for example in neural nets, are possible     

新型高性能开关电源电压型PWM比较器

设计并实现了一种高性能的电压型PWM比较器,电路采用PMOS差分对管做为输入,多路电流镜提供精密负载电流,具有输入失调电压低、工作频率高、转换速率快和功耗低等优点.该电路可以替代普通电压型PWM比较器,直接运用在开关电源电压型PWM控制芯片中,并且能模块化设计,提高了PWM控制芯片的系统集成.     

Low supply voltage high-performance CMOS current mirror with low input and output voltage requirements

This paper presents a scheme for the efficient implementation of a low supply voltage continuous-time high-performance CMOS current mirror with low input and output voltage requirements. This circuit combines a shunt input feedback and a regulated cascode output stage to achieve low input resistance and very high output resistance. It can be used as a high-precision current mirror in analog and mixed signal circuits with a power supply close to a transistor's threshold voltage. The proposed current mirror has been simulated and a bandwidth of 40 MHz has been obtained. An experimental chip prototype has been sent for fabrication and has been experimentally verified, obtaining 0.15-V input-output voltage requirements, 100-/spl Omega/ input resistance, and more than 200-M/spl Omega/ (G/spl Omega/ ideally) output resistance with a 1.2-V supply in a standard CMOS technology.     

Applications of the current feedback operational amplifiers

The current feedback operational amplifiers (CFOAs) are receiving increasing attention as basic building blocks in analog circuit design. This paper gives an overview of the applications of the CFOAs, in particular several new circuits employing the CFOA as the active element are given. These circuits include differential voltage amplifiers, differential integrators, nonideal and ideal inductors, frequency dependent negative resistors and filters. The advantages of using the CFOAs in realizing low sensitivity universal filters with grounded elements will be demonstrated by several new circuits suitable for VLSI implementation. PSPICE simulations using the AD844-CFOA which indicate the frequency limitations of some of the proposed circuits are included.     

CMOS technology characterization for analog and RF design

The design of analog and radio-frequency (RF) circuits in CMOS technology becomes increasingly more difficult as device modeling faces new challenges in deep submicrometer processes and emerging circuit applications. The sophisticated set of characteristics used to represent today's “digital” technologies often proves inadequate for analog and RF design, mandating many additional measurements and iterations to arrive at an acceptable solution. This paper describes a set of characterization vehicles that can be employed to quantify the analog behaviour of active and passive devices in CMOS processes, in particular, properties that are not modeled accurately by SPICE parameters. Test structures and circuits are introduced for measuring speed, noise, linearity, loss, matching, and dc characteristics     

多功能AB类四象限模拟乘法器

在AB类电流镜基础上应用跨导线性原理设计出一种新颖的电流平方/电流跟随器,并以该模块为基本单元综合设计出一种多功能的四象限模拟乘法器.该乘法器在内部结构和元件参数不变的情况下,根据输入、输出信号的选择可以实现电压模式和电流模式乘法器.采用TSMC 0.35μm CMOS集成工艺对电路进行PSPICE仿真测试,结果表明提...     

A Method of Transformation from Symbolic Transfer Function to Active-RC Circuit by Admittance Matrix Expansion

Active-RC circuits containing 2-terminal linear passive elements and ideal transistors or operational amplifiers are derived from symbolic voltage or current transfer functions by admittance matrix transformations without any prior assumption concerning circuit architecture or topology. Since the method is a reversal of symbolic circuit analysis by Gaussian elimination applied to a circuit nodal admittance matrix, it can generate all circuits using the specified elements that possess a given symbolic transfer function. The method is useful for synthesis of low-order circuits, such as those used for cascade implementation, for deriving alternative circuits with the same transfer function as an existing circuit or for realizing unusual transfer functions, as may arise, for example, where a transfer function is required that contains specific tuning parameters     

一种电压控制CMOS电调谐第二代电流传输器(ECCⅡ)

提出了一种电压跟随能力强、功耗低、调节范围大的CMOS电调谐第二代电流传输器(ECCⅡ),通过引入对称的CMOS电流舵电路,保证了电流传输精度,电流增益连续可调,调节因子-2≤K≤2,同时避免了电流镜的过多使用,减小了电流损耗.采用电压调控方式,增大了电流输入范围;将电流输入端和电流加减电路隔离,保证了精确的电压跟随能力.采用TSMC 0.35μm工艺参数,在±1.5V电源供电的条件下对电路进行了Hspice模拟,VY/VX,和IZ/IX的-3 dB带宽分别为83.5 MHz和136 MHz,功耗为1.7515 mW.该电路在可调谐连续时间电流模式滤波器的设计中有广泛的应用前景.