A High-Frequency Field-Programmable Analog Array (FPAA) Part 1: Design

The design of a high-frequency field-programmable analog array (FPAA) is presented. The FPAA is based on a regular pattern of cells interconnected locally for high frequency performance. No switches of any kind are used in the signal path of a cell: programming of the functions, parameters, and interconnections is achieved solely by modifying cells' bias conditions digitally. Limited global signal interconnections are also available for those application circuits which cannot be mapped onto locally-only interconnected structure. Key circuits of the FPAA have been fabricated in a CPI transistor-array bipolar technology.     

Design Approaches to Field-Programmable Analog Integrated Circuits

The drive towards shorter design cycles for analog integrated circuits has given impetus to several developments in the area of Field-Programmable Analog Arrays (FPAAs). Various approaches have been taken in implementing structural and parametric programmability of analog circuits. Recent extensions of this work have married FPAAs to their digital counterparts (FPGAs) along with data conversion interfaces, to form Field-Programmable Mixed-Signal Arrays (FPMAs). This survey paper reviews work to date in the area of programmable analog and mixed-signal circuits. The body of work reviewed includes university and industrial research, commercial products and patents. A time-line of important achievements in the area is drawn, the status of various activities is summarized, and some directions for future research are suggested.     

A Switched Capacitor Approach to Field-Programmable Analog Array (FPAA) Design

We present a voltage mode switched-capacitor Field Programmable Analog Array (FPAA) to be used to implement various analog circuits. The FPAA consists of uniform configurable analog blocks (CABs) allowing implementation of different functions. Each CAB consists of two back-to-back connected inverting and non-inverting strays-insensitive switched-capacitor integrators. The interconnection between CABs is implemented by switched and unswitched capacitor networks. The internal structure of CABs and the interconnection between different CABs are configured by user-programmable digital control signals. The functionality of the FPAA is demonstrated through embedding of different types of filters, programmable amplifiers, biquads, modulators and signal generators along with simulation results.     

现场可编程模拟阵列AN10E40的应用开发

介绍了现场可编程模拟阵列AN10E40的基本结构、主要性能和开发过程。结合实例介绍了AnadigmDesigner软件的使用方法。     

A High-Frequency Field-Programmable Analog Array (FPAA) Part 2: Applications

This paper presents a variety of applications of an FPAA based on a regular pattern of signal-processing cells and primarily local signal interconnections. Despite the limitations introduced by local interconnections, the presented architecture accommodates a wide variety of linear and nonlinear circuits found in many signal processing systems. Thus it effectively proves that it is possible to improve the performance of an FPAA by means of constraining the interconnection pattern, without significantly limiting the class of circuits it can implement.     

现场可编程模拟阵列的微处理器配置模式及接口方法

现场可编程模拟阵列AN10E40加上直观性软件AnadigmDesigner,给数字和模拟电路设计者提供了设计模拟电路的便利条件,可以在AN10E40上快速设计精确、无漂移、具有温度补偿及可编程的模拟电路.AN10E40有两种装载配置SRAM的工作模式:模式0是微处理器引导模式,模式1是串行ROM引导模式.文中介绍了现场可编程模拟阵列AN10E40的微处理器配置模式,给出了AN10E40与51系列单片机的接口方法及程序设计.     

模拟型演化硬件中可重构器件的比较研究

演化硬件的研究者受困于满足可演化要求的灵活可重构硬件平台的匮乏.一方面,虽然现有商用可重构平台多数具有动态可局部重构能力,但是其设计目的不是用来研究演化硬件的.另外一方面,用户定制的面向演化硬件研究的芯片没有商用化,而且也不太可能在最近走向商用市场.本文研究了两类用来进行模拟演化硬件研究的可重构器件:商用的现场可编程模拟阵列和用户定制的现场可编程三极管阵列.通过比较研究,作者认为在FPTA类定制用于演化的可重构平台商用化之前,在FPAA平台上开展EHW的研究是有意义的,因为FPAA已经具有充分灵活的重构接口和充足的可重配置资源.     

DPAD2—A Field Programmable Analog Array

DPAD2 is a Field Programmable Analog Array (FPAA) based on CMOS switched capacitor technology. This paper describes the major design decisions that went into creating DPAD2 with respect to the ultimate goal of the work, being a mixed signal field programmable silicon solution. Two major compromises exist in the design of an FPAA, one between flexibility and performance, the other between functionality and die size; DPAD2 overcomes the first with a novel field programmable hierarchic routing scheme and the second by careful analysis of many disparate designs to arrive at a best compromise solution. Results from prototype silicon are presented where a single analog cell is reconfigured to perform a number of different analog signal processing functions. Bandwidth of the DPAD2 device is 500 kHz and the SNR is typically 60 dB, although both are application dependent. Introduction of the FPAA now enables a designer to have working silicon within one day, by a simple configuration of the silicon chip via a PC parallel interface. Software libraries of analog circuits are provided and allow very rapid creation of large and complex analog circuits.     

A Current-Mode based Field-Programmable Analog Array for Signal Processing Applications

This paper presents a new approach to develop Field Programmable Analog Arrays (FPAAs),¹ which avoids excessive number of programming elements in the signal path, thus enhancing the performance. The paper also introduces a novel FPAA architecture, devoid of the conventional switching and connection modules. The proposed FPAA is based on simple current mode sub-circuits. An uncompounded methodology has been employed for the programming of the Configurable Analog Cell (CAC). Current mode approach has enabled the operation of the FPAA presented here, over almost three decades of frequency range. We have demonstrated the feasibility of the FPAA by implementing some signal processing functions.     

基于可编程模拟器件的信号发生器

介绍了TRAC完全可重配置模拟器件和及其开发应用软件，并以此为基础设计了信号发生器，给出了设计图纸和仿真结果，该信号发生器性能稳定，不需要调试。     

Optimization Technique for Dynamic Reconfiguration of Programmable Analog/Digital Arrays

This paper presents an investigation of dynamically reconfigurable mixed-signal circuit constructed using a digital control system and the new technology of Field Programmable Analog Arrays (FPAA). A Motorola FPAA described in this paper can be used to build filters for analog signals as well as other kinds of analog applications implemented in switched capacitor technology (S/C-technology). The experimental studies described, take advantage of performance and programmability of the FPAA for filtering of an analog signal. The circuit structure is based on 2 parallel FPAA chips, analog multiplexer and multiplexer's control logic controlled by a digital system such as a PC or a Field Programmable Gate Array (FPGA). Dynamic reconfiguration is used in this system for adaptive filtering, or adaptive processing in general. Modeling and measurements of the transition behavior of the switching process between the 2 FPAA chips and analysis of limitations imposed by hardware imperfections will be presented. The experimental system assembled in this work is an excellent vehicle to learn about intricacies in performance of mixed-signal circuits and is used for verification of theoretical predictions and model validation/modification.     

The EPAC Architecture: An Expert Cell Approach to Field Programmable Analog Devices

This paper describes the architectural configuration and various design trade-offs of the Electrically Programmable Analog Circuit (EPAC^TM), an expert-cell approach to meeting the market needs for an analog counterpart to the digital FPGA. The paper provides an overview of the technology, discusses architectural issues, and describes the internal operation of the first commercial EPAC devices. The paper concludes with various application examples and performance measurements.     

面向多功能模拟信号处理的开关电流型可重构模拟电路研究

现有的离散时间型可重构模拟电路采用开关电容技术,存在功能有限、带宽低、与数字CMOS工艺不兼容等问题.本文提出了一种基于电流模取样数据技术的可重构模拟电路,能够与数字CMOS工艺技术兼容.设计了细粒度开关电流型可重构模拟单元,设计了面向开关电流型CAB互连的可编程网络结构.在4×2规模的可重构模拟阵列上,重构实现了三个...     

A Field-Programmable Analog Array of 55 Digitally Tunable OTAs in a Hexagonal Lattice

This paper reports on a field-programmable analog array (FPAA) for high-frequency continuous-time analog filters. A rapid-prototyping hardware is presented, which implements a unique hexagonal lattice topology of 55 tunable ${rm G}_{rm m}$ cells for reconfigurable instantiation of ${rm G}_{rm m}{hbox{-}}{rm C}$ filters in a 0.13 $mu{hbox{m}}$ CMOS technology. The typical power dissipation is 70 mW at a 1.2 V supply. The chip structure allows intuitive mapping of ${rm G}_{rm m}{hbox{-}}{rm C}$ filter schematics with up to seven independent nodes, immediate download to the hardware, and evaluation on the working prototype. Implementations of first- and second-order low-pass and sixth-order bandpass filters are presented and show the feasibility of the array for frequencies up to the order of one hundred MHz.      

基于运放和模拟开关的可编程放大器实验设计

可编程放大器是电子测量常用器件,可扩大输入信号的量程范围。单片可编程放大芯片集成度高、价格不菲,学生对其内部结构了解甚少。实验采用通用运放和模拟开关实现4级量程可编程放大。学生通过实验可更好地理解可编程放大器工作原理,有益于提高学生工程实践创新能力,拓展了实验教学的深度与广度。实验电路成本低、工作稳定,可作为应急方案用于大学生电子设计竞赛等场景。     

Filter Design Using a New Field-Programmable Analog Array (FPAA)

We present a voltage mode switched-capacitor Field ProgrammableAnalog Array (FPAA) to be used to implement various filter structures.The FPAA consists of uniform configurable analog blocks (CABs)allowing implementation of different functions. Each CAB consistsof two back-to-back connected inverting and non-inverting strays-insensitiveswitched-capacitor integrators. The interconnection between CABsis implemented by switched and unswitched capacitor networks.The internal structure of CABs and the interconnection betweendifferent CABs are configured by user-programmable digital controlsignals. The functionality of the FPAA is demonstrated throughembedding of different types of filters along with simulationresults.     

FPAA的音频滤波器设计实例

基于开关电容的现场可编程模拟阵列(FPAA)是最近发展起来的新的模拟技术。以AN221E04芯片为切入点介绍了FPAA的硬件结构及其相应的EDA软件AnadigmDesigner2。给出一个应用实例并阐明了FPAA的一般设计方法。     

Net-Sensitivity-Based Optimization of Large-Scale Field-Programmable Analog Array (FPAA) Placement and Routing

Modern advances in reconfigurable technologies are allowing analog circuit designers to benefit from the computational flexibility provided by large-scale field-programmable analog arrays. With the component density of these devices, small analog circuits, as well as larger analog systems, can be synthesized and tested in a shorter time and at a lower cost, compared with the full design cycle. However, automated development platforms and computer-aided design tools for these devices are far fewer than the physical synthesis tools for their digital counterparts. One of the major reasons for this is the considerably higher impact of interconnect parasitics on circuit functionality in the analog domain; therefore, performance optimization must be recognized as an indispensable step of the analog physical synthesis flow. Our goal in this brief is to present a physical synthesis framework with an optimization core and an integrated simulation environment for verification of the synthesis results. Although SPICE has been used as the simulation tool for our experiments, there is no dependency on a particular circuit simulator. Our synthesis tool currently accepts SPICE netlists as input and gives priority to user-specified metrics when optimizing the synthesized circuit performance. Experimental results demonstrate the effectiveness of our approach.     

交叉偶极阵列声波测井仪模拟通道电路设计

针对交叉偶极阵列声波测井仪高温、强背景噪声的作业环境,采用模拟滤波、低噪声设计和优化的布局布线等技术设计交叉偶极前置模拟通道电路,以实现声波信号接收、波形模式选择、程控增益放大、有源带通滤波等功能.该文详细地阐述了如何抑制高频噪声干扰以及降低电路自身的噪声影响,着重分析和介绍了低噪声前置预放大电路和有源带通滤波器的设计...     

一种基于零阶谐振特性的新型微带阵列天线

设计了一种中心频率在2．45GHz的新型零阶谐振微带阵列天线。该天线由4个谐振单元级联组成,可形成有耗的零阶谐振结构。其测量结果表明：在中心频率为2．45GHz时,其电压反射系数达到了－32dB,对应的带宽为1．5％,增益达到10．8dBi,相对于单个贴片天线增加了5．6dB,与仿真结果吻合较好。与一般的微带阵列天线相比,其尺寸减小,性能提高,在微波能量传输和目标探测等领域具有良好的应用前景。