基于区组设计的具有仲裁的无条件安全认证码的构造

本文借助区组设计给出一类具有仲裁的无条件安全认证码的构造方法,并给出一种安全的无条件安全认证码的构造方法,计算了有关参数。     

基于双仲裁机制和田口正交法的猫群优化任务调度算法

针对异构计算系统任务调度过程中通信冲突以及算法运行时间的问题,该文提出一种基于双仲裁机制和田口正交法的猫群优化任务调度算法。首先利用双仲裁机制对任务资源进行管理,动态判决任务的分配,有效避免通信冲突,再将田口正交法应用到猫群优化过程的跟踪模式中,降低算法运行时间,提高解的质量。实验结果表明,该算法运行速度明显高于其他算法至少约10%,算法在处理大量任务时的并行化效果最优,在异构环境中也体现出其相当大的优势。     

Analog State Transmission with Digital Hardware

A novel strategy for analog state transmission providing a large number of analog channels is presented. The total bandwidth of a digital asynchronous bus is dynamically divided by a large number of separate channels using relatively simple modulation and arbitration circuitry. The concept introduces several interesting aspects like random quantization noise, good scaling capabilities and low area consumption. The feasibility of the method has been proven by measurements on a working chip implementation.     

一种FIFO队列的总线仲裁器的设计

本文基于总线仲裁机制和常用的仲裁协议提出了一种混合优先级仲裁算法,和队列相结合的总线仲裁的解决方法,这种设计方法即保证了高优先级主设备的优先性,又保证了其他主设备的公平性,同时也避免了“死锁”和“饥饿”现象。本文详细介绍了此算法的设计过程和仿真结果。     

基于FIFO队列的PCI总线仲裁器的设计与FPGA实现

系统地论述了PCI总线的仲裁机制和常用仲裁协议,简要地分析了常用仲裁协议的优缺点,并在此基础上介绍了一种基于循环优先级仲裁协议和FIFO队列相结合的PCI总线仲裁器的实现方法,旨在解决目前PCI总线仲裁协议中由于优先级循环出现的特权插队问题,并详细说明了基于循环优先级仲裁协议与FIFO队列相结合的总线仲裁器的设计和FPGA硬件实现。     

Matching From the First Iteration: An Iterative Switching Algorithm for an Input Queued Switch

An iterative switching algorithm for an input queued switch consists of a number of iterations in every time step, where each iteration computes a disjoint matching. If input is matched to output in a given iteration, a packet (if any) is forwarded from to in the corresponding time step. Most of the iterative switching algorithms use a request grant accept (RGA) arbitration type (e.g. iSLIP). Unfortunately, due to this particular type of arbitration, the matching computed in one iteration is not necessarily maximal (more input and output ports can still be matched). This is exactly why multiple iterations are needed. However, multiple iterations make the time step larger and reduce the speed of the switch. We present a new iterative switching algorithm (based on the RGA arbitration) called with the underlying assumption that the number of iterations is possibly limited to one, hence reducing the time step and allowing the switch to run at a higher speed. We prove that achieves throughput and delay guarantees with a speedup of 2 and one iteration under a constant burst traffic model, which makes as good as any maximal matching algorithm in the theoretical sense. We also show by simulation that achieves relatively high throughput in practice under uniform and non-uniform traffic patterns with one iteration and no speedup.     

Distributed protocols for access arbitration in tree-structuredcommunication channels

The problem of arbitrating access to a tree-structured communication channel, with large geographic extent, providing multipoint communication among a set of terminals, is considered. Terminals transmit information in bursts consisting of many packets and compete for the right to transmit bursts. In the simplest case, the channel allows only one terminal to transmit at a time; this can be extended to k concurrent transmitters. Two general approaches are identified. The first is based on the idea of transmit permits or tokens; that is, a terminal must have explicit permission to transmit before starting a burst. The second approach allows terminals to transmit whenever the number of bursts they can observe from their vantage point is less than the limiting number; the network then performs arbitration internally, possibly aborting some bursts in the process, to prevent too many bursts from being active on a link at one time. Several specific access arbitration algorithms based on these approaches are presented and assessed     

Programmable semantic parsing approach for mimic arbitration

Aiming at the application of mimic arbitration,a programmable semantic parsing approach for mimic arbitration was proposed.Based on the idea of matching lookup table,this method could achieve custom protocol parsing through domain pointer configuration,and solve the problem of programmable protocol parsing for different protocols.By adopting pipeline control method,the congestion free in the procedure of protocol parsing was guaranteed and the performance of protocol parsing was improved.By introducing Hash operation,the complexity of semantic reordering design of sub-packages was simplified.The performance analysis results show that this approach has the characteristics of high flexibility protocol parsing,high processing capacity and low resource utilization.     

Performance Analysis of Arbitration Policies for SoC Communication Architectures

As technology scales toward deep submicron, the integration of a large number of IP blocks on the same silicon die is becoming technically feasible, thus enabling large-scale parallel computations, such as those required for multimedia workloads. The communication architecture is becoming the bottleneck for these multiprocessor Systems-on-Chip (SoC), and efficient contention resolution schemes for managing simultaneous access requests to the shared communication resources are required to prevent system performance degradation. The contribution of this work is to analyze the impact on multiprocessor SoC performance of different bus arbitration policies under different communication patterns, showing the distinctive features of each policy and the strong correlation of their effectiveness with the communication requirements of the applications. Beyond traditional arbitration schemes such as round robin and TDMA, another policy is considered that periodically allocates a temporal slot for contention-free bus utilization to a processor which needs fixed predictable bandwidth for the correct execution of its time-critical task. The results are derived on a complete and scalable multiprocessor SoC simulation platform based on SystemC, whose software support includes a complete embedded multiprocessor OS (RTEMS). The communication architecture is AMBA compliant, and we exploit the flexibility of this multi-master commercial standard, which does not specify the arbitration algorithm, to implement the explored contention resolution schemes.     

Distributed arbitration scheme for on-chip CDMA bus with dynamic codeword assignment

Several code-division multiple access (CDMA)-based interconnect schemes have been recently proposed as alternatives to the conventional time-division multiplexing bus in multicore systems-on-chip. CDMA systems with a dynamic assignment of spreading codewords are particularly attractive because of their potential for higher bandwidth efficiency compared with the systems in which the codewords are statically assigned to processing elements. In this paper, we propose a novel distributed arbitration scheme for dynamic CDMA-bus-based systems, which solves the complexity and scalability issues associated with commonly used centralized arbitration schemes. The proposed arbitration unit is decomposed into multiple simple arbitration elements, which are connected in a ring. The arbitration ring implements a token-passing algorithm, which both resolves destination conflicts and assigns the codewords to processing elements. Simulation results show that the throughput reduction in an optimally configured dynamic CDMA bus due to arbitration-related overheads does not exceed 5%.     

基于分组机制的位仲裁查询树防碰撞算法

提出了一种基于分组机制的位仲裁查询树(GBAQT, bit arbitration query tree based on grouping mechanism)算法。该算法根据标签ID自身特征分组,采用3位仲裁位来取代传统1位仲裁识别标签的方式,通过碰撞位信息得到传输数据,从而能避免一些空闲时隙。算法的性能分析和仿真结果表明,GBAQT防碰撞算法具有较少的总时隙数,系统效率和时隙利用率也明显优于其他算法。     

Input queueing multicast ATM packet switch with two priorityclasses using a priority scheme with a window policy

To achieve a high performance multicast switch with multiple priority classes, we have proposed a new N×N input queuing technique which uses a novel priority scheme and a high-performance arbitration algorithm. The scheme uses a priority without iteration (POI) method and a pipeline arbitration. Simulation results show that this scheme improves the performance of delay critical services and it can give almost the same performance as that which uses a priority with iteration (PWI) method     

A transparent MAC method for bandwidth sharing and CDV control atthe ATM layer of passive optical networks

In the quest for a way to bring local loop costs down and make B-ISDN affordable to small traffic customers, the passive optical networks (PONs) in combination with ATM (APONs) have been investigated extensively. To achieve the required medium sharing on a time division multiplexing (TDMA) basis, an arbitration mechanism is required in the upstream direction. The resulting multiplexing and concentration, though it is the source of significant savings, it has been plagued by the penalty of high distortion of the traffic profiles at the exit of the PON. The preventive congestion control method of ATM is rather intolerant of such distortions in the multiplexing stages. Arbitration methods which are either semistatic or based on number of arrivals per reservation period, cause very high cell delay variation (CDV). The cell clustering introduced by the arbitration method cannot be distinguished from peak rate violations of the contract by the policing unit. The result is either unwarranted rejections of conforming cells or unacceptably low utilization. The scheme presented herewith maintains a CDV behavior comparable to that of a common centralized FIFO multiplexer. It relies on a meticulous recording of the arrival timing of cells enabling a subsequent allocation of slots which produces almost the same output (and CDV) as the centralized FLFO multiplexer. A compact coding of the timing information restricts bandwidth waste for control information to the size found in other similar protocols. The most important feature is that the scheme is amenable to easy hardware implementation and does not require any call related information     

一款嵌入式芯片总线仲裁器的设计和评估

针对片上系统(SoC)总线设计中仲裁机制的选取往往局限于抽象的定性分析,以一款嵌入式处理器芯片为设计平台,实现了固定优先级、轮转优先级和混合优先级的仲裁电路设计,并建立了仿真测试平台,通过仿真对总线主设备的总线占有率、最差等待响应时间进行了定量分析比较,得出了混合优先级仲裁机制较单一的固定优先级与轮转优先级仲裁机制在体现公平性与优先性上更有效的结论,对其他嵌入式系统总线的仲裁设计与改进提供了很好的参考.     

脉冲神经网络硬件互连系统的动态优先级仲裁策略

本文基于EMBRACE脉冲神经网络硬件实现方案提出了一种片上网络路由器的动态优先级仲裁策略,来解决脉冲神经网络脉冲传输的交通负载非均衡问题.该方案使用二维网格片上网络系统实现神经元之间的互连通讯,其基于脉冲发送频率的动态优先级仲裁策略能够降低高频路径的平均延迟及系统丢包风险,提高系统工作稳定性.使用Noxim片上网络模拟器搭建实验平台,测试结果表明采用提出的动态优先级仲裁策略较轮询及固定优先级仲裁器,高频路径延迟平均降低32.33%和34.69%,降低幅度最大达到84.86%和86.20%.在90nm CMOS工艺下,提出的路由器架构硬件面积为213,471μm²,具有较好的扩展性.     

Exhaustive Output Arbitration of Input Buffered Switch with Buffered Crossbar

We propose a new arbitration method for an input buffered switch with a buffered crossbar. In the proposed method, an exhaustive polling method is used to decrease the synchronization. Using an approximate analysis, we explain how the proposed method improves the switch performance. Also, using computer simulations, we show the proposed method outperforms the previous methods under burst traffic.     

签密的仲裁安全与仲裁安全的签密方案

签密能高效地同时完成数据加密与认证,可用于设计紧凑的安全通信协议.签密中的仲裁机制用于保护签密的不可抵赖性,但同时用于仲裁的信息可能危及协议安全.本文指出签密仲裁中存在仲裁者解密攻击和仲裁机制无法保护明文完整性两种安全隐患,归纳其原因并指出解决方法.提出一个可安全仲裁的安全混合签密方案SASC,并在随机预言机模型下证明SASC方案具有IND-CCA2和UF-CMA安全性;SASC基于明文仲裁,不仅能维护明完整性而且能抵抗仲裁者解密攻击.SASC方案不增加计算量和通信量,且对明文的长度没有限制.     

Landmark Decision on Arbitral Immunity: The Risk of Sanctions for Lawsuits Against Arbitrators

Most international arbitration rules provide that an arbitrator and the arbitral institution shall not be liable for any act or omission in connection with any arbitration conducted under the rules.     

Fast ping‐pong arbitration for input–output queued packet switches

Input–output queued switches have been widely considered as the most feasible solution for large capacity packet switches and IP routers. In this paper, we propose a ping‐pong arbitration scheme (PPA) for output contention resolution in input–output queued switches. The challenge is to develop a high speed and cost‐effective arbitration scheme in order to maximize the switch throughput and delay performance for supporting multimedia services with various quality‐of‐service (QoS) requirements. The basic idea is to divide the inputs into groups and apply arbitration recursively. Our recursive arbiter is hierarchically structured, consisting of multiple small‐size arbiters at each layer. The arbitration time of an n‐input switch is proportional to log₄?n/2? when we group every two inputs or every two input groups at each layer. We present a 256×256 terabit crossbar multicast packet switch using the PPA. The design shows that our scheme can reduce the arbitration time of the 256×256 switch to 11 gates delay, demonstrating the arbitration is no longer the bottleneck limiting the switch capacity. The priority handling in arbitration is also addressed. Copyright © 2001 John Wiley & Sons, Ltd.     

一种可综合的轮换仲裁控制器设计

Round-robin算法是一种简易，有效的公平仲裁方法。文章介绍了一种改进的算法原理，给出证明。最后给出了此种算法的电路实现方案。