A high speed small scale signal processor

A very compact digital signal procesor is described, which has a specialized architecture for computing some signal processing algorithms. The system has a single-chip arithmetic unit in LSI technology performing multiplication and accumulation. A simple microprogram control is used that works with a clock rate of 10 MHz. The paper gives a short microprogram example and some characteristic execution times.     

Code Optimization Techniques in Embedded DSP Microprocessors

We address the problem of code optimization for embedded DSP microprocessors. Such processors (e.g., those in the TMS320 series) have highly irregular datapaths, and conventional code generation methods typically result in inefficient code. In this paper we formulate and solve some optimization problems that arise in code generation for processors with irregular datapaths. In addition to instruction scheduling and register allocation, we also formulate the accumulator spilling and mode selection problems that arise in DSP microprocessors. We present optimal and heuristic algorithms that determine an instruction schedule simultaneously optimizing accumulator spilling and mode selection. Experimental results are presented.     

基于Gabor变换的一种有效的图像水印技术

在大量实验的基础上,提出了一种基于离散Gabor变换（DGT）的强数字水印实现技术.将数字水印信息隐藏在DGT的低频系数中,在水印的检测算法中采用了几何变换及与其相配套的匹配技术,将有几何形变的图像反变换恢复,再通过DGT进行检测.所提出的方法采用综合性水印测试软件StirMark 4.0进行了大量的模拟攻击实验,在几乎所有的实验中检测算法都成功地检测到隐含于数字图像数据中的水印信息,表明所提出方法具有很好的鲁棒性及高效性能.     

用于语音分析的实值离散GABOR变换

提出了语音信号的快速实值离散Gabor变换（RDGT）方法,讨论了由RDGT系数计算语音复谱图值、语谱图生成和语音信号的快速重建问题。并给出了实例。     

EDMA数据传输方式在基于DSP的视频信号处理系统中的应用

视频信号传输是视频信号处理系统的关键技术,文章介绍利用EDMA数据传输方式、在基于TI公司的数字信号处理器(DSP)TMS320C6713芯片的视频信号处理系统中实现视频数据信号高速传输的一种方案。介绍了方案中的DSP外部储存器接口与FIFO存储器的硬件接口设计,并着重描述了基于EDMA数据传输方式的实现方法和软件设计流程。利用EDMA在CPU后台高效地实现存储空间的数据搬移,并在EDMA中断服务程序中对视频数据信号进行处理,DSP的中央处理单元就能够专注于信号处理和系统功能控制,从而满足视频信号处理系统的高速实时性要求。     

A practical method of coefficient computation for a microprocessor-controlled variable recursive digital filter

The synthesis of general-type recursive digital filters from analog prototypes may require complicated computations not suitable for filter structures where the coefficients are to be evaluated by a microprocessor control unit. A general synthesis procedure suitable for the application to such structures is described and some design examples are reported.     

二维实值离散Gabor变换与DCT在图像编码中性能的比较

介绍了二维实值离散Gabor变换(RDGT)的快速算法,并着重探讨了二维实值离散Gabor变换与二维离散余弦变换在图像编码中的性能及差异.     

基于DWT的同步数字音频盲水印算法研究

文中提出了一种基于离散小波变换的同步数字音频盲水印算法．嵌入的水印为视觉上可辨的二值图像．算法中引入了嵌入同步信号的思想，利用同步信号定位水印的嵌入位置，为了提高信号的鲁棒性，把同步信号与水印隐藏在DWT域的低频系数中；同时，检测水印时不需要原始音频．仿真实验表明：所提出的方法具有较强的鲁棒性和不可感知性，并能有效抵御各种常见攻击．     

A VLSI architecture for the real time computation of discrete trigonometric transforms

The Discrete Trigonometric Transforms are defined as a class of transforms. An algorithm for calculating the Discrete Fourier Transform is extended to cover all members of the defined class. A VLSI architecture which provides for real time calculation of these transforms is presented. This architecture provides simple interconnections, identical processing elements and minimal control complexity.     

心电信号处理中的数字滤波器的设计

心电信号是一种基本的人体信号,其中常带有肌电干扰、基线漂移和工频干扰等各种噪声,为了得到不失真的原始心电信号,在显示信号前要进行必要的滤波预处理.介绍了处理ECG信号中滤波器的设计,包括去除噪声的低通、高通和带阻滤波器.     

一种新型基于提升算法的二维离散小波变换结构的实现

在提升算法原理分析的基础上,设计出一种采用提升算法的二维离散小波变换结构,改变了传统的提升算法先行后列的运算方式,将行列运算操作结合起来进行,这样,相比于传统结构,在基本不增加硬件单元的前提下,变换时间减小为原来的75％左右,提高了硬件效率。     

VLSI Architecture for Forward Discrete Wavelet Transform Based on B-spline Factorization

Based on B-spline factorization, a new category of architectures for Discrete Wavelet Transform (DWT) is proposed in this paper. The B-spline factorization mainly consists of the B-spline part and the distributed part. The former is proposed to be constructed by use of the direct implementation or Pascal implementation. And the latter is the part introducing multipliers and can be implemented with the Type-I or Type-II polyphase decomposition. Since the degree of the distributed part is usually designed as small as possible, the proposed architectures could use fewer multipliers than previous arts, but more adders would be required. However, many adders can be implemented with smaller area and lower speed because only few adders are on the critical path. Three case studies, including the JPEG2000 default (9, 7) filter, the (6, 10) filter, and the (10, 18) filter, are given to demonstrate the efficiency of the proposed architectures.Chao-Tsung Huang was born in Kaohsiung, Taiwan, R.O.C., in 1979. He received the B.S. degree from the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C., in 2001. He currently is working toward the Ph.D. degree at the Graduate Institute of Electronics Engineering, National Taiwan University. His major research interests include VLSI design and implementation for signal processing systems.Po-Chih Tseng was born in Tao-Yuan, Taiwan in 1977. He received the B.S. degree in Electrical and Control Engineering from National Chiao Tung University in 1999 and the M.S. degree in Electrical Engineering from National Taiwan University in 2001. He currently is pursuing the Ph.D. degree at the Graduate Institute of Electronics Engineering, Department of Electrical Engineering, National Taiwan University. His research interests include VLSI design and implementation for signal processing systems, energy-efficient reconfigurable computing for multimedia systems, and power-aware image and video coding systems.Liang-Gee Chen received the B.S., M.S., and Ph.D. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, R.O.C., in 1979, 1981, and 1986, respectively.In 1988, he joined the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C. During 1993–1994, he was a Visiting Consultant in the DSP Research Department, AT&T Bell Labs, Murray Hill, NJ. In 1997, he was a Visiting Scholar of the Department of Electrical Engineering, University of Washington, Seattle. Currently, he is Professor at National Taiwan University, Taipei, Taiwan, R.O.C. His current research interests are DSP architecture design, video processor design, and video coding systems.Dr. Chen has served as an Associate Editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY since 1996, as Associate Editor of the IEEE TRANSACTIONS ON VLSI SYSTEMS since 1999, and as Associate Editor of IEEE TRANSACTIONS CIRCUITS AND SYSTEMS II since 2000. He has been the Associate Editor of the Journal of Circuits, Systems, and Signal Processing since 1999, and a Guest Editor for the Journal of Video Signal Processing Systems. He is also the Associate Editor of the PROCEEDINGS OF THE IEEE. He was the General Chairman of the 7th VLSI Design/CAD Symposium in 1995 and of the 1999 IEEE Workshop on Signal Processing Systems: Design and Implementation. He is the Past-Chair of Taipei Chapter of IEEE Circuits and Systems (CAS) Society, and is a member of the IEEE CAS Technical Committee of VLSI Systems and Applications, the Technical Committee of Visual Signal Processing and Communications, and the IEEE Signal Processing Technical Committee of Design and Implementation of SP Systems. He is the Chair-Elect of the IEEE CAS Technical Committee on Multimedia Systems and Applications, During 2001-2002, he served as a Distinguished Lecturer of the IEEE CAS Society. He received the Best Paper Award from the R.O.C. Computer Society in 1990 and 1994. Annually from 1991 to 1999, he received Long-Term (Acer) Paper Awards. In 1992, he received the Best Paper Award of the 1992 Asia-Pacific Conference on circuits and systems in the VLSI design track. In 1993, he received the Annual Paper Award of the Chinese Engineer Society. In 1996 and 2000, he received the Outstanding Research Award from the National Science Council, and in 2000, the Dragon Excellence Award from Acer. He is a member of Phi Tan Phi.     

一种基于余数的小波域二值图像水印算法

利用小波变换域中人眼的视觉特性，提出了一种提取水印时不需要原始图像的数字图像水印算法。给出了一种基于余数的水印嵌入公式，并研究了算法中的参数估计。仿真表明，这种算法实现简单，能较好地平衡数字水印不可见性和稳健性的要求。     

一种基于平稳小波变换的盲水印嵌入算法

为了解决一般数字水印算法无法在水印鲁棒性和不可感知性之间达到较好平衡的问题,提出一种基于平稳小波变换的盲水印嵌入算法.不同于常见的基于离散小波变换(DWT)的数字水印技术,该方案先对原始图像进行一级平稳小波变换(SWT),再将得到的低频近似区域进行8×8分块,从每个分块中选择一个嵌入位嵌入水印.通过计算所有嵌入位数值的平均值,并比较每个嵌入位数值和平均值的大小关系,计算得到密钥,利用密钥实现了水印的盲检测.实验结果表明,提出的盲水印算法不但具有较好的保真度,对于各种攻击也具有较强的鲁棒性.     

Implementation of RNS-Based Distributed Arithmetic Discrete Wavelet Transform Architectures Using Field-Programmable Logic

Currently there are design barriers inhibiting the implementation of high-precision digital signal processing (DSP) objects with field programmable logic (FPL) devices. This paper explores overcoming these barriers by fusing together the popular distributed arithmetic (DA) method with the residue number system (RNS) for use in FPL-centric designs. The new design paradigm is studied in the context of a high-performance filter bank and a discrete wavelet transform (DWT). The proposed design paradigm is facilitated by a new RNS accumulator structure based on a carry save adder (CSA). The reported methodology also introduces a polyphase filter structure that results in a reduced look-up table (LUT) budget. The 2C-DA and RNS-DA are compared, in the context of a FPL implementation strategy, using a discrete wavelet transform (DWT) filter bank as a common design theme. The results show that the RNS-DA, compared to a traditional 2C-DA design, enjoys a performance advantage that increases with precision (wordlength).     

用子波网络实现自适应子波变换

本文从傅里叶变换（ＦＴ）的角度引入连续和离散自适应于波变换（ＷＴ）,作为应用,在数学上比较子耳,眼功能和连续ＷＴ,以给人工神经网络（ＡＮＮ）提供多分辨率分析（ＭＲＡ）并行输入,这种七妙的预处理可以实现特征保持的数据压缩,避免过训练或地拟合对ＡＮＮ概括和抽象能力的影响。这可以用来解释嘈杂鸡尾酒会效应。一个例子是,对Ｎ个数据要求有Ｎ阶阶复杂性快速数据压缩的多波段红外图像,引入离散ＷＴ作为完备,正交和归     

基于多分辨率分解的数字水印技术

本文提出一种基于多分辨率分解的数字水印技术.利用多分辨率分解技术,相同分辨率层次的灰度级数字水印嵌入到对应的相同分辨率层次的原始静态图像之中,使水印对原始图像具有自适应性.由于水印的嵌入过程是基于原始图像的不同分辨率层次之间的关系,所以水印的提取过程不需要原始图像.实验结果表明本文提出的数字水印技术,经某些图像处理操作和JPEG有损压缩后仍是鲁棒的.     

A Wideband Wavelet Based Estimator Correlator and its Properties

Maximum likelihood detectors of narrowband, non-stationary random echos in Gaussian noise can be efficiently implemented in the time-frequency domain. When the transmitted signals have large time-bandwidth products, the natural implementation of estimators and detectors is in the time-scale or wavelet transform domain. This paper presents a wideband wavelet transform domain implementation of an estimator-correlator (EC) detector and details the components of this processor, including weighted wavelet transforms and cascaded scattering functions. Key properties associated with this wavelet based wideband EC are also presented. The theoretical developments of the processor are based on group theory which provides a unified approach to detector development for both narrowband and wideband processors. The group theoretic concepts provide a powerful analysis tool for complex signal processing problems.     

一种用于版权保护的音频数字水印算法

研究了一种基于小波变换的音频数字水印算法,水印为一幅二值图像,仿真实验表明该算法具有较强的稳健性,可用于数字音产品的版权保护。     

Fast mersenne number transforms for the computation of discrete fourier transforms

In this paper we present results on the computation of Discrete Fourier Transforms (DFT) using Mersenne Number Transforms (MNT). It is shown that in the case of Mersenne-composite Number Transforms, the number of multiplications per point for real input data is never more than one, even for sequence lengths exceeding one thousand points. The computation time per point for a length (2P + 1)-point DFT is simply equal to the time for one MNT multiplication and 3 MNT additions if a high-speed, parallel hardware module is used to implement the MNT unit. This new approach allows a large choice of wordlengths and in addition the control of data flow is extremely simple. We also present the results obtained by using Winograd's Fourier Transform Algorithm and the nested MNT to compute efficiently the DFT's of long sequences. We also show that the number of additions can be reduced significantly if Pseudo Mersenne-Number Transforms are used for the computation of DFTs.