An integrated CMOS micromechanical resonator high-Q oscillator

A completely monolithic high-Q oscillator, fabricated via a combined CMOS plus surface micromachining technology, is described, for which the oscillation frequency is controlled by a polysilicon micromechanical resonator with the intent of achieving high stability. The operation and performance of micromechanical resonators are modeled, with emphasis on circuit and noise modeling of multiport resonators. A series resonant oscillator design is discussed that utilizes a unique, gain-controllable transresistance sustaining amplifier. We show that in the absence of an automatic level control loop, the closed-loop, steady-state oscillation amplitude of this oscillator depends strongly upon the dc-bias voltage applied to the capacitively driven and sensed μresonator. Although the high-Q of the micromechanical resonator does contribute to improved oscillator stability, its limited power-handling ability outweighs the Q benefits and prevents this oscillator from achieving the high short-term stability normally expected of high-Q oscillators     

Tournament-Shaped Magnetically Coupled Power-Combiner Architecture for RF CMOS Power Amplifier

A tournament-shaped magnetically coupled power-combiner architecture for a fully integrated RF CMOS power amplifier is proposed. Various 1 : 1 transmission line transformers are used to design the power combiner. To demonstrate the new architecture, a 1.81-GHz CMOS power amplifier using the tournament-shaped power combiner was implemented with a 0.18-mum RF CMOS process. All of the matching components, including the input and output transformer, were fully integrated. The amplifier achieved a drain efficiency of 38% at the maximum output power of 31.7 dBm.     

Power efficient Ka-band low phase noise VCO in 0.13 μm CMOS

A 27 GHz cross-coupled LC voltage controlled oscillator (VCO) using a standard 0.13 mum CMOS technology is presented. The VCO using a high-Q LC resonator with a micro-strip inductor (mu-strip L) provides a phase noise of -113 dBc/Hz at a 1 MHz offset frequency. The figure - of-merit (FoM) is -194.6 dBc/Hz. To obtain high output power, it also uses a common source amplifier as a buffer and it shows the output power of -3.5 dBm at an oscillation frequency of 26.89 GHz. This is believed to be the lowest phase noise and FoM with the highest output power of a millimetre-wave VCO in CMOS technology.     

A 300-/spl mu/W 1.9-GHz CMOS oscillator utilizing micromachined resonators

A low-power low-phase-noise 1.9-GHz RF oscillator is presented. The oscillator employs a single thin-film bulk acoustic wave resonator and was implemented in a standard 0.18-/spl mu/m CMOS process. This paper addresses design issues involved in codesigning micromachined resonators with CMOS circuitry to realize ultralow-power RF transceiver components. The oscillator achieves a phase-noise performance of -100 dBc/Hz at 10-kHz offset, -120 dBc/Hz at 100-kHz offset, and -140 dBc/Hz at 1-MHz offset. The startup time of the oscillator is less than 1 /spl mu/s. The oscillator core consumes 300 /spl mu/A from a 1-V supply.     

Phase Feedback for Nonlinear MEM Resonators in Oscillator Circuits

In this paper, a phase feedback approach for using nonlinear microelectromechanical (MEM) resonators in oscillator circuits is investigated. Phase feedback makes use of the oscillation phase condition for oscillator circuits and enables fine-tuning of the frequency at which the resonator oscillates by means of setting the phase in the feedback amplifier. The principle of the approach is illustrated for a nonlinear Duffing resonator, which is representative of many types of MEM resonators. Next, the approach is applied to an electrostatically actuated nonlinear clamped–clamped beam MEM resonator, on simulation level. Phase feedback allows for operation of the resonator in its nonlinear regime. The closed-loop technique enables control of both the frequency of oscillation and the output power of the signal. Additionally, optimal operation points for oscillator circuits incorporating a nonlinear resonator can be defined. Application of phase feedback results in more robustness with respect to dynamic pull in than in open-loop case, however, at the cost of a deteriorated phase noise response.      

A K-band monolithic oscillator integrated with a buffer amplifierusing a device-circuit interaction design concept

We report on a high power, high efficiency, and small-size monolithic coplanar waveguide oscillator incorporating a single-stage buffer amplifier on the same chip. For the oscillator design, by changing RF current level through the device, the optimum load line was chosen in order to have an oscillation frequency insensitive to the effect of the subsequently connected amplifier, based on a device-circuit interaction concept. The amplifier, on the other hand, which was driven directly by the oscillator, was designed to achieve an overall high power and high efficiency operation. At 21 GHz, the output power of the developed chip recorded 17 dBm with an overall DC-RF efficiency of 22%. By changing the length of a source feedback line, the oscillation frequency was varied from 21 GHz to 26 GHz. For all cases, the output power remained higher than 16 dBm     

SAW Oscillators In UHF Transit Satellite Links

A 375-MHz surface-acoustic-wave (SAW) resonator controlled oscillator was developed for application in the Transit satellite marine navigation system. The SAW oscillator, in a 2-in/sup 3/ hybrid package, contains a heater, voltage regulator, and divider and is a direct replacement for a bulk wave oscillator and its multiplier chain. A short term stability of 2E - 10 and an aging rate of 3E - 8/day were achieved at 75°C. Comparison tests showed that the accuracy of the navigation system with the SAW oscillator was equivalent to the accuracy using the bulk oscillator.     

用于315/433MHz超再生接收机的射频前端关键技术

采用0.5μm CMOS工艺实现了用于315/433MHz超再生无线接收机的射频前端电路,包括射频放大器和超再生振荡器。文中提出了一种改进型有源电感,提高了射频放大器中谐振回路的品质因数。阐述了振荡器的自偏置效应以及振荡器输出信号幅度和电流源的关系,在此基础上实现了适用于包络检波的差分结构超再生振荡器。测试结果显示,电源电压范围为2.5V~5V,电流小于2.5mA,系统接收灵敏度优于-90dBm。     

Millimeter-wave CMOS circuit design

We have developed a 27- and 40-GHz tuned amplifier and a 52.5-GHz voltage-controlled oscillator using 0.18-mum CMOS. The line-reflect-line calibrations with a microstrip-line structure, consisting of metal1 and metal6, was quite effective to extract the accurate S-parameters for the intrinsic transistor on an Si substrate and realized the precise design. Using this technique, we obtained a 17-dB gain and 14-dBm output power at 27 GHz for the tuned amplifier. We also obtained a 7-dB gain and a 10.4-dBm output power with a good input and output return loss at 40 GHz. Additionally, we obtained an oscillation frequency of 52.5 GHz with phase noise of -86 dBc/Hz at a 1-MHz offset. These results indicate that our proposed technique is suitable for CMOS millimeter-wave design     

基于电增益环腔选频特性的小型光电振荡器

为了进一步提高光电振荡器的实用性,提出了一种基于耦合型电增益环腔的小型化光电振荡器。利用电功分器和放大器构成电增益环腔,其梳状滤波效应可以有效对光电振荡器进行模式选择,结合直接调制半导体激光器,单模光纤和光电检测器,有效实现了小型化光电振荡器。理论上分析了电增益环腔的基本原理,并且通过仿真进行了验证。实验中获得了中心频率为12.624 GHz的微波信号,其相位噪声为-102 dBc/Hz@10 kHz。该方案在结构简单的条件下可以得到质量较高的射频信号,可以作为光电振荡器实用化的一种解决方法。     

声表面波阅读器的发射链路设计与实现

在声表面波射频识别系统的实现过程中,性能稳定的阅读器发射链路不可或缺.在典型发射链路结构的基础上进行改进,设计了声表面波阅读器的发射链路.其改进结构采用零中频调制原理,通过射频开关实现了发射信号的调制和收发隔离,省略了上变频电路和环形器,在简化电路的同时减小了干扰.对本振、功放、射频开关等重要的发射链路组成部分进行了研究,完成了发射链路各功能电路的模块化设计与制作,并通过实验对设计要求进行了验证.     

高性能声表面波调频振荡器的研究

分析了声表面波谐振器的性能 ,论述了声表面波振荡器的工作原理及设计方法 ,最终完成中心频率为797.3 MHz的振荡电路 ,调频带宽 2 MHz(2 5 0 0 PPM)。文中对影响调频带宽、相位噪声的因素进行了分析讨论。本项目研究成果已获得实际应用     

声表面波传感器中单端谐振器的匹配电路仿真

声表面波(SAW)传感器主要通过SAW延迟线及谐振器对各种物理量进行敏感。由于谐振器有很高的品质因数(Q),SAW谐振器特别适合无线无源测量。为了能有效地对无线信号进行应答,必须建立相应的匹配电路。基于SAW单端谐振器的等效电路,对单端谐振器的匹配电路进行仿真,并分析了匹配电路元件对谐振器频率特性的影响。仿真结果表明,在匹配电路中,电容对谐振频率的影响显著。     

采用金属耦合电容实现级间匹配的射频功率放大器

One challenge of the implementation of fully-integrated RF power amplifiers into a deep submicro digital CMOS process is that no capacitor is available,especially no high density capacitor.To address this problem,a two-stage class-AB power amplifier with inter-stage matching realized by an inter-metal coupling capacitor is designed in a 180-nm digital CMOS process.This paper compares three structures of inter-metal coupling capacitors with metal-insulator-metal（MIM） capacitor regarding their capacitor density.Detailed simulations are carried out for the leakage,the voltage dependency,the temperature dependency,and the quality factor between an inter-metal shuffled（IMS） capacitor and an MIM capacitor.Finally,an IMS capacitor is chosen to perform the inter-stage matching.The techniques are validated via the design and implement of a two-stage class-AB RF power amplifier for an UHF RFID application.The PA occupies 370 × 200 μm^2 without pads in the 180-nm digital CMOS process and outputs 21.1 dBm with 40% drain efficiency and 28.1 dB power gain at 915 MHz from a single 3.3 V power supply.     

CMOS realization of single-resistance-controlled and variable frequency dual-mode sinusoidal oscillators employing a single DVCCTA with all-grounded passive components

In this paper, two new designs are proposed for sinusoidal oscillators based on a single differential voltage current conveyor transconductance amplifier (DVCCTA). Each of the proposed circuits comprises a DVCCTA combined with passive components that simultaneously provides both voltage and current outputs. The first circuit is a DVCCTA-based single-resistance-controlled oscillator (SRCO) that provides independent control of the oscillation condition and oscillation frequency by using distinct circuit parameters. The second circuit is a DVCCTA-based variable frequency oscillator (VFO) that can provide independent control of the oscillation frequency by adjusting the bias current of the DVCCTA. In this paper, the DVCCTA and relevant formulations of the proposed oscillator circuits are first introduced, followed by the non-ideal effects, sensitivity analyses, frequency stability discussions, and design considerations. After using the 0.35-μm CMOS technology of the Taiwan Semiconductor Manufacturing Company (TSMC), the HSPICE simulation results confirmed the feasibility of the proposed oscillator circuits.     

Design of power-controlled class1 Bluetooth CMOS power amplifier

In this paper, an RF power amplifier intended for class 1 Bluetooth application is designed using 0.35 µm CMOS technology. A layout-aware macromodel for the BSIM3v3 MOSFET transistor for RF applications including substrate effect is investigated and used in this design. The model is validated for a 0.35 μm CMOS process using a transistor with total width of 90 μm and 18 fingers and it shows excellent agreement with the f_t and S-parameter measurement data up to 6 GHz. The effects of pads and bond wires are also taken into consideration during the design process of the PA. After post-layout simulations, the amplifier delivers an output power of 19 dBm with 33.7% PAE under 3.3 V supply. This amplifier has a power control feature; its two stage circuit utilizes a cascode configuration in its first stage in order to use its bias pin as a power control input for the amplifier. Using this method, the power control range can be decreased down to 1.4 dBm which satisfies the Bluetooth standard. The chip is fabricated and is currently under testing.     

Design and implementation of a CMOS VCXO for FM stereo decoders

A circuit technique to simulate large variable capacitance of both positive and negative polarities over a given frequency range is discussed. The simulated capacitance can be varied by voltage control from -60 to +100 pF. The capacitor-simulating circuit is connected in parallel with a resonator to tune its parallel resonance. An oscillator with grounded resonator is also developed. Together with the variable capacitor, a voltage-controlled crystal oscillator (VCXO) is realized. The oscillation frequency of the oscillator can be tuned continuously from 452 to 461 kHz by voltage control. Detailed analyses to completely characterize the oscillator with a simple expression are presented. The prototype of the VCXO has been fabricated in a 4-μm standard CMOS process     

A fully integrated, untrimmed CMOS instrumentation amplifier withsubmicrovolt offset

A low-noise CMOS instrumentation amplifier intended for low-frequency thermoelectric microsensor applications is presented that achieves submicrovolt offset and noise. Key to its performance is the chopper modulation technique combined with a bandpass filter and a matching on-chip oscillator. No external components or trimming are required. The achievable offset performance depends on the bandpass filter Q and the oscillator-to-bandpass filter matching accuracy. Constraints are derived for an optimum Q and a given matching accuracy. The improvement of common-mode rejection ratio (CMRR) in chopper amplifiers is discussed. The amplifier features a total gain of 77±0.3 dB and a bandwidth of approximately 600 Hz. The measured low-frequency input noise is 8.5 nV/√Hz and the input offset is 600 nV. The measured low-frequency CMRR is better than 150 dB. The circuit has been implemented in a standard 1-μm single-poly CMOS process     

ESD–RF co-design methodology for the state of the art RF-CMOS blocks

This paper describes an approach to design ESD protection for integrated low noise amplifier (LNA) circuits used in narrowband transceiver front-ends. The RF constraints on the implementation of ESD protection devices are relaxed by co-designing the RF and the ESD blocks, considering them as one single circuit to optimise. The method is applied for the design of 0.25 μm CMOS LNA. Circuit protection levels higher than 3 kV HBM stress are achieved using conventional highly capacitive ggNMOS snapback devices. The methodology can be extended to other RF-CMOS circuits requiring ESD protection by merging the ESD devices in the functionality of the corresponding matching blocks.     

Electrically Enhanced Readout System for a High‐Frequency CMOS‐MEMS Resonator

The design of a CMOS clamped‐clamped beam resonator along with a full custom integrated differential amplifier, monolithically fabricated with a commercial 0.35 μm CMOS technology, is presented. The implemented amplifier, which minimizes the negative effect of the parasitic capacitance, enhances the electrical MEMS characterization, obtaining a 48 × 10⁸ resonant frequency‐quality factor product (Q×f_res) in air conditions, which is quite competitive in comparison with existing CMOS‐MEMS resonators.