A systematic and unified approach to modeling PWM DC/DC convertersbased on the graft scheme

A systematic and unified approach to modeling pulsewidth modulated (PWM) DC/DC converters based on the graft scheme is presented in this paper. With the graft scheme, the typical PWM switch-mode converters, such as buck-boost, boost-buck (Cuk), Sepic, and dual Sepic, can be generated from the two basic converters, buck and boost. The small signal models of these converters can, therefore, be derived by properly combining those of the buck and boost. Using the proposed approach can help to yield highly related dynamic models of the converters in a family and, in addition, physical insights into the converters can be readily identified. This has made the proposed modeling method valuable and viable     

Application of the current-injected modeling approach toquasi-resonant converters

This paper describes how the current-injected (CI) method, which has been applied only to pulse-width modulation (PWM) DC-DC power converters, can be extended to quasi-resonant (QR) power converters. The methodology for extending this small-signal modeling approach is described in detail. It is also shown that QR dynamic models are easy to obtain since they are derived directly from PWM power converter models. These new models result in a unified block diagram from which zero-voltage-switching (ZVS) or zero-current-switching (ZCS) transfer functions of the basic topologies, such as buck, boost, and buck-boost operated in half-wave (HW) or full-wave (FW) modes, are found. As an application of this method, a ZVS boost power converter and ZCS boost power converter were fabricated and tested. In addition, small-signal models of these power converters were derived with the help of the state-space averaging (SSA) method. The agreement of the CI method simulations with the experimental results for the two QR power converters is comparable or better than that of the SSA method     

Modeling of single-stage converters with high power factor and fastregulation

This paper presents an approach to systematically model single-stage DC/DC converters operated in discontinuous conduction mode (DCM) based on the graft scheme. With the graft scheme, the active switches which are with a common node and operating in unison can be integrated to form a single stage converter (SSC). The small-signal models of the SSC can, therefore, be derived by combining those of its originally separate converters. Using the proposed approach can help yield highly related dynamic models of the converters in a family and, in addition, physical insights between the converters can be readily identified. Moreover, the expressions of the small-signal models for the SSCs operated in DCM can be extended to those in continuous-conduction-mode operation. These have made the proposed modeling method valuable and viable. Experimental measurements have demonstrated that the small-signal model of an SSC derived with the proposed approach is relatively accurate     

用开关电容网络改善DC-DC变换器性能的研究

将串并电容组合结构,极性反转开关电容网络和推挽开关电容网络和ｂｕｃｋ,ｂｏｏｓｔ,Ｃｕｋ及ｂｕｃｋ－ｂｏｏｓｔ等传统ＤＣ－ＤＣ变换器相结合,构成一系列新的变换器拓扑结构。理论分析和实验结果秀助于提高具有悬殊电压变化比的ＤＣ－ＤＣ变换器的工作频率和动态响应,还能拓宽变换器的电压变换范围。     

A systematic approach to developing single-stage soft switching PWMconverters

A systematic approach to developing soft switching PWM converters based on the synchronous switch scheme is presented in this paper. With the approach, several families of passive and active soft switching PWM converters, such as buck-boost, Zeta, Cuk, and Sepic, can be generated from the two basic converters, buck and boost. Also, the approach is used to integrate multiple converters to form a single-stage soft switching PWM converter. It has been shown that analysis of the converters can be conveniently performed from the derived general configurations, reducing the complexity significantly. Therefore, employing the technique can not only explore more physical insights into the converters in a family but reveal more relationships among the soft switching converters over conventional approaches. Measured results from a prototype have verified the feasibility of the derived single-stage converters     

Interpreting small signal behavior of the synchronous buck converter at light load

The pulse-width-modulation (PWM) buck converter with synchronous rectifiers operating at light load is usually modeled by its continuous conduction mode (CCM) model. However, the actual power-stage small-signal control-to-output response shows a different behavior from what the traditional CCM model predicts, specifically, more damping around the double-pole frequency, instead of more resonance. This paper presents a modified small-signal light-load model for a synchronous buck converter. The developed model accurately predicts the actual small-signal behavior of a PWM converter at light load. The derived averaged switch model for light load can also be used for the small-signal models of the other basic PWM converters operating in CCM at light load.     

Large-signal modeling of hysteretic current-programmed converters

Large-signal dynamic models for hysteretic current-programmed buck, boost, and buck-boost converters are proposed. The model is expressed by a single differential equation. The small-signal transfer functions of these three converters are also derived, based on the large-signal model. The analysis shows that under the hysteretic current-programmed control, the output voltage of the buck converter is independent of the supply voltage, and there is a right-halfplane (RHP) zero in the control-to-output transfer function of boost and buck-boost converters. An experimental prototype is breadboarded to verify the analysis     

Optimal feed-forward compensation for PWM DC/DC converters with`linear' and `quadratic' conversion ratio

An analytical procedure to optimize the feedforward compensation for any PWM DC/DC power converters is described. Achieving zero DC audiosusceptibility was found to be possible for the buck, buck-boost, Cuk, and SEPIC cells; for the boost converter, however, only nonoptimal compensation is feasible. Rules for the design of PWM controllers and procedures for the evaluation of the hardware-introduced errors are discussed. A PWM controller implementing the optimal feedforward compensation for buck-boost, Cuk, and SEPIC cells is described and fully experimentally characterized     

A passive lossless snubber cell for nonisolated PWM DC/DCconverters

A passive lossless snubber cell is proposed to improve the turn-on and turnoff transients of the MOSFETs in nonisolated pulsewidth modulated (PWM) DC/DC converters. Switching losses and EMI noise are reduced by restricting di/dt of the reverse-recovery current and dv/dt of the drain-source voltage. The MOSFET operates at zero-voltage-switching (ZVS) turnoff and near zero-current-switching (ZCS) turn-on. The freewheeling diode is also commutated under ZVS. As an example, operation principles, theoretical analysis, relevant equations, and experimental results of a boost converter equipped with the proposed snubber cell are presented in detail. Efficiency of 96% has also been measured in the experimental results reported for a 1 kW 100 kHz prototype in the laboratory, Six basic nonisolated PWM DC/DC converters (buck, boost, buck-boost, Cuk, Sepic, and Zeta) equipped with the proposed general snubber cells are also shown in this paper     

DC/DC变换器自适应模糊逻辑控制器设计

文章为DC/DC变换器设计了一种自适应模糊逻辑控制器（AFLC）。所提出的AFLC不需要专家系统提供决策参数和控制规则,而是使用模型数据文件来产生参数和规则,该模型数据文件包含输入输出对的整体概况。所提出的控制器使用8位微控制器来实现降压、升压和降压-升压变换器。     

Spectral characteristics of randomly switched PWM DC/DC convertersoperating in discontinuous conduction mode

This paper addresses a comparative study of the spectral characteristics of four random-switching schemes that apply to the basic pulsewidth-modulation (PWM) DC/DC converters operating in discontinuous conduction mode (DCM). They include randomized pulse position modulation, randomized pulsewidth modulation, and randomized carrier frequency modulation with fixed duty cycle and with fixed duty time, respectively. Mathematical models that characterize the input current and output voltage of the three basic PWM converters operating in DCM are derived. In particular, the effectiveness of spreading the dominant switching harmonics in the input current that normally exist in the standard PWM scheme and the introduction of low-frequency harmonics in the output voltage with respect to the randomness level are investigated. The validity of the models and analyses are confirmed experimentally by using a DC/DC buck converter     

Buck型变换器的线性化小信号补偿前馈控制

为减小由输入电源扰动引起的输出电压工频纹波,改善DC/DC变换器动态性能,根据平均变量建模思想,为电压型PWM控制的Buck型变换器建立连续导电工作模式（CCM）下统一的平均变量等效电路。分析等效电路并根据前馈控制的不变性原理提出Buck型变换器针对输入电压扰动的线性化小信号补偿前馈控制原理及实现方法,采用该方法的Buck型变换器可快速补偿输入电压扰动,加快变换器在输入电压扰动时的动态调节过程,显著减小输出电压中包括工频在内的低频纹波,改善变换器的动态性能。仿真研究结果验证了文中线性化小信号补偿前馈控制原理、方法及其分析的正确性。     

Simple topologies of PWM AC-AC converters

This letter proposes a new family of simple topologies of PWM AC-AC converters with minimal switches. With extension from the basic DC-DC converters, a series of AC-AC converters such as buck, boost, buck-boost, Cuk, and isolated converters are obtained. By PWM duty ratio control, they become a "solid-state transformer" with a continuously variable turns ratio. All the proposed AC-AC converters in this paper employ only two switches. Compared to the existing circuits that use six switches or more, they can reduce cost and improve reliability. The operating principle and control method of the proposed topologies are presented. Analysis and simulation results are given using the Cuk AC-AC converter as an example. The analysis can be easily extended to other converters of the proposed family.     

峰值电流模式控制的非理想Buck变换器的建模

在 Ridley 峰值电流模式控制的 Buck 变换器模型的基础上,提出一个包含传导损耗的修正模型.运用平均开关建模法,建立非理想PWM开关的非线性大信号平均模型.包含全部寄生电阻和二极管的正向压降.围绕某一稳态工作点,扰动并线性化平均模型,导出非理想Buck变换器的功率级在连续工作模式下的直流模型和线性小信号模型.在此基础上.修正峰值电流模式控制部分的小信号模型参数.最终建立整个峰值电流模式控制的非理想Buck变换器的线性小信号模型.推导小信号动态的解析结果.给出修正的补偿斜坡信号斜率.在Simetrix/simplis开关电源软件包中进行了仿真分析,结果显示新模型能更准确地预测系统性能.     

An ultra-low power CMOS DC–DC buck converter with double-chain digital PWM technique

In present-day integrated digital circuits are become attractive choice for the DC–DC buck converters. This paper proposes a novel approach of CMOS DC–DC buck converter with double-chain digital pulse width modulation (PWM) for ultra-low power applications. The proposed digital PWM architecture consists of double delay lines which is to reduce power consumption and improves ripple voltage with the resolution. An algorithm is proposed that describes the operation of digital PWM. The double chain digital PWM is implemented and analyzed in cadence platform using commercial 180 nm TSMC design kit. The promising results reveals that the power consumption is reduces up to 1.16 µW with occupies less area under the operating frequency of 100 kHz. The DC–DC buck converter with proposed PWM achieves peak efficiency of 92.6% including a load current range of 4–10 mA. This proposed digital PWM method demonstrates its ability to minimize the ripple voltage by 49% and enables to DC–DC converter for compose in a compact chip area as compared to conventional converters. Measured and Simulated power efficiency are made good agreement with each other.     

基于动态相量法的PWM DC/DC变换器的建模与分析方法

文章从动态相量的概念以及基本性质出发,推导了动态相量法应用于PWM DC/DC变换器建模与分析的数学方法。首先介绍了纹波的计算方法,引入了选择模式分析法对PWM DC/DC变换器动态相量模型进行简化,建立了小信号模型,并以PWM BUCK/BOOST双向DC/DC变换器为例,用MATLAB软件建立了PWM DC/DC变换器的动态相量模型,将之与时域仿真模型进行了比较,验证了该方法的有效性。     

A general technique for derivation of average current mode controllaws for single-phase power-factor-correction circuits without inputvoltage sensing

This paper presents a general technique to derive average current mode control (CMC) laws without input voltage sensing to achieve high power factor for single-phase topologies operating in continuous conduction mode (CCM). The control laws are derived based on the steady-state input-output voltage relationships and the CCM large-signal averaged pulsewidth modulation (PWM)-switch model. Using this methodology, average CMC laws with linear PWM waveforms are discovered for commonly used single-phase power stage topologies such as boost, flyback, SEPIC, and buck/boost. Conventional three-loop-controlled average CMC converters can now be controlled with a two-loop architecture. Hardware results for a boost power factor correction (PFC) and simulation results for flyback, SEPIC, and buck/boost topologies verify operation. The small-signal models of the current loop and voltage loop are derived for the boost topology and are used for control loop design. Input current harmonic distortion measurements demonstrate improved performance compared to the conventional three-loop control technique     

Single-inductor dual-output (SIDO) DC–DC converters for minimized cross regulation and high efficiency in soc supplying systems

A compact size and high efficiency single-inductor dual-output (SIDO) DC–DC converter is proposed. The proposed SIDO DC–DC converter not only provides dual output sources (one buck and one boost outputs) but also has minimized cross regulation without using any external compensation components. Generally speaking, it is important to minimize the number of components and footprint area in the design of SIDO converters. However, usually large external compensation resistors and capacitors are required to stabilize DC–DC converters. Importantly, our proposed hysteresis mode operation can effectively avoid the oscillation problems that may exist in many SIMO designs. Furthermore, the dynamic dc current level like that in the continuous conduction mode (CCM) operation can make the proposed SIDO DC–DC converter achieve high conversion efficiency at light loads owing to small conduction loss. Experimental results show a high efficiency from 85% at light loads to 94% at heavy loads.     

State-plane analysis of zero-current-switching resonant DC/DC powerconverters

The state-plane analysis for the buck, boost, buck/boost, and Cuk zero-current-switching resonant DC/DC power converters is presented. Simple visual criteria are introduced to determine whether the converter is operating in a mode producing voltage conversion. It is shown that the voltage conversion takes place within the converters if and only if both horizontal and vertical straight-line segments are present in the state-plane graph. The boundary of energy conversion is identified from the state plane by the evaporation of one or both straight-line segments. Formulas are found for the normalized switching frequency at this boundary that depend on the value of normalized switching voltage