DX系列发射机DRM改造方案

本文主要介绍由中波转播台专用的DX系列发射机改遣成全数字的DRM系列发射机方面的内容,文章对DRM系列发射机的优势及其关键部件适配器的原理和功能等进行了简要介绍,给出了由DX系列发射机向DRM系列发射机进行改造的最优方案,并对其可行性进行了论述。     

当前电视发射机更新改造的若干问题

本文就电视发射机的更新改造选型需要考虑的主要因素进行了分析，提出了在模拟向数字化过渡时期，对现有设备更新改造的观点，为数字电视地面广播试验试播期购买DTV发射机或数字化升级改造发射机提出了建议。     

电视发射机数字化改造过程中关于输出滤波器的分析

输出滤波器是电视发射系统中的重要组成部分,数字电视发射机对输出滤波器的要求更高.对输出滤波器的改造是现有模拟电视发射机改造为数字电视发射机的一个重要内容.讨论了电视发射机输出滤波器的类型、技术指标、数字电视发射机对输出滤波器的要求及改造方法.     

多台全固态广播电视发射机风冷系统集中改造的实践

随着技术发展,全固态广播电视发射机,基本上已完全代替了传统的电子管发射机,目前广播电视台使用的全固态发射机,大部分都是内置风机冷却式发射机,随着广播电视事业的发展,发射机台数的增多,发射机房温控单纯,靠增加制冷空调台数,增加温空成本,已不能达到理想的效果,发射机的稳定运行难以保障,多台全固态发射机风冷系统集中改造,成为迫切需要解决的问题,文章以6台全固态电视发射机风冷系统集中改造的实例,介绍了多台全固态电视发射机风冷系统集中改造的设计方针、思路、实施及结果.     

DRM数字广播发射机

本文介绍了DRM数字广播发射机的发展前景,例举了Dx发射机改造成DRM发射机的方法。     

全固态电视发射机射频通道的数字化改造

以法国汤姆逊TVV2000HP系列VHF10kW全固态电视发射机为例,结合国内外数字电视发射机研究现状,就发射机射频通道的数字化改造进行了技术分析,并提出了改造思路.     

模拟发射设备如何适应数字电视的发展

介绍了模拟电视发射机与数字电视发射机的区别,提出把模拟发射机改造成数字发射机的具体方法,指出这种改造的好处在于可大大降低资金投入,提高原有设备的利用率,又较快地适应了数字化发展的要求,不失为一种又快又好的技术改造措施。     

浅谈模拟电视发射机的数字化升级

随着数字电视的普及,数字电视发射机将逐渐代替传统的模拟电视发射机,能否将原有的模拟电视发射机改造成数字发射机,是一个重要的课题且具有其实际意义.文中在介绍了数字电视发射机和模拟电视发射机区别的基础上,提出了一种简单易行的改造方法,最后经过实验数据证明该方法的可行性.     

论模拟发射机的数字化改造

本文介绍了数字发射机与模拟发射机的区别,以及如何改造模拟电视发射机设备用于传送数字电视。     

大功率调频发射机多工共用天馈系统升级改造的分析与实践

本文介绍了山西广播电视无线管理中心对省直属骨干发射台228台11套大功率调频发射机共用天馈系统的升级改造技术方案和工程实践。重点介绍了11套大功率调频发射机通过多工器实现无干扰共用天馈系统的升级改造方案和同塔直列两副60kW六层四面双偶极板调频天线仿真设计及主向下倾零点填充的原理及方法,为大型广播发射台多工共用调频天馈系统数字化升级改造提供了参考。     

水声扩频信号发射机的研究

设计了大功率水声扩频信号发射机,该发射机具有调制方式多样,效率高,功率大,体积小等特点,并给出了发射机硬件的电路设计和软件控制程序实现过程。本扩频信号发射机采用ARM7 LPC2378作为主控芯片进行编码计算后输出扩频基带信号,采用直接数字式频率合成器(DDS)完成扩频信号的调制输出。根据全桥拓扑功率电路和绝缘栅双极性晶体管(IGBT)功率管的特点,设计了扩频信号发射机的功放输出电路。最后,对该扩频信号发射机的输出功率进行了实验验证,结果表明整机电路设计完全达到设计要求。     

A study of metamorphic HEMT technological improvements: Impact on parasitic effect electrical models

Metamorphic high electron mobility transistor (MHEMT) technology is well adapted to optical high bit rate telecommunication systems. In this context, we propose in this paper a global analysis of this technology in order to verify if it is suitable for system conditions in terms of on-state and off-state breakdown voltages, f_t and f_max, … Our interest concerns the transistor parasitic effects and their impact on the amplifier circuit performances, considering the transistor role in transmitter and receiver modules. We propose new electrical models for each experimentally measured parasitic effect and they could be added to the MHEMT basic models for circuit design.     

扇形分裂漏CMOS磁敏传感器集成电路

介绍了扇形分裂漏磁敏传感器集成电路的设计,并由0．6μm CMOS工艺实现。该集成电路以扇形分裂漏磁敏MOS管作为磁敏传感单元,并包含两次工作模式的开关阵列预处理电路、相关二次取样电路(CDS)和数字控制电路。该传感器集成电路实现了测量磁场的功能,并实现了在屏蔽磁场的工作模式下对噪声信号进行校正的功能,有效地消除了磁敏传感器及其信号处理电路的噪声影响。在工作频率为10 kHz时,磁敏传感器的灵敏度为2．62 V/T。     

高效率E 类功放在遥测发射机中的应用

对提升PCM发射机工作效率的关键技术进行阐述。采用GaN器件设计了S频段具有谐波控制电路的逆E类功率放大器,输出功率10W,工作效率高达78%。将此高效功率放大技术用于PCM遥测发射机设计。实测结果表明,该发射机可适应码速率2Mbps的PCM信号,发射功率9.8W,整机效率可达57.6%。     

An integrated Doppler-radar transceiver front end using two FETactive antennas

An integrated X-band Doppler-radar transceiver front end has been developed. This front end consists of two adjacently spaced field-effect transistor (FET) active antennas, with one of them being biased to oscillate as its transmitter and the other being biased not to oscillate, but to act as its mixer. This design has the advantage of lower noise at low Doppler frequencies as compared to a self-oscillating mixer scheme. The circuit can be used in low-power Doppler-radar systems to detect slow-moving objects such as pedestrians, intruders, automobiles, etc., with high sensitivity     

高输入阻抗测压电路

本文简要说明了电压测量电路要求具有较高输入阻抗的原理,针对直流电压测量技术中采用的实际电路介绍了几种高输入阻抗的测压电路,并简要分析它们的工作原理和特点.测量几伏或几百毫伏电压时,可采用场效应管差分式电路(输入阻抗达几百兆欧或上千兆欧);也可采用高阻型集成运放(如CA3130输入阻抗高达TΩ量级,即1012Ω)构成测压...     

高温CMOS集成电路闩锁效应分析

本文详细地分析了LDD结构高温CMOS集成电路闩锁效应.文中提出了亚微米和深亚微米CMOS集成电路闩锁效应的模型.在该模型中,针对器件的尺寸和在芯片上分布情况,我们认为CMOS IC闩锁效应的维持电流有两种模式:大尺寸MOST的寄生双极晶体管是长基区,基区输运因子起主要作用;VLSI和ULSI中MOST的寄生双极晶体管是短基区,发射效率起主要作用.但是他们的维持电流都与温度是负指数幂关系.文章给出了这两种模式下的维持电流与温度关系,公式在25℃至300℃之间能与实验结果符合.     

Fully integrated 3 x 3 mm BiFET stage-bypass power amplifier for WCDMA handset application

By using a merged process of a heterojunction bipolar transistor and a field effect transistor (BiFET), a stage-bypass power amplifier (PA) for wideband code division multiple access (WCDMA) application has been developed. The size of the PA was reduced by integrating control logic circuits on a single BiFET monolithic microwave integrated circuit with virtually identical performance compared to a previous work. Adopting the stage-bypass technique, this work accomplished remarkable average current reduction compared to a typical class-AB PA, thus contributing to extended operation time.     

Substrate-bias effect and source-drain breakdown characteristics inbody-tied short-channel SOI MOSFET's

The substrate-bias effect and source-drain breakdown characteristics in body-tied short-channel silicon-on-insulator metal oxide semiconductor field effect transistors (SOI MOSFET's) were investigated. Here, “substrate bias” is the body bias in the SOI MOSFET itself. It was found that the transistor body becomes fully depleted and the transistor is released from the substrate-bias effect, when the body is reverse-biased. Moreover, it was found that the source-drain breakdown voltage for reverse-bias is as high as that for zero-bias. This phenomenon was analyzed using a three-dimensional (3-D) device simulation considering the body-tied SOI MOSFET structure in which the body potential is fixed from the side of the transistor. This analysis revealed that holes which are generated in the transistor are effectively pulled out to the body electrode, and the body potential for reverse-bias remains lower than that for zero-bias, and therefore, the source-drain breakdown characteristics does not deteriorate for reverse-bias. Further, the influence of this effect upon circuit operation was investigated. The body-tied configuration of SOI devices is very effective in exploiting merits of SOI and in suppressing the floating body-effect, and is revealed to be one of the most promising candidates for random logic circuits such as gate arrays and application specific integrated circuits     

High power-added efficiency MMIC amplifier for 2.4 GHz wirelesscommunications

This work describes the design and the measured performance of a high-efficiency monolithic microwave integrated circuit (MMIC) amplifier for wireless communications in the 2.4 GHz band. The monolithic technology employed in the circuit integration is based on standard 0.5-μm-gate-length MESFET. The design procedure is based on load-cycle graphic optimization of the transistor performance. On-wafer experimental characterization shows output power up to 24 dBm and excellent results of power-added efficiency up to 79% with 19.5 dBm output power at low drain bias voltage. The amplifier performance achieved and the circuit size, which is 1 mm², are suitable for use in the transmitter chains of wireless communication systems in the 2.4 GHz band