铟凸点对倒装互连影响的研究

制作了2种形式的铟凸点:即直接蒸发沉积的铟柱和将铟柱回流得到的铟球.分别讨论了铟柱和铟球对倒装互连的影响,着重讨论了铟球和铟柱分别和芯片倒装互连后的剪切强度,结果发现在互连未回流的状态下铟球的剪切强度是铟柱的1.5倍,回流后铟球的剪切强度是铟柱的2.8倍.此外,分析讨论了长时间放置在空气中的铟球对倒装互连的影响,结果发现长时间放置在空气中的铟球和芯片互连后,器件的电学与机械连通性能会受到很大的影响.     

化学镀Ni-P在纯锡凸点的应用及界面研究

采用化学镀Ni-P作UBM阻挡层,利用电镀的方法制备了面阵列和周边排布的无铅纯锡凸点,凸点高度为85±2μm,一致性良好。研究了不同回流温度下纯锡焊球的剪切强度、断裂模式和与Ni-P层反应生成的金属间化合物。结果表明,纯锡凸点回流时与Ni-P生成针状Ni3Sn4,凸点剪切强度达到92MPa以上。剪切断裂为韧性断裂,随着回流温度提高及回流时间延长,Ni3Sn4相由针状向块状转变,Ni-P层与Ni3Sn4层间生成层状Ni3P相,粗化的Ni3Sn4相受压应力向焊球内部脱落。     

铟凸点回流时的异常现象的研究

利用湿法回流缩球的技术,使铟柱回流成铟球。在研究中心距为30?m、面阵为320×256的读出电路在回流缩球的过程中遇到了3种异常现象,即铟球体积异常、铟球桥接和铟球偏离中心位置的现象。详细地介绍了这3种现象产生的过程及背景,分析了产生这3种现象的机理以及对器件性能和倒装互连的影响,并提出了相应的解决措施。     

电镀法铟凸点制备技术以及可靠性研究

铟凸点阵列通常被用于焦平面阵列与硅的读出电路间的倒装互连中。铟凸点制备技术是焦平面探测器制备的关键技术之一。本文阐述了一种基于电镀的铟凸点制备工艺流程;基于此流程,实验中成功制备出间距为100um,UBM直径为40um的16*16的焊球阵列。同时,实验中利用XRD技术对Ti/Pt对铟的阻挡性做出了研究,结果表明,Ti/Pt (300Å/200Å)在室温和200°C的温度下对铟均具有良好的阻挡性能。利用剪切力实验对铟凸点的可靠性做出了研究,实验结果表明,经过一次回流后,铟凸点的剪切有极大的变化,但之后增加回流次数,其剪切力变化不大,此现象可能与电镀铟内部的织构有关.本文也讨论了铟凸点的倒装工艺。     

一种用于MEMS器件的Au-In倒装焊技术

介绍了Au-In键合在MEMS芯片封装中的应用.根据现有的工艺设备和实验条件对制备铟凸点阵列进行工艺设计,对铟凸点制备技术进行了研究,最终在硅圆片上制备了6 μm高的铟凸点阵列.在150～300℃下成功的进行了Au-In倒装键合实验.在300℃,0.3 MPa压力下键合的剪切强度达到了5 MPa.     

7.5μm小间距铟凸点阵列制备的研究

红外成像系统中,减小像元间距是目前重点发展的主题之一,为了实现小的像元间距,制备高精度均匀化的小型铟凸点阵列是关键之一.针对7.5μm像元间距,本文通过系列实验和分析,研究了不同打底层尺寸和铟柱尺寸的组合对铟凸点制备的影响,为制备高精度小型铟凸点阵列提供了良好的指导.     

读出电路铟柱打底层对铟柱成球高度的影响

针对超大规模红外探测器读出电路铟柱成球后高度过低导致倒装互连难度增加这一问题,设计了试验,并分析讨论了读出电路铟柱打底层（UBM）形状对铟柱成球高度的影响。得出了铟球高度与铟柱尺寸和铟柱生长高度成正比,与读出电路铟柱打底层尺寸成反比,并提出了进一步增加铟球高度的思路。     

焊料凸点回流时的桥接现象研究

在用回流焊料凸点时,常会发生凸点的桥接现象,致使芯片报废。此时,相邻的多个凸点彼此融合,聚集成一个更大的焊料球,并吸干先前各凸点中的焊料。本文研究了电镀PbSn凸点和蒸发铟凸点的回流过程中出现的桥接现象。介绍了桥接现象产生的过程及其背景,分析了桥接现象的机理,提出了改进措施。     

混合式红外焦平面阵列互连铟凸点几何尺寸的优化设计

混合式焦平面器件的电气和机械互连是焦平面器件研制中的关键工艺技术,直接关系到焦平面器件的性能和成品率.铟凸点技术是解决热膨胀失配的一种有效的技术途径,通过合理的铟柱设计和严格控制的制造工艺,可实现探测器芯片和读出电路可靠的互连.现讨论了铟柱高度和高宽比的计算方法,分析了热膨胀变形在铟柱端面产生的最大作用力与切应变、高宽比和切变位移的关系,指出器件制造工艺误差的影响,认为矩形截面的铟柱比圆形截面的铟柱更合理.     

多次回流对不同成分Sn-Pb凸点IMC生长的影响

以不同成分Sn-Pb凸点为研究对象,分析回流次数对凸点IMC生长的影响。试验结果表明,多次回流中,5Sn95Pb凸点的剪切强度变化幅度最大,其余凸点抗剪切强度波动范围较小。凸点界面处IMC层厚度值均逐渐增大,其中3Sn97Pb和5Sn95Pb凸点界面处的IMC厚度增加速度较慢。界面IMC层晶粒尺寸逐渐增大,10次回流后,3Sn97Pb和63Sn37Pb凸点界面处观测到长轴状凸起,5Sn90Pb和10Sn90Pb凸点界面处IMC层呈现出较为平坦的形态。     

Characterization of small-sized eutectic Sn-Bi solder bumps fabricated using electroplating

We studied the effects of the cooling rate during the reflow process on the microstructure of eutectic Sn-Bi solder bumps of various sizes fabricated by electroplating. To fabricate eutectic Sn-Bi solder bumps of less than 50 μm in diameter, Sn-Bi alloys were electroplated on Cu pads and reflowed at various cooling rates using the rapid thermal annealing system. The interior microstructure of electroplated bumps showed a fine mixture of Sn-rich phases and Bi-rich phases regardless of the cooling rate. Such an interior microstructure of electroplated bumps was quite different from the reported microstructure of vacuum-evaporated bumps. Ball shear tests were performed to study the effects of the cooling rate on the shear strength of the solder bumps and showed that the shear strength of the bumps increased with increasing cooling rate probably due to the reduced grain size. Soft fractures inside the solder bump were observed during the ball shear test regardless of the cooling rate.     

Pb/Sn凸剪切性能研究

在实际使用条件下,Pb/Sn凸点会由于承受温度循环而产生剪切应力,剪切应力导致的主要失效方式是开裂.通过对倒装焊后Pb/Sn凸点剪切强度的测量及对剪切后断口的分析,发现破坏主要发生在凸点下金属(UBM)层内部或UBM与Al焊盘之间,平均剪切强度受凸点尺寸影响很小,范围在21～24MPa。     

Laser-assisted bumping for flip chip assembly

A novel laser-assisted chip bumping technique is presented in which bumps are fabricated on a carrier and subsequently transferred onto silicon chips by a laser-driven release process. Copper bumps with gold bonding layers and intermediate nickel barriers are fabricated on quartz wafers with pre-deposited polyimide layers, using UV lithography and electroplating. The bumps are thermosonically bonded to their respective chips and then released from the carrier by laser machining of the polyimide layer, using light incident through the carrier. Bumps of 60 to 85 μm diameter and 50 μm height at a pitch of 127 μm have been fabricated in peripheral arrays. Parallel bonding and subsequent transfer of arrays of 28 bumps onto test chips have been successfully demonstrated. Individual bump shear tests have been performed on a sample of 13 test chips, showing an average bond strength of 26 gf per bump     

Preparation and Temperature Cycling Reliability of Electroless Ni(P) Under Bump Metallization

The reliability of electroless Ni(P) under-bump metallization (UBM) was evaluated via temperature cycling and solder bump shear strength tests. Commercial diodes and dummy dies fabricated in-house were used as substrates for the electroless Ni(P) UBM deposition. Solder bumps were formed after reflowing eutectic 63Sn37Pb solder foils over the Ni(P) UBM. The solder bump shear strength was measured before and after different temperature cycling. The results from this study showed that the UBM thickness and dimension had important effects on the solder bump shear strength and reliability. Both the larger UBM dimension and larger UBM thickness tended to induce higher stress in the UBM, which resulted in the lower solder bump shear strength and lower temperature cycling reliability. A better UBM structure solution for high current electronic packaging application is indicated in this paper     

Contact resistance and shear strength of the solder joints formed using Cu bumps capped with Sn or Ag/Sn layer

Solder joints were successfully bonded by joining Ag/Sn/Cu bumps and Ag/Sn/Cu layers at 200°C for 30 sec under 20 MPa, 40 MPa, and 80 MPa using thermo-compression bonder. The solder joints were aged at 150°C up to 1000 h. The strength of the solder joints was measured by the shear test and the contact resistance was measured using four-point probe method. The microstructure of the solder joints and the fracture modes after shear test were analyzed by scanning electron microscopy (SEM) with the energy-dispersive spectrometry (EDS). Results showed that the electrical resistance of the solder joints decreased, and the shear strength of the solder joints increased after aging treatment. The fracture modes were observed to move from the interfacial failure between solder and intermetallic compounds (IMCs) to the interfacial failure between IMCs. It was considered that the transition of fracture modes was closely related with the microstructure evolution of the solder joints, especially the transformation of IMC phases during the aging treatment.     

Experimental characterization and mechanical behavior analysis of intermetallic compounds of Sn–3.5Ag lead-free solder bump with Ti/Cu/Ni UBM on copper chip

Due to today’s trend towards ‘green’ products, the environmentally conscious manufacturers are moving toward lead-free schemes for electronic devices and components. Nowadays the bumping process has become a branch of the infrastructure of flip chip bonding technology. However, the formation of excessively brittle intermetallic compound (IMC) between under bump metallurgy (UBM)/solder bump interface influences the strength of solder bumps within flip chips, and may create a package reliability issue. Based on the above reason, this study investigated the mechanical behavior of lead-free solder bumps affected by the solder/UBM IMC formation in the duration of isothermal aging. To attain the objective, the test vehicles of Sn–Ag (lead-free) and Sn–Pb solder bump systems designed in different solder volumes as well as UBM diameters were used to experimentally characterize their mechanical behavior. It is worth to mention that, to study the IMC growth mechanism and the mechanical behavior of a electroplated solder bump on a Ti/Cu/Ni UBM layer fabricated on a copper chip, the test vehicles are composed of, from bottom to top, a copper metal pad on silicon substrate, a Ti/Cu/Ni UBM layer and electroplated solder bumps. By way of metallurgical microscope and scanning-electron-microscope (SEM) observation, the interfacial microstructure of test vehicles was measured and analyzed. In addition, a bump shear test was utilized to determine the strength of solder bumps. Different shear displacement rates were selected to study the time-dependent failure mechanism of the solder bumps. The results indicated that after isothermal aging treatment at 150 °C for over 1000 h, the Sn–Ag solder revealed a better maintenance of bump strength than that of the Sn–Pb solder, and the Sn–Pb solder showed a higher IMC growth rate than that of Sn–Ag solder. In addition, it was concluded that the test vehicles of copper chip with the selected Ti/Cu/Ni UBMs showed good bump strength in both the Sn–Ag and Sn–Pb systems as the IMC grows. Furthermore, the study of shear displacement rate effect on the solder bump strength indicates that the analysis of bump strength versus thermal aging time should be identified as a qualitative analysis for solder bump strength determination rather than a quantitative one. In terms of the solder bump volume and the UBM size effects, neither the Sn–Ag nor the Sn–Pb solders showed any significant effect on the IMC growth rate.     

Effects of Co addition in eutectic Sn-3.5Ag solder on shear strength and microstructural development

In this study, the approach of composite solder using eutectic Sn-3.5Ag solder and Co was tried. Co particles and Sn-3.5Ag solder paste were mechanically mixed at Co weight fractions from 0.1% to 2.0%. For the Co-mixed Sn-3.5Ag solder pastes, their melting temperatures and spreading areas were measured. The solder pastes were stencil printed on test substrates and reflowed to form solder bumps. Ball shear test was performed to examine shear strength of Co-reinforced Sn-3.5Ag solder bumps. As a result, Co addition up to 2 wt.% did not alter the melting temperature under heating but reduced undercooling. The maximum shear strength of Co-reinforced Sn-3.5Ag solder bumps increased by 28% compared to normal ones. The increase in shear strength can be attributed to the (Cu,Co)₃Sn₂ intermetallic compounds.     

Eutectic Sn-Ag solder bump process for ULSI flip chip technology

A novel eutectic Pb-free solder bump process, which provides several advantages over conventional solder bump process schemes, has been developed. A thick plating mask can be fabricated for steep wall bumps using a nega-type resist with a thickness of more than 50 μm by single-step spin coating. This improves productivity for mass production. The two-step electroplating is performed using two separate plating reactors for Ag and Sn. The Sn layer is electroplated on the Ag layer. Eutectic Sn-Ag alloy bumps can be easily obtained by annealing the Ag/Sn metal stack. This electroplating process does not need strict control of the Ag to Sn content ratio in alloy plating solutions. The uniformity of the reflowed bump height within a 6-in wafer was less than 10%. The Ag composition range within a 6-in wafer was less than ±0.3 wt.% Ag at the eutectic Sn-Ag alloy, analyzed by ICP spectrometry. SEM observations of the Cu/barrier layer/Sn-Ag solder interface and shear strength measurements of the solder bumps were performed after 5 times reflow at 260°C in N₂ ambient. For the Ti(100 nm)/Ni(300 nm)/Pd(50 nm) barrier layer, the shear strength decreased to 70% due to the formation of Sn-Cu intermetallic compounds. Thicker Ti in the barrier metal stack improved the shear strength. The thermal stability of the Cu/barrier layer/Sn-Ag solder metal stack was examined using Auger electron spectrometry analysis. After annealing at 150°C for 1000 h in N₂ ambient, Sn did not diffuse into the Cu layer for Ti(500 nm)/Ni(300 nm)/Pd(50 nm) and Nb(360 nm)/Ti(100 nm)/Ni(300 nm)/Pd(50 nm) barrier metal stacks. These results suggest that the Ti/Ni/Pd barrier metal stack available to Sn-Pb solder bumps and Au bumps on Al pads is viable for Sn-Ag solder bumps on Cu pads in upcoming ULSIs     

微尺寸SnAg凸点的制备技术及其互连可靠性

用电镀法制备了尺寸小于100μm的面阵列Sn-3.0Ag凸点.芯片内凸点的高度一致性约1.42%,Φ100mm硅圆片内的高度一致性约3.57%,Ag元素在凸点中分布均匀.研究了不同回流次数下SnAg/Cu的界面反应和孔洞形成机理,及其对凸点连接可靠性的影响.回流过程中SnAg与Cu之间Cu6Sn5相的生长与奥氏熟化过程相似.SnAg/Cu6Sn5界面中孔洞形成的主要原因是相转变过程中发生的体积缩减.凸点的剪切强度随着回流次数的增多而增大,且多次回流后SnAg/Cu界面仍然结合牢固.Cu6Sn5/Cu平直界面中形成的孔洞对凸点的长期可靠性构成威胁.     

Fracture Mechanics of Solder Bumps During Ball Shear Testing: Effect of Bump Size

This paper examines the mechanics of ball shear testing with the objective of understanding the mechanism by which the maximum shear force and the rate of crack growth is dependent on the solder bump size. For this, Pb-Sn solder bumps with diameters between 460 μm and 760 μm are soldered to 400 μm-diameter Cu pads and subjected to ball shear testing. In spite of the constant interface area, the bump size significantly impacts the measured shear fracture force and the crack growth rate. Both the fracture force and the crack growth rate increase with bump size, and in the case of the fracture force, the increase is almost linear. Our analysis finds that the linear increase in the fracture force is a result of the bump deformation force, which increases with bump size. A simple model that accounts for the deformation force component is developed and used to extract the true interface fracture force. The estimated true interface fracture force is found to vary little with bump size, tightly converging to the 40 MPa to 48 MPa range. On the other hand, the dependence of crack growth rate on bump size is found to result from the higher degree of rotational moment associated with larger bumps.