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1.
The electrical transport properties of β-SiC/Si heterojunctions were investigated using current-voltage (I-V) and capacitance-voltage (C-V) characteristics. The heterojunctions were fabricated by growing n-type crystalline β-SiC films on p-type Si substrates by chemical vapor deposition (CVD). The I-V data measured at various temperatures indicate that at relatively high current, the heterojunction forward current is dominated by thermionic emission of carriers and can be expressed as exp(-qVbi/kT ) exp(VkT), where Vbi is the built-in voltage of the heterojunction and η(=1.3) is a constant independent of voltage and temperature. At lower current, defect-assisted multitunneling current dominates. The effective density of states and the density-of-states effective mass of electrons in the conduction band of SiC are estimated to be 1.7×1021 cm -3 and 0.78m0, respectively. This study indicates that the β-SiC/Si heterojunction is a promising system for heterojunction (HJ) devices such as SiC-emitter heterojunction bipolar transistors (HBTs)  相似文献   

2.
CW measurement of HBT thermal resistance   总被引:2,自引:0,他引:2  
Measurements of the temperature dependence of β and VBE were made on AlGaAs-GaAs HBTs and used to determine device thermal resistance. The measurements were CW and not switched or pulsed in order to have a simpler procedure. With base doping greater than 1019 cm-3, HBTs have negligible base-width modulation (i.e., flat IC versus VCE characteristics) which makes CW thermal resistance measurement especially direct and simple  相似文献   

3.
Temperature-dependent measurements from 25 to 125°C have been made of the DC I-V characteristics of HBTs with GaAs and In0.53Ga0.47As collector regions. It was found that the GaAs HBTs have very low output conductance and high collector breakdown voltage BVCEO>10 V at 25°C, which increases with temperature. In striking contrast, the In0.53Ga0.47As HBTs have very high output conductance and low BVCEO~2.5 V at 25°C, which actually decreases with temperature. This different behavior is explained by the >104 higher collector leakage current, ICO, in In0.53Ga0.47As compared to GaAs due to bandgap differences. It is also shown that device self-heating plays a role in the I-V characteristics  相似文献   

4.
In the device a SiGe epitaxial base is integrated in a structure which uses in situ doped epitaxial lateral overgrowth for the formation of the emitter window and the extrinsic base contact. Nearly ideal I -V characteristics have been achieved for a base width of 60 nm with an intrinsic base resistance of 4.6 kΩ/□ and for emitter widths down to 0.4 μm. A DC collector current enhancement factor of 3.1 was obtained relative to a Si homojunction transistor with a 1.25 times higher intrinsic base resistance. The breakdown voltage BVCBO is identical for both Si and SiGe devices, even though the collector-base depletion region is partly overlapped with the reduced-bandgap SiGe strained layer. The lower BVCEO, measured for the SiGe-base transistor, is due to the higher current gain. Based on these results the fabrication of high-speed bipolar circuits that take advantage of SiGe-base bandgap engineering seems possible using selective epitaxy emitter window (SEEW) technology  相似文献   

5.
Electrical characteristics of Al/yttrium oxide (~260 Å)/silicon dioxide (~40 Å)/Si and Al/yttrium oxide (~260 Å)/Si structures are described. The Al/Y2O3/SiO2/Si (MYOS) and Al/Y2 O3/Si (MYS) capacitors show very well-behaved I-V characteristics with leakage current density <10-10 A/cm2 at 5 V. High-frequency C- V and quasistatic C-V characteristics show very little hysteresis for bias ramp rate ranging from 10 to 100 mV/s. The average interface charge density (Qf+Q it) is ~6×1011/cm2 and interface state density Dit is ~1011 cm-2-eV-1 near the middle of the bandgap of silicon. The accumulation capacitance of this dielectric does not show an appreciable frequency dependence for frequencies varying from 10 kHz to 10 MHz. These electrical characteristics and dielectric constant of ~17-20 for yttrium oxide on SiO2/Si make it a variable dielectric for DRAM storage capacitors and for decoupling capacitors for on-chip and off-chip applications  相似文献   

6.
The results of measurements of the digital characteristics of CMOS devices as a function of temperature between 77 and 300 K and of supply voltage between 3 and 20 V are presented. Using a fixed supply of 5 V, the low noise margin decreased from 2.54 to 2.11 V, but the high noise margin increased from 2.18 to 2.40 V as the temperature was increased from 77 to 300 K. On lowering the temperature from 300 to 77 K, both VII and VIH increased and the transition between these input logic voltages became more abrupt. These and other digital characteristics including noise immunity. V H-VI, and VIH-V II all showed a smooth monotonic improvement as the temperature decreased. These results can be qualitatively explained due to the increase in the absolute threshold voltages of the NMOS and PMOS transistors and to the decrease in the βNP ratio as the temperature is lowered  相似文献   

7.
Impact ionization phenomena in the collector region of AlGaAs/GaAs heterojunction bipolar transistors give rise to base current reduction and reversal. These phenomena can be characterized by extracting the M-1 coefficient, which can be evaluated by measuring base current changes. Measurements of M-1 are affected at low current densities by the presence of the collector-base junction reverse current ICBO. At high current densities, three effects contribute to lower the measured M-1 value: voltage drops due to collector (RC) and base (RB) parasitic resistances, device self-heating, and lowering of the base-collector junction electric field due to mobile carriers. By appropriately choosing the emitter current value, parasitic phenomena are avoided and the behavior of M-1 as a function of the collector-base voltage VCB in AlGaAs/GaAs HBTs is accurately characterized  相似文献   

8.
Hot-carrier stressing was carried out on 1-μm n-type MOSFETs at 77 K with fixed drain voltage Vd=5.5 V and gate voltage Vg varying from 1.5 to 6.5 V. It was found that the maximum transconductance degradation ΔGm and threshold voltage shift ΔVt, do not occur at the same Vg. As well, ΔKt is very small for the Vg <Vd stress regime, becomes significant at VgVd, and then increases rapidly with increasing Vg, whereas ΔGm has its maximum maximum in the region of maximum substrate current. The behavior is explained by the localized nature of induced defects, which is also responsible for a distortion of the transconductance curves and even a slight temporary increase in the transconductance during stress  相似文献   

9.
Self-aligned high-frequency InP/InGaAs double heterojunction bipolar transistors (DHBTs) have been fabricated on a Si substrate. A current gain of 40 was obtained for a DHBT with an emitter dimension of 1.6 μm×19 μm. The S parameters were measured for various bias points. In the case of IC=15 mA, f T was 59 GHz at VCE=1.8 V, and f max was 69 GHz at VCE=2.3 V. Due to the InP collector, breakdown voltage was so high that a VCE of 3.8 V was applied for IC=7.5 mA in the S-parameter measurements to give an fT of 39 GHz and an fmax of 52 GHz  相似文献   

10.
Rectifying contacts between TaN and p-silicon with very high reverse breakdown voltage (VBR >700 V) without using any guard ring have been realized. Barrier heights of TaN to both p-type silicon and n-type silicon have been measured at 0.68 and 0.48 eV, respectively. The breakdown voltage VBR of TaN to p-silicon diodes, as deposited, is ~400 V and decreases to less than 200 V after annealing in hydrogen at 450°C for 30 min. On the other hand, annealing in a nitrogen ambient at 450°C for 30 min. increases the VBR of these diodes to more than 700 V. An explanation for the difference in VBR is sought in terms of the structural/chemical changes introduced at the interface by the annealing process. The high forward drop of TaN to p-silicon diodes (>1 V at 10 mA) results from the high substrate resistance and the probe contact resistance, and it is being optimized  相似文献   

11.
The field at the tip of a field emitter triode can be expressed by EVg+γV c, where Vg and Vc the gate and collector voltages, respectively. For small gate diameters and tips below or in the plane of the gate and/or large tip-to-collector distances, γVc<<βV g. The-device is operated in the gate-induced field emission mode and the corresponding I-Vc curves are pentode-like. By increasing the gate diameter and/or recessing the gates from the tips, collector-assisted operation can be achieved at reasonable collector voltages. Results are presented for two devices with gate diameters of 3.6 and 2.0 μm. By obtaining γ at different emitter-to-collector distances, I-Vc and transconductance gm-Vg curves are calculated and compared with experimental results. It is shown that as a consequence of collector-assisted operation, the transconductance of a device can be increased significantly  相似文献   

12.
The authors present a technique to determine the work-function difference from a plot of the threshold voltage (VT) versus oxide thickness (Tox) curve. The extraction errors caused by the electrical characteristics of the oxide and the SiO 2/Si interface can be minimized by the VT-Tox technique. The boron segregation coefficient can be calibrated from the slope of the VT -Tox curve. Comparisons between the experimental data and simulation results are made, and good agreement is obtained  相似文献   

13.
Nonequilibrium electron transport phenomena in the emitter and collector regions under high bias conditions were investigated for standard N-p-n (AlGa)As/GaAs heterojunction bipolar transistors (HBTs) by utilizing a previously developed one-dimensional self-consistent particle simulator. A dramatic increase in the cutoff frequency was observed for a lightly doped collector HBT as the current density increased over 105 A/cm2, where the collector transit time was reduced due to the extension of the velocity overshoot region in the collector corresponding to the decrease in electric field near onset of the Kirk effect. A saturation tendency was seen in the collector current versus base-to-emitter bias voltage (VBE ) characteristic for high VBE, where VBE exceeded the base-to-emitter built-in voltage of the conduction band. Simulations indicate that this feature is caused by electron velocity saturation in the neutral n-type (AlGa)As emitter region  相似文献   

14.
A theoretical investigation of Si/Si1-xGex heterojunction bipolar transistors (HBTs) undertaken in an attempt to determine their speed potential is discussed. The analysis is based on a compact transistor model, and devices with self-aligned geometry, including both extrinsic and intrinsic parameters, are considered. For an emitter area of 1×5 μm2, an ft of over 75 GHz and fmax of over 35 GHz were computed at a collector current density of 1×10 5 A/cm2 and VCB of 5 V  相似文献   

15.
The first N-p-n InP/InGaAs heterojunction bipolar transistors (HBTs) with p-type carbon doping in InGaAs are reported. P-type carbon doping in the InGaAs base has been achieved by gas-source molecular beam epitaxy (GSMBE) using carbon tetrachloride (CCl4) as the dopant source. The resulting hole concentration in the base was 1×1019 cm-3. HBTs fabricated using material from this growth method display good I-V characteristics with DC current gain above 500. This verifies the ability to use carbon doping to make a heavily p-type InGaAs base of an N-p-n HBT  相似文献   

16.
In order to achieve 3.3-V 1-Gb DRAM and beyond, a new on-chip supply voltage conversion scheme that converts 3.3-V external supply voltage, Vext, to lowered 1.5-V internal supply voltage, Vent, without any power loss within the voltage converter is proposed. This scheme connects two identical DRAM circuits in series between Vixt and Vss. By operation of two DRAM circuits with the same clock timing, the voltage between two DRAMs, Vint, is automatically fixed to 1/2Vext. Therefore, each upper and lower DRAM circuit can operate at lowered 1/2Vext without use of the conventional voltage converter. This scheme was successfully verified by an experimental system using 4-Mb DRAMs. Utilizing the proposed scheme, power dissipation was reduced by as much as 50% and stable operation was achieved without access speed penalty  相似文献   

17.
Hot-carrier degradation of W gate PMOSFETs, which are surface-channel devices because of the work function of W, has been investigated in comparison with polycide (WSix/n+ poly-Si) ones. In W gate PMOSFETs, transconductance gm and threshold voltage Vth decrease on the drain avalanche hot-carrier (DAHC) stress, and Δgm /gm0 and ΔVth become minimum at VGVD/2. By using the charge-pumping technique, it is found that, after stressing at the same stress condition, the interface state density of W gate devices is about 10 times larger than that of polycide ones but the densities of trapped electrons are almost equal. These results indicate that the difference of hot-carrier degradation between W and polycide gate devices is mainly caused by the difference of the interface state density  相似文献   

18.
An experimental technique for accurately determining both the inversion charge and the channel mobility μ of a MOSFET is presented. With this new technique, the inversion charge is measured as a function of the gate and drain voltages. This improvement allows the channel mobility to be extracted independent of drain voltage VDS over a wide range of voltages (VDS=20-100 mV). The resulting μ(VGS) curves for different VDS show no drastic mobility roll-off at V GS near VTH. This suggests that the roll-off seen in the mobility data extracted using the split C- V method is probably due to inaccurate inversion charge measurements instead of Coulombic scattering  相似文献   

19.
An analytical expression for the recombination current in a forward-biased p-n junction is derived and it is shown that formulas given for the recombination current in most textbooks overestimate the recombination current by a large factor of the order of (Vbi-V)/Vth where V bi is the built-in voltage, V is the applied forward-bias voltage, and Vth is the thermal voltage  相似文献   

20.
Si/SiGe heterojunction bipolar transistors (HBTs) were fabricated by growing the complete layer structure with molecular beam epitaxy (MBE). The typical base doping of 2×1019 cm-3 largely exceeded the emitter impurity level and led to sheet resistances of about 1 kΩ/□. The devices exhibited a 500-V Early voltage and a maximum room-temperature current gain of 550, rising to 13000 at 77 K. Devices built on buried-layer substrates had an fmax of 40 GHz. The transit frequency reached 42 GHz  相似文献   

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