可重构资源管理及硬件任务布局的算法研究

可重构系统具有微处理器的灵活性和接近于ASIC的计算速度,可重构硬件的动态部分重构能力能够实现计算和重构操作的重叠,使系统能够动态地改变运行任务,可重构资源管理和硬件任务布局方法是提高可重构系统性能的关键.提出了基于任务上边界计算最大空闲矩形的算法(TT-KAMER),能够有效地管理系统的空闲可重构资源;在此基础上使用FF和启发式BF算法进行硬件任务的布局.实验表明,算法能够有效地实现在线资源分配与任务布局,获得较高的资源利用率.     

采用配置完成优先策略的可重构任务调度算法

如何隐藏和减少配置时间是相依性可重构任务调度的关键问题.提出一种采用配置完成优先策略的相依性可重构任务调度算法,通过基于预配置优先级的列表调度算法,实现将后续任务的配置时间隐藏于前驱任务的运行时间中,并采用基于配置完成优先策略的配置重用机制,减少了任务调度后的配置过程,从而在总体上缩短了相依性任务集合的运行时间.仿真结果表明,该调度算法能有效避免调度死锁,并可减少相依性可重构任务的整体运行时间.     

Architecture and operating system support for two-dimensional runtime partial reconfiguration

Reconfigurable machines based on field programmable gate array (FPGA) chips adapt to applications’ needs through hardware reconfiguration. Partial reconfiguration allows the configuration of a portion of a chip while the rest of the chip is busy working on tasks. This paper considers a two-dimensional partially reconfigurable FPGA chip that allows the dynamic swap in and out of circuit modules. Such a chip supports the concurrent execution of multiple applications or an application that is otherwise too large to fit. A challenging issue for 2-D runtime partial reconfiguration is how to support the efficient connection, or routing, between circuit modules or between modules and I/O pins, when those modules may be placed on any area of a chip. Because commercial chips are not efficient in 2-D runtime routing, a new FPGA architecture is proposed based on an array of clusters of configurable logic blocks and a mesh of segmented buses. To evaluate the runtime performance of the architecture, an operating system is specified and implemented which takes care of the scheduling, placement, and routing of circuits on the architecture. Simulation is used to evaluate the efficiency of the OS kernel and to determine the optimal cluster size of the architecture.     

一种采用边界表进行可重构资源管理及硬件任务调度的算法

可重构计算兼具硬件的高效性和软件的灵活性,发挥可重构计算的高性能,对可重构资源及硬件任务进行有效管理和科学调度是关键.针对一维可重构器件中硬件任务调度问题,提出一种基于边界表的可重构资源管理方法,该方法用“边界表”数据结构记录R-T坐标系中的区域边界及其位置关系,实现对可重构资源的管理.以此为基础,提出了R-T坐标系下的任务调度及布局算法：BT-P算法,实现硬件任务的调度和布局.算法采用加权边界重叠长度作为任务调度的估值函数,与采用边界表的资源管理方法相结合,以较小的运行时开销实现调度的优化.实验表明,与Stuffing算法相比,BT-P算法下的可重构硬件的器件利用率随负载率的变化提高5%~11%,任务拒绝率随负载率和松弛因子的变化降低9%~11%,每个任务的平均调度布局时间开销在2~4μs之间.     

基于可重构系统的亚可抢占任务调度算法

针对目前在线调度算法忽略预留任务特殊性的问题,基于现有的放置策略,定义并证明一个可靠的基于最大邻接边数的放置策略。提出一种基于亚可抢占性的任务调度算法,即剥夺预留任务所占用的可重构资源再进行统一离线调度。实验表明,与已有算法相比,该算法具有更高的任务接受率和芯片利用率,且并未明显增加运行时的开销。     

基于放置代价的可重构系统任务统一调度算法

高效的任务调度算法对可重构系统的性能有极大的影响。针对目前可重构系统任务在线调度算法的不足,提出了一种基于放置代价的调度算法。该算法考虑了3种代价,分别为:硬件任务在FPGA上的执行时间、占用的FPGA面积以及FPGA的碎片情况,并且也考虑了软硬件任务的统一调度。在调度过程中,当代价超过设定的阈值时,就拒绝其在FPGA上运行,并由CPU执行其软实现。通过合理地拒绝一些代价较大的任务,能够从整体上提高任务调度成功率。实验表明,同已有算法相比,该算法能够获得更高的任务截止保证率。     

Online scheduling and placement of hardware tasks with multiple variants on dynamically reconfigurable field-programmable gate arrays

Hardware task scheduling and placement at runtime plays a crucial role in achieving better system performance by exploring dynamically reconfigurable Field-Programmable Gate Arrays (FPGAs). Although a number of online algorithms have been proposed in the literature, no strategy has been engaged in efficient usage of reconfigurable resources by orchestrating multiple hardware versions of tasks. By exploring this flexibility, on one hand, the algorithms can be potentially stronger in performance; however, on the other hand, they can suffer much more runtime overhead in selecting dynamically the best suitable variant on-the-fly based on its runtime conditions imposed by its runtime constraints. In this work, we propose a fast efficient online task scheduling and placement algorithm by incorporating multiple selectable hardware implementations for each hardware request; the selections reflect trade-offs between the required reconfigurable resources and the task runtime performance. Experimental studies conclusively reveal the superiority of the proposed algorithm in terms of not only scheduling and placement quality but also faster runtime decisions over rigid approaches.     

面向可重构系统的eCos拓展

针对可重构系统中任务模型灵活性差、硬件任务重构延时长、FPGA资源利用率低等问题,提出了将应用程序划分为软件任务和混合任务的划分模式,并在eCos的基础上,通过重构控制机制、混合任务管理机制、通信机制三方面的拓展,设计了支持可重构系统的嵌入式操作系统框架eCos4RC。仿真结果表明,eCos4RC实现了对混合任务的有效管理,在兼容eCos多线程机制的同时提高了应用程序执行速度和可重构资源利用率,为可重构计算平台提供了良好的运行环境支持。     

Customized kernel execution on reconfigurable hardware for embedded applications

To conserve space and power as well as to harness high performance in embedded systems, high utilization of the hardware is required. This can be facilitated through dynamic adaptation of the silicon resources in reconfigurable systems in order to realize various customized kernels as execution proceeds. Fortunately, the encountered reconfiguration overheads can be estimated. Therefore, if the scheduling of time-consuming kernels considers also the reconfiguration overheads, an overall performance gain can be obtained. We present our policy, experiments, and performance results of customizing and reconfiguring Field-Programmable Gate Arrays (FPGAs) for embedded kernels. Experiments involving EEMBC (EDN Embedded Microprocessor Benchmarking Consortium) and MiBench embedded benchmark kernels show high performance using our main policy, when considering reconfiguration overheads. Our policy reduces the required reconfigurations by more than 50% as compared to brute-force solutions, and performs within 25% of the ideal execution time while conserving 60% of the FPGA resources. Alternative strategies to reduce the reconfiguration overhead are also presented and evaluated.     

一种面向动态可重构计算的调度算法

硬件任务的调度是影响动态可重构系统性能的关键因素之一.提出一种任务间最小空隙调度算法MGS(minimum gap scheduling algorithm) ,该算法借助任务投影和调度代价函数,采用二维时空坐标系协调各硬件任务占用的芯片资源和执行时间,可有效减少系统资源浪费,提高并行度. MGS算法策略直观,调度开销小,且同时适用于实时和非实时场合.仿真实验表明,与已有算法相比,MGS算法不但降低了硬件任务的调度时间开销,而且具有更高的芯片利用率和更低的任务拒绝率.     

可重构系统中的实时任务在线调度与放置算法

有效的任务调度与放置是发挥可重构计算性能优势的重要因素.针对实时任务在二维可重构器件上的在线调度问题,定义了调度算法完全识别的概念,即算法不会拒绝能够成功调度的任务.提出了新的实时在线调度与放置算法,充分利用了任务的时间信息,实现了完全识别的调度.实验表明,与已有的算法相比,新算法显著地改善了调度效果,而运行开销没有明显增加.     

可重配置实时任务的快速动态调度算法

要提出一种快速动态定位和实时任务调度算法,采用最早最迟开始时间优先、最优化空白区域管理和配置重用的调度原则,能够反映实时任务的紧迫度,快速地调度实时可配置硬件任务,同时有效地管理可重构资源．实验结果表明,该算法可以有效地提高系统的总体性能．     

Efficient task scheduling for runtime reconfigurable systems

Recent research indicates the promising performance of employing reconfigurable systems to accelerate multimedia and communication applications. Nonetheless, they are yet to be widely adopted. One reason is the lack of efficient operating system support for these platforms. In this paper, we address the problem of runtime task scheduling as a main part of the operating systems. To do so, a new task replacement parameter, called Time-Improvement, is proposed for compiler assisted scheduling algorithms. In contrast with most related approach, we validate our approach using real application workload obtained from an application for multimedia test remotely taken by students. The proposed online task scheduling algorithm outperforms previous algorithms and accelerates task execution from 4% up to 20%.     

Semi-static operator graphs for accelerated query execution on FPGAs

This paper introduces the concept of Semi-static Operator Graphs (SOG) to provide a runtime reconfigurable accelerator for query execution based on a Field Programmable Gate Array (FPGA). Instead of generating an FPGA configuration for a given arbitrary query during system runtime, we deploy a general query structure on the FPGA consisting of multiple small reconfigurable partitions (RP). During deployment of the hybrid database system, for each RP various query operators are prepared as reconfigurable modules (RM). At system runtime, the proposed approach dynamically chooses and reconfigures RMs into the RPs regarding a given query. As a result the reconfiguration overhead during system runtime is significantly reduced and enables the utilization of our hybrid architecture in real-world scenarios.     

Efficient algorithms for 2D area management and online task placement on runtime reconfigurable FPGAs

Partial Runtime Reconfigurable (PRTR) FPGAs allow HW tasks to be placed and removed dynamically at runtime. We make two contributions in this paper. First, we present an efficient algorithm for finding the complete set of Maximal Empty Rectangles on a 2D PRTR FPGA. We also present a HW implementation of the algorithm with negligible runtime overhead. Second, we present an efficient online deadline-constrained task placement algorithm for minimizing area fragmentation on the FPGA by using an area fragmentation metric that takes into account probability distribution of sizes of future task arrivals as well as the time axis. The techniques presented in this paper are useful in an operating system for runtime reconfigurable FPGAs to manage the HW resources on the FPGA when HW tasks that arrive and finish dynamically at runtime.     

Feasibility analysis under fixed priority scheduling with limited preemptions

Preemptive scheduling often generates a significant runtime overhead that may increase task worst-case execution times up to 40%, with respect to a fully non-preemptive execution. In small embedded systems, such an extra cost results in longer and more variable response times that can significantly affect the overall energy consumption, as well as the system predictability. Limiting preemptions is often possible without jeopardizing schedulability. Although several authors addressed schedulability analysis under different forms of limited preemptive scheduling, current results exhibit two major deficiencies: (i) The maximum lengths of the non-preemptive regions for each task are still unknown under fixed priorities; (i) The exact response time analysis for tasks with fixed preemption points is too complex.     

A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs

Current multimedia applications are characterized by highly dynamic and non-deterministic behaviour as well as high-performance requirements. Potentially, partially reconfigurable fine-grain configurable architectures like FPGAs can be reconfigured at run-time to match the dynamic behaviour. However, the lack of programming support for dynamic task placement as well as the large configuration overhead has prevented their use for highly dynamic applications. To cope with these two problems, we have adopted an FPGA model with specific support for task allocation. On top of this model, we have applied an existing hybrid design-time/run-time scheduling flow initially developed for multiprocessor systems. Finally, we have extended this flow with specific modules that greatly reduce the reconfiguration overhead making it affordable for current multimedia applications.     

Migration-aware adaptive MPSoC static schedules with dynamic reconfigurability

Technology scalings in semiconductors have enabled the integration of dozens of processing elements (PEs) onto a single chip (MPSoC). Scheduling application tasks onto the target MPSoC has been widely reported in the literature. Both technology scalings and resource competitions among applications have led to the variations of availability resources at runtime. While adaptive static schedules with predictable responses to runtime resource variations have consequently been proposed, a large number of task migrations upon PE failures in this reconfigurable schedule scheme will lead to excessive migration cost among processors and performance degradation. In this paper, we present an algorithm to reduce the number of task migrations while retaining the benefits of the fore techniques. Through embedding several soft constraints into the baseline heuristic scheduling algorithm, the proposed algorithm can decrease the number of task migrations significantly on the basis of holding the advantages of the initial dynamic reconfigurable schedule scheme. The performance evaluation of the proposed technique is carried out by incorporation into a well known heuristic scheduling algorithm. The simulation results confirm its effectiveness in minimizing the number of task migrations during dynamic reconfiguration.     

采用预配置策略的可重构混合任务调度算法

在对可重构硬件资源进行抽象的基础上,采用软硬件混合任务有向无环图来描述应用,提出一种基于列表的混合任务调度算法.该算法通过任务计算就绪顺序及可重构资源状态确定硬件任务的动态预配置优先级,按此优先级进行硬件任务预配置,隐藏硬件任务的配置时间,从而获得硬件任务运算加速.实验结果表明,针对可重构系统中的软硬件混合任务调度,能够有效地降低配置时间对应用执行时间的影响.     

Using imbalance metrics to optimize task clustering in scientific workflow executions

Scientific workflows can be composed of many fine computational granularity tasks. The runtime of these tasks may be shorter than the duration of system overheads, for example, when using multiple resources of a cloud infrastructure. Task clustering is a runtime optimization technique that merges multiple short running tasks into a single job such that the scheduling overhead is reduced and the overall runtime performance is improved. However, existing task clustering strategies only provide a coarse-grained approach that relies on an over-simplified workflow model. In this work, we examine the reasons that cause Runtime Imbalance and Dependency Imbalance in task clustering. Then, we propose quantitative metrics to evaluate the severity of the two imbalance problems. Furthermore, we propose a series of task balancing methods (horizontal and vertical) to address the load balance problem when performing task clustering for five widely used scientific workflows. Finally, we analyze the relationship between these metric values and the performance of proposed task balancing methods. A trace-based simulation shows that our methods can significantly decrease the runtime of workflow applications when compared to a baseline execution. We also compare the performance of our methods with two algorithms described in the literature.