500 GHz cutoff frequency SiGe HBTs

A current gain cutoff frequency f_T of 508 GHz is reported for a SiGe heterojunction bipolar transistor (HBT) operating at 40 K. This 63% increase over the 311 GHz value measured at room temperature results from the overall decrease of the transit and charging times. Two HBTs are compared to highlight the importance of the topology of the HBT to reach maximum performances.     

The effects of geometrical scaling on the frequency response andnoise performance of SiGe HBTs

We examine the geometrical scaling issues in SiGe HBT technology. Width Scaling, length scaling, and stripe-number scaling are quantified from a radio frequency (RF) design perspective at 2 GHz. We conclude that a SiGe HBT with emitter area A_E=0.5×20×6 μm² is optimum for low noise applications at J_c=0.1 mA/μm² and f=2 GHz using the design methodology, which guarantees optimal noise and input impedance matching with the simplest matching network. Finally, the optimal device sizes at f=4 and 6 GHz for low noise applications are also obtained using the same method     

A Tail-Injected Divide-by-4 SiGe HBT Injection Locked Frequency Divider

This letter presents a silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) divide-by-4 injection locked frequency divider (ILFD). The ILFD is based on a single-stage voltage-controlled oscillator with active-inductor, and was fabricated in the 0.35 mu m SiGe 3P3M BiCMOS technology. The divide-by-4 function is performed by injecting a signal to the base of the tail HBT. Measurement results show that when the supply voltage V_DD is 3.1 V and the tuning voltage is tuned from 2.0 to 2.8 V, the divider free-running oscillation frequency is tunable from 2.12 to 2.76 GHz, and at the incident power of 0 dBm the operation range is about 1.15 GHz, from the incident frequency 8.55 to 9.7 GHz. The die area is 0.65 times 0.435 mm².     

AlGaAs/GaAs HBT电压比较器

本文对异质结双极晶体管(HBT)电压比较器进行了理论分析,设计并制作了国内第一个AlGaAs/GaAs HBT电压比较器电路。首先,分析了HBT的基本工作原理;然后比较详细地分析了ECL电压比较器的工作原理并进行了设计。随后介绍了HBT的E-M模型,提取了模型参数,并对电路进行了模拟;最后全面介绍了AlGaAs/GaAs HBT电压比较器的制作过程。测试结果表明,HBT器件直流电流增益大于100,f_T为15.2GHz,f_(max)为14.8GHz;电路具有取样和锁存能力,并具有电压比较器的初步功能。     

A Low-Noise 40-GS/s Continuous-Time Bandpass ∆Σ ADC Centered at 2 GHz for Direct Sampling Receivers

This paper presents a 40-GS/s continuous-time bandpass DeltaSigma analog-to-digital converter centered at 2 GHz for wireless base station applications. The ADC consists of a fourth-order loop with multiple feedback and is designed entirely in the s-domain. The circuit achieves an SNDR of 55 dB and 52 dB over bandwidths of 60 MHz and 120 MHz, respectively, and an SFDR of 61dB with a single-ended IIP3 of +4 dBm. The center frequency is tunable from 1.8 to 2 GHz. It employs a G_m-LC_VAR filter based on a MOS-HBT cascode transconductor with an NFMIN of 2.29 dB. The entire circuit is implemented in a 130-nm SiGe BiCMOS technology with 150-GHz f_T SiGe HBT and dissipates 1.6 W from a 2.5-V supply     

射频Si/SiGe/Si HBT的研究

在Si／SiGe／SiHBT与Si工艺兼容的研究基础上，对射频Si／SiGe／SiHBT的射频特性和制备工艺进行了研究，分析了与器件结构有关的关键参数寄生电容和寄生电阻与Si／SiGe/Si HBT的特征频率fT和最高振荡频率fmax的关系，成功地制备了fT为2．5CHz、fmax为2．3GHz的射频Si／SiGe／SiHBT，为具有更好的射频性能的Si／SiGe／Si HBT的研究建立了基础。     

SiGe HBT and BiCMOS technologies for optical transmission and wireless communication systems

Technologies for a self-aligned SiGe heterojunction bipolar transistor (HBT) and SiGe HBTs with CMOS transistors (SiGe BiCMOS) have been developed for use in optical transmission and wireless communication systems. n-Si cap/SiGe-base multilayer fabricated by selective epitaxial growth (SEG) was used to obtain both high-speed and low-power performance for the SiGe HBTs. The process except the SEG is almost completely compatible with well-established Si bipolar-CMOS technology, and the SiGe HBT and BiCMOS were fabricated on a 200-mm wafer line. High-quality passive elements, i.e., high-precision poly-Si resistors, a high-Q varactor, an MIM capacitor, and high-Q spiral inductors have also been developed to meet the demand for integration of the sophisticated functions. A cutoff frequency of 130 GHz, a maximum oscillation frequency of 180 GHz, and an ECL gate-delay time of 5.3 ps have been demonstrated for the SiGe HBTs. An IC chipset for 40-Gb/s optical-fiber links, a single-chip 10-Gb/s transceiver large-scale IC (LSI), a 5.8-GHz electronic toll collection transceiver IC, and other practical circuits have been implemented by applying the SiGe HBT or BiCMOS technique.     

A 0.2-μm self-aligned selective-epitaxial-growth SiGe HBTfeaturing 107-GHz fmax and 6.7-ps ECL

A 0.2-μm self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistor (HBT), with shallow-trench and dual-deep-trench isolations and Ti-salicide electrodes, has been developed. The 0.6-μm-wide Si-cap/SiGe-base multilayer was selectively grown by UHV/CVD. The process, except the SEG, is almost completely compatible with well-established bipolar-CMOS technology and the SiGe HBTs were fabricated on a 200-mm wafer line. The SiGe HBTs have demonstrated a peak cutoff frequency of 90 GHz, a peak maximum oscillation frequency of 107 GHz, and an ECL gate delay time of 6.7 ps. Four-level interconnects, including MIM capacitors and high-Q inductors, were formed by chemical mechanical polishing     

SiGe HBT的速度优化设计

从理论分析角度介绍了优化SiGe异质结晶体管速度的方法。结合双极晶体管的工艺限制，介绍了SiGeHBT的基本原理，讨论了SiGeHBT的发射区／基区／集电区设计。最后，以一个100GHzfmax和fT的HBT为例，对电路制作工艺参数进行了讨论。     

3–10-GHz Ultra-Wideband Low-Noise Amplifier Utilizing Miller Effect and Inductive Shunt–Shunt Feedback Technique

In this paper, we demonstrate an SiGe HBT ultra-wideband (UWB) low-noise amplifier (LNA), achieved by a newly proposed methodology, which takes advantage of the Miller effect for UWB input impedance matching and the inductive shunt-shunt feedback technique for bandwidth extension by pole-zero cancellation. The SiGe UWB LNA dissipates 25.8-mW power and achieves S₁₁ below -10 dB for frequencies from 3 to 14 GHz (except for a small range from 10 to 11 GHz, which is below -9 dB), flat S₂₁ of 24.6 plusmn 1.5 dB for frequencies from 3 to 11.6 GHz, noise figure of 2.5 and 5.8 dB at 3 and 10 GHz, respectively, and good phase linearity property (group-delay variation is only plusmn28 ps across the entire band). The measured 1-dB compression point (P₁ dB) and input third-order intermodulation point are -25.5 and -17 dBm, respectively, at 5.4 GHz.     

A 0.2-μm 180-GHz-fmax 6.7-ps-ECL SOI/HRS self-alignedSEG SiGe HBT/CMOS technology for microwave and high-speed digitalapplications

A technology for combining 0.2-μm self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistors (HBTs) with CMOS transistors and high-quality passive elements has been developed for use in microwave wireless and optical communication systems. The technology has been applied to fabricate devices on a 200-mm SOI wafer based on a high-resistivity substrate (SOI/HRS). The fabrication process is almost completely compatible with the existing 0.2-μm bipolar-CMOS process because of the essential similarity of the two processes. SiGe HBTs with shallow-trench isolations (STIs) and deep-trench isolations (DTIs) and Ti-salicide electrodes exhibited high-frequency and high-speed capabilities with an f_max of 180 GHz and an ECL-gate delay of 6.7 ps, along with good controllability and reliability and high yield. A high-breakdown-voltage HBT that could produce large output swings for the interface circuit was successfully added. CMOS devices (with gate lengths of 0.25 μm for nMOS and 0.3 μm for pMOS) exhibited excellent subthreshold slopes. Poly-Si resistors with a quasi-layer-by-layer structure had a low temperature coefficient. Varactors were constructed from the collector-base junctions of the SiGe HBTs. MIM capacitors were formed between the first and second metal layers by using plasma SiO₂ as an insulator. High-Q octagonal spiral inductors were fabricated by using a 3-μm thick fourth metal layer     

The enhancement of Q factor in RPCVD SiGe varactors by the structural modification of the base-collector junction

We designed two silicon germanium (SiGe) varactors enhanced in Q factor through a structural modification by using a cost-effective SiGe heterostructure bipolar transistor (HBT) process, a conventional reduced-pressure chemical vapor deposition (RPCVD). As a result, the suggested structures showed a superiority in Q factor (160/GHz/pF at 2.5 GHz) to the conventional one (70/GHz/pF), even with neither a change in process nor an additional mask. We attributed the enhancement of Q factor to the structural feature of the varactors and quantitatively analyzed it with a lumped element model.     

超高压SiGe HBT器件结构及制作工艺研究

介绍了一种超高压锗硅异质结双极晶体管(SiGe HBT)的器件结构及制作工艺。该器件增大了N型赝埋层到有源区的距离,采用厚帽层锗硅基区及低浓度发射区的制作工艺,以提高SiGe HBT的击穿电压;在基区和发射区之间利用快速热处理提高工艺稳定性,并使HBT的电流增益(β)恢复到原来水平,以弥补厚帽层锗硅基区及低发射区浓度造成的电流增益降低。基区断开时,发射区到集电区的击穿电压(BVCEO)提高至10V,晶体管特征频率达到20GHz。     

Cryogenic operation of third-generation, 200-GHz peak-f/sub T/, silicon-germanium heterojunction bipolar transistors

We present a comprehensive investigation of the cryogenic performance of third-generation silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technology. Measurements of the current-voltage (dc), small-signal ac, and broad-band noise characteristics of a 200-GHz SiGe HBT were made at 85 K, 120 K, 150 K, 200 K, and 300 K. These devices show excellent behavior down to 85 K, maintaining reasonable dc ideality, with a peak current gain of 3800, a peak cut-off frequency (f/sub T/) of 260 GHz, a peak f/sub max/ of 310 GHz, and a minimum noise figure (NF/sub min/) of approximately 0.30 dB at a frequency of 14 GHz, in all cases representing significant improvements over their corresponding values at 300 K. These results demonstrate that aggressively scaled SiGe HBTs are inherently well suited for cryogenic electronics applications requiring extreme levels of transistor performance.     

Single-Chip W-band SiGe HBT Transceivers and Receivers for Doppler Radar and Millimeter-Wave Imaging

This paper presents the first single-chip direct-conversion 77-85 GHz transceiver fabricated in SiGe HBT technology, intended for Doppler radar and millimeter-wave imaging, particularly within the automotive radar band of 77-81 GHz. A 1.3 mm times 0.9 mm 86-96 GHz receiver is also presented. The transceiver, fabricated in a 130 nm SiGe HBT technology with f_T/f_MAX of 230/300 GHz, consumes 780 mW, and occupies 1.3 mm times 0.9 mm of die area. Furthermore, it achieves 40 dB conversion gain in the receiver at 82 GHz, a 3 dB bandwidth extending from 77 to 85 GHz at 25degC, and covering the entire 77-81 GHz band up to 100degC, record 3.85 dB DSB noise figure measured at 82 GHz LO and 1 GHz IF, and an IP_1dB of -35 dBm. The transmitter provides + 11.5 dBm of saturated output power at 77 GHz, and a divide64 static frequency divider is included on-die. Successful detection of a Doppler shift of 30 Hz at a range of 6 m is shown. The 86-96 GHz receiver achieves 31 dB conversion gain, a 3 dB bandwidth of 10 GHz, and 5.2 dB DSB noise figure at 96 GHz LO and 1 GHz IF, and -99 dBc/Hz phase noise at 1 MHz offset. System-level layout and integration techniques that address the challenges of low-voltage transceiver implementation are also discussed.     

A 16-GHz ultra-high-speed Si-SiGe HBT comparator

This paper presents an improved master-slave bipolar Si-SiGe HBT comparator design for ultra-high-speed data converter applications. The latch is maintained during the track stage facilitating quick transition back to the latch stage, increasing the sampling speed of the comparator. Implemented in a 0.5-/spl mu/m 55-GHz BiCMOS Si-SiGe process, this comparator consumes approximately 80 mW with sampling speeds up to 16 GHz.     

A 6-b, 4 GSa/s GaAs HBT ADC

A GaAs-AlGaAs heterojunction bipolar transistor (HBT) process was developed to meet the speed, gain, and yield requirements for analog-to-digital converters (ADC's). The HBT has current gain of over 100 and f_T and f_MAX of over 50 GHz. A 6-b, 4 GSa/s (4 giga-samples/s) ADC was designed and fabricated in this process. The ADC uses an analog folding architecture, includes an on-chip master-slave track-and-hold (T/H) circuit, and provides Gray-encoded digital outputs. The ADC achieves 5.6 effective bits at 4 GSa/s, a faster clock rate than any noninterleaved semiconductor ADC reported to date. It has a resolution bandwidth (the frequency at which effective bits has dropped by 0.5 b) of 1.8 GHz at 4 GSa/s, higher than any published ADC. The chip operates at up to 6.5 GSa/s. GaAs HBT IC's are especially prone to high operating temperatures. This led to reliability problems that were overcome by the use of a fast DC thermal simulator written for this project. A SPICE model for self-heating effects is also described     

A Large Swing, 40-Gb/s SiGe BiCMOS Driver With Adjustable Pre-Emphasis for Data Transmission Over 75 $Omega$ Coaxial Cable

A fully differential 40-Gb/s cable driver with adjustable pre-emphasis is presented. The circuit is fabricated in a production 0.18 mum SiGe BiCMOS technology. A distributed limiting architecture is used for the driver employing high-speed HBTs in the lower voltage predriver, and a high-breakdown MOS-HV-HBT cascode, consisting of a 0.18 mum n-channel MOSFET and a high-voltage HBT (HV-HBT), for the high voltage output stages. The circuit delivers up to 3.6 V peak-to-peak per side into a 75 Omega load with variable pre-emphasis ranging from 0 to 400%. S-parameter measurements show 42 dB differential small-signal gain, a 3-dB bandwidth of 22 GHz, gain peaking control up to 25 dB at 20 GHz and input and output reflection coefficients better than -10 dB up to 40 GHz. Additional features of the driver include output amplitude control (from 1 V_pp to 3.6 V_pp per side), pulse-width control (35% to 65%) and an adjustable input dc level (1.1 V to 1.8 V) allowing the circuit to interface with a SiGe BiCMOS or MOS-CML SERDES. The transmitter is able to generate an eye opening at 38 Gb/s after 10 m of Belden 1694 A coaxial cable which introduces 22 dB of loss at 19 GHz. Measurement results also demonstrate that the transmitter IC operates as a standalone equalizer for 10-Gb/s data transmission over 40 m of Belden cable without the need for receiver equalization.     

TiSi2在微波低噪声SiGe HBT中的应用

通过在SiGe HBT外基区和多晶发射极上制作TiSi2,从而使器件的高频噪声系数得到进一步降低.以PD=200mW的SiGe HBT为例,采用TiSi2工艺的噪声系数典型值为F=1.6dB@1.1GHz,明显低于无TiSi2工艺SiGe HBT的2.0dB@1.1GHz,且频率越高,二者差别越大.     

Algorithmic Design of CMOS LNAs and PAs for 60-GHz Radio

Sixty-gigahertz power (PA) and low-noise (LNA) amplifiers have been implemented, based on algorithmic design methodologies for mm-wave CMOS amplifiers, in a 90-nm RF-CMOS process with thick 9-metal-layer Cu backend and transistor f_T/f_MAX of 120 GHz/200 GHz. The PA, fabricated for the first time in CMOS at 60 GHz, operates from a 1.5-V supply with 5.2 dB power gain, a 3-dB bandwidth >13 GHz, a P _1dB of +6.4 dBm with 7% PAE and a saturated output power of +9.3 dBm at 60 GHz. The LNA represents the first 90-nm CMOS implementation at 60 GHz and demonstrates improvements in noise, gain and power dissipation compared to earlier 60-GHz LNAs in 160-GHz SiGe HBT and 0.13-mum CMOS technologies. It features 14.6 dB gain, an IIP ₃ of -6.8 dBm, and a noise figure lower than 5.5 dB, while drawing 16 mA from a 1.5-V supply. The use of spiral inductors for on-chip matching results in highly compact layouts, with the total PA and LNA die areas with pads measuring 0.35times0.43 mm² and 0.35times0.40 mm², respectively