A wafer-level hermetic encapsulation for MEMS manufacture application

In order to simplify the processing complexity and cut down the manufacturing cost, a new wafer bonding technique using ultraviolet (UV) curable adhesive is introduced here for microelectromechanical systems (MEMS) device packaging and manufacturing applications. UV curable adhesive is cured through UV light exposure without any heating process that is suitable for the packaging of temperature-sensitive materials or devices. A Pyrex 7740 glass is chemically wet etched to form microcavities and utilized as the protection cap substrate. After a UV-curable adhesive is spin-coated onto the glass substrate, the substrate is then aligned and bonded through UV light exposure with a device substrate below. Electrical contact pad opening and die separation are done simultaneously by dicing. Two different testing devices, a dew point sensor and capacitive accelerometer, are built to evaluate the package strength and hermeticity. After the dicing process, no structural damage or stiction phenomenon is found in the packaged parallel capacitor. The acceleration test results also indicate that the package using the Loctite 3491 UV adhesive with 150 /spl mu/m bond width can survive more than 300 days at a 25/spl deg/C and 100% relative humidity working environment.     

MEMS封装中真空封口及真空度检测技术

通过对MEMS封装技术进行研究攻关，突破了针对微机械陀螺仪器件性能发挥所需的真空封口技术及真空度检测技术，使器件品质因数提高将近10倍。     

MEMS封装中真空封口及真空度检测技术

通过对MEMS封装技术进行研究攻关 ,突破了针对微机械陀螺仪器件性能发挥所需的真空封口技术及真空度检测技术 ,使器件品质因数提高将近 10倍     

Localized bonding processes for assembly and packaging of polymeric MEMS

Localized bonding schemes for the assembly and packaging of polymer-based microelectromechanical systems (MEMS) devices have been successfully demonstrated. These include three bonding systems of plastics-to-silicon, plastics-to-glass, and plastics-to-plastics combinations based on two bonding processes of localized resistive heating: 1) built-in resistive heaters and 2) reusable resistive heaters. In the prototype demonstrations, aluminum thin films are deposited and patterned as resistive heaters and plastic materials are locally melted and solidified for bonding. A typical contact pressure of 0.4 MPa is applied to assure intimate contact of the two bonding substrates and the localized bonding process is completed within less than 0.25 s of heating. It is estimated that the local temperature at the bonding interface can reach above 150/spl deg/C while the substrate temperature away from the heaters can be controlled to be under 40/spl deg/C during the bonding process. The approach of localized heating for bonding of plastic materials while maintaining low temperature globally enables direct sealing of polymer-based MEMS without dispensing additional adhesives or damaging preexisting, temperature-sensitive substances. Furthermore, water encapsulation by plastics-to-plastics bonding is successfully performed to demonstrate the capability of low temperature processing. As such, this technique can be applied broadly in plastic assembly, packaging, and liquid encapsulation for microsystems, including microfluidic devices.     

真空键合技术制作三层结构的MEMS器件的研究

采用真空键合技术，成功地将表面具有深度不同的硅槽或框架结构的硅圆片与另外两个硅圆片贴合形成三层夹心结构，经高温退火处理，得到一种粘合牢固的硅“三明治”体。这种“三明治”体的上下两个硅片仍可进行IC加工，为MEMS传感部分和测试电路的三维一体化集成打下了坚实的基础。     

真空键合技术制作三层结构的MEMS器件的研究

采用真空键合技术 ,成功地将表面具有深度不同的硅槽或框架结构的硅圆片与另外两个硅圆片贴合形成三层夹心结构 ,经高温退火处理 ,得到一种粘合牢固的硅“三明治”体。这种“三明治”体的上下两个硅片仍可进行IC加工 ,为MEMS传感部分和测试电路的三维一体化集成打下了坚实的基础     

用于MEMS器件芯片级封装的金-硅键合技术研究

MEMS器件大都含有可动的硅结构，在器件加工过程中，特别是在封装过程中极易受损，大大影响器件的成品率。如果能在MEMS器件可动结构完成以后，加上一层封盖保护，可以显著提高器件的成品率和可靠性。本文提出了一种用于MEMS芯片封盖保护的金-硅键合新结构，实验证明此方法简单实用，效果良好。该技术与器件制造工艺兼容，键合温度低，有足够的键合强度，不损坏器件结构，实现了MEMS器件的芯片级封装。我们已经将此技术成功地应用于射流陀螺的制造工艺中。     

用于MEMS器件芯片级封装的金-硅键合技术研究

MEMS器件大都含有可动的硅结构 ,在器件加工过程中 ,特别是在封装过程中极易受损 ,大大影响器件的成品率。如果能在MEMS器件可动结构完成以后 ,加上一层封盖保护 ,可以显著提高器件的成品率和可靠性。本文提出了一种用于MEMS芯片封盖保护的金 硅键合新结构 ,实验证明此方法简单实用 ,效果良好。该技术与器件制造工艺兼容 ,键合温度低 ,有足够的键合强度 ,不损坏器件结构 ,实现了MEMS器件的芯片级封装。我们已经将此技术成功地应用于射流陀螺的制造工艺中     

Wafer-level hermetic MEMS packaging by anodic bonding and its reliability issues

This paper reviews wafer-level hermetic packaging technology using anodic bonding from several reliability points of view. First, reliability risk factors of high temperature, high voltage and electrochemical O₂ generation during anodic bonding are discussed. Next, electrical interconnections through a hermetic package, i.e. electrical feedthrough, is discussed. The reliability of both hermetic sealing and electrical feedthrough must be simultaneously satisfied. In the last part of this paper, a new wafer-level MEMS packaging material, anodically-bondable low temperature cofired ceramic (LTCC) wafer, is introduced, and its reliability data on hermetic sealing, electrical interconnection and flip-chip mounting on a printed circuit board (PCB) are described.     

Electrical test strategies for a wafer-level packaging technology

A wafer-level packaging (WLP) technology is under development that provides compliant electrical leads with a density as high as 12,000 per cm/sup 2/. The leads are batch processed while the integrated circuits are still in wafer form through a series of relatively simple photolithographic steps. After electrical testing, the wafers are diced and the integrated circuits (ICs) are ready for direct assembly to an interconnect substrate. Sufficient lateral and vertical compliance is provided by the leads to accommodate the nonplanarity encountered during assembly and the thermal mismatch between the IC and substrate during normal operation. The high density of compliant leads presents both challenges and opportunities for electrical testing. This paper first summarizes the process technology used to fabricate these high-density electrical contacts. Several potential test strategies are then introduced that may take advantage of these contacts.     

Outgassing study of thin films used for poly-SiGe based vacuum packaging of MEMS

Thermal desorption spectroscopy (TDS) was used to study outgassing from polycrystalline SiGe (poly-SiGe), SiC and SiO₂ films used for poly-SiGe-based MEMS thin film vacuum package technology. Primary desorption products were found to be H₂, H₂O and CO₂. The CO₂ outgassing could be correlated with CF₄ plasma interface cleaning used for thick SiGe PECVD, which can leave carbon at the CF₄-plasma-cleaned interface.     

A three-scale approach to the numerical simulation of metallic bonding for MEMS packaging

In this work we present a numerical, multi-scale approach to estimate the strength of a wafer-to-wafer metallic thermo-compression bonding. Following a top-down approach, the mechanical problem is handled at three different length scales. Taking into account control variables such as temperature, overall applied force over the wafer and contact surface roughness, it is shown that the proposed approach is able to provide an estimate of the sealing properties, especially in terms of bonding strength.     

Thermal solutions for discrete and wafer-level RF MEMS switch packages

In discrete radio frequency (RF) microelectromechanical systems (MEMS) packages, MEMS devices were fabricated on silicon or gallium arsenide (GaAs) chips. The chips were then attached to substrates with die attach materials. In wafer-level MEMS packages, the switches were manufactured directly on substrates. For both types of packages, when the switches close, a contact resistance of approximately 1 /spl Omega/ exists at the contact area. As a result, during switch operations, a considerable amount of heat is generated in the minuscule contact area. The power density at the contact area could be up to 1000 times higher than that of typical power amplifiers. The high power density may overheat the contact area, therefore affect switch performance and jeopardize long-term switch reliabilities. In this paper, thermal analysis has been performed to study the heat dissipation at the switch contact area. The goal is to control the "hot spots" and lower the maximum junction temperature at the contact area. A variety of chip materials, including Silicon, GaAs have been evaluated for the discrete packages. For each chip material, the effect of die attach materials has been considered. For the wafer-level packages, various substrate materials, such as ceramic, glass, and low-temperature cofired ceramic (LTCC) have been studied. Thermal experiments have been conducted to measure the temperature at the contact area and its vicinity as a function of dc and RF powers. Several solutions in material selection and package configurations have been explored to enable the use of MEMS with chips or substrates with relatively poor thermal conductivity. For discrete MEMS packages, placing the die inside a copper cavity on the substrate provides significant heat dissipation. For wafer-level packages, thin diamond coatings on the substrate could reduce the hot-spot temperature considerably.     

Self-adaptive phosphor coating technology for wafer-level scale chip packaging

A new self-adaptive phosphor coating technology has been successfully developed,which adopted a slurry method combined with a self-exposure process.A phosphor suspension in the water-soluble photoresist was applied and exposed to LED blue light itself and developed to form a conformal phosphor coating with self-adaptability to the angular distribution of intensity of blue light and better-performing spatial color uniformity.The self-adaptive phosphor coating technology had been successfully adopted in the wafer surface to realize a waferlevel scale phosphor conformal coating.The first-stage experiments show satisfying results and give an adequate demonstration of the flexibility of self-adaptive coating technology on application of WLSCP.     

Effects of periphery encapsulation material on the characteristics of micro vacuum dielectric capacitor

The effects of the periphery sealant on the electrical characteristics of vacuum dielectric capacitors (VDCs) are modeled. For the square shape VDCs, their characteristics are predominantly determined by the ratio of capacitor side length versus the width of boundary sealant layer, r. The smaller of the r value, the smaller of the dissipation factor, and the better frequency response of the VDCs are found. To achieve a dissipation factor of less than 10⁻⁵ at 1 GHz, the dimension parameter, r, should be smaller than 0.05 which has been achieved based on the present technology for a capacitor with size larger than 4 mm × 4 mm. The leakage current can also be reduced significantly in the VDCs. We found that the leakage current is mainly governed by the Poole-Frenkel emission of electrons over the periphery region. The present results have demonstrated that the VDC structure is a promising technology option for making high-frequency micro capacitors.     

先进的MEMS封装技术

从特殊的信号界面、立体结构、外壳、钝化和可靠性五个方面总结了MEMS封装的特殊性。介绍了几种当前先进的MEMS封装技术：倒装焊MEMS、多芯片(MCP)和模块式封装(MOMEMS)。最后强调，必须加强MEMS封装的研究。     

MEMS圆片级气密封装微加热器阵列的设计和工艺研究

设计了500×500个微加热器阵列,加热线条宽度分别为5μm,7μm,9μm.采用离子束溅射、光刻、湿法腐蚀等工艺,在Si衬底上制作了微加热器,加热层材料为Ni/Cr, Au, 厚度分别为400nm, 200nm.采用直流电源对加热器进行供电,在红外热像仪下观察,随着电压、电流的增加,加热区温度上升很明显.测试结果表明,该加热器可以用于(MEMS)芯片级气密封装.     

MEMS圆片级气密封装微加热器阵列的设计和工艺研究

设计了 5 0 0× 5 0 0个微加热器阵列 ,加热线条宽度分别为 5 μm ,7μm ,9μm。采用离子束溅射、光刻、湿法腐蚀等工艺 ,在Si衬底上制作了微加热器 ,加热层材料为Ni/Cr ,Au ,厚度分别为4 0 0nm ,2 0 0nm。采用直流电源对加热器进行供电 ,在红外热像仪下观察 ,随着电压、电流的增加 ,加热区温度上升很明显。测试结果表明 ,该加热器可以用于 (MEMS)芯片级气密封装     

一维MEMS微镜静电弹性耦合

对静电驱动一维MEMS微镜中的静电弹性耦合问题进行了研究,分析了电极板的偏转变形与静电力的相互影响。为低品质因数的一维微镜系统建立了动态和静态模型,动态模型为一维扩散方程,静态模型由二阶微分方程表示。利用建立的模型对静电弹性耦合一维微镜系统的稳态特性进行分析,得出结论:静电力与弹性力的相对强度λ有一个临界值,当λ处于临界值以上时,系统将没有稳态解,设计的微镜结构应当保证λ处于临界值以下。     

Single wafer encapsulation of MEMS devices

Packaging of micro-electro-mechanical systems (MEMS) devices has proven to be costly and complex, and it has been a significant barrier to the commercialization of MEMS. We present a packaging solution applicable to several common MEMS devices, such as inertial sensors and micromechanical resonators. It involves deposition of a 20 /spl mu/m layer of epi-polysilicon over unreleased devices to act as a sealing cap, release of the encapsulated parts via an HF vapor release process, and a final seal of the parts in 7 mbar (700 Pa) vacuum. Two types of accelerometers, piezoresistive and capacitive sensing, were fabricated. Piezoresistive accelerometers with a footprint smaller than 3 mm/sup 2/ had a resolution of 10 /spl mu/g//spl radic/Hz at 250 Hz. Capacitive accelerometers with a 1 mm/sup 2/ footprint had a resolution of 1 mg/spl radic/Hz over its 5 kHz bandwidth. Resonators with a quality factor as high as 14,000 and resonant frequency from 50 kHz to 10 MHz have also been built. More than 100 capacitive accelerometers and 100 resonators were tested, and greater than 90% of the resonators and accelerometers were functional.