Passivation of HgCdTe p-n diode junction by compositionally graded HgCdTe formed by annealing in a Cd/Hg atmosphere

Cadmium telluride (CdTe) is being widely used for passivating the HgCdTe p-n diode junction. Instead of CdTe, we tried a compositionally graded HgCdTe as a passivation layer that was formed by annealing an HgCdTe p-n junction in a Cd/Hg atmosphere. During annealing, Cd diffuses into HgCdTe from the Cd vapor, while Hg diffuses out from HgCdTe, forming compositionally graded HgCdTe at the surface. The Cd mole fraction at the surface was constant regardless of the annealing temperature in the range of 250–350°C. Capacitance versus voltage (C-V) curves for p-type HgCdTe that were passivated with compositionally graded HgCdTe formed by Cd/Hg annealing at 260°C showed a smaller flat-band voltage than the one passivated by thermally deposited CdTe, indicative of the better quality of the passivation. A long-wave infrared (LWIR) HgCdTe p-n junction diode passivated by compositionally graded HgCdTe showed about a one order of magnitude smaller R_dA value than the one passivated by thermally deposited CdTe, confirming the effectiveness of the compositionally graded HgCdTe as a passivant.     

Engineering Interface Composition for Passivation of HgCdTe Photodiodes

A compositionally graded surface layer has been created for the passivation of Hg_1-xCd_xTe photodiodes. The graded CdTe-Hg_1-xCd_xTe interface was created by deposition of CdTe and subsequent annealing. It was found that the composition gradient and width of the graded region could be tailored by adopting a suitable annealing procedure. The effect of grading on the interface electrical properties and photoelectrical properties was studied by X-ray photoelectron spectroscopy (XPS), photoconductive decay, and C-V measurements. Insulator fixed-charge density and interface-trap density could be reduced to 3times10¹⁰ cm ^-2 and 2times10¹⁰ cm^-2middoteV^-1, respectively, by creating a graded interfacial composition. The interface conditions so engineered led to a low surface recombination velocity ~3000 cm/s. A direct correlation has been established between the process conditions, interfacial composition, and the electrical/photoelectrical properties of the CdTe-Hg_1-xCd_xTe heterostructures. The passivation layer formed by this method is shown to be suitable for the fabrication of high-performance infrared detectors     

A CdTe passivation process for long wavelength infrared HgCdTe photo-detectors

Passivant-Hg_1−xCd_xTe interface has been studied for the CdTe and anodic oxide (AO) passivants. The former passivation process yields five times lower surface recombination velocity than the latter process. Temperature dependence of surface recombination velocity of the CdTe/n-HgCdTe and AO/n-HgCdTe interface is analyzed. Activation energy of the surface traps for CdTe and AO-passivated wafers are estimated to be in the range of 7–10 meV. These levels are understood to be arising from Hg vacancies at the HgCdTe surface. Fixed charge density for CdTe/n-HgCdTe interface measured by CV technique is 5×10¹⁰ cm⁻², which is comparable to the epitaxially grown CdTe films. An order of magnitude improvement in responsivity and a factor of 4 increase in specific detectivity (D*) is achieved by CdTe passivation over AO passivation. This study has been conducted on photoconductive detectors to qualify the CdTe passivation process, with an ultimate aim to use it for the passivation of p-on-n and n-on-p HgCdTe photodiodes.     

Electrical characteristics of electroless gold contacts on p-type Hg1−xCdxTe

High contact resistance of the order of 10⁻³ Ω cm² observed in p-type HgCdTe is one of the practical problems in the production of fine pitch high operating temperature and avalanche photodiode detector array. Electrical and compositional measurements on Au/p-HgCdTe are reported to understand the difficulties in reducing the contact resistance in HgCdTe detectors. Characterization of Au contacts on p-type Hg_1−xCd_xTe (x=0.3) formed by electrode-less (electroless) process and current transport mechanism are discussed. SIMS depth profiling of interfacial layer formed by the reaction of gold chloride with HgCdTe have been analyzed. Extent of the interfacial layer containing Au, Te, O and Cl is found to increase with increasing deposition time. Effect of annealing on the migration of Au across the contact region and electrical characteristics are presented. Heavily doped HgCdTe region with N_A=10¹⁷ cm⁻³ is produced beneath the contact regions after annealing at 80 °C leading to an order of magnitude improvement in the specific contact resistance. These results are useful for the creation of Au/p-HgCdTe contacts in a controlled and reproducible manner.     

MBE原位碲化镉钝化的碲镉汞长波光电二极管列阵

采用分子束外延(MBE)技术在表面生长碲化镉(CdTe)介质膜的p型碲镉汞(HgCdTe)材料,并通过离子注入区的光刻、暴露HgCdTe表面的窗口腐蚀、注入阻挡层硫化锌(ZnS)的生长、形成p-n结的B+注入、注入阻挡层的去除、绝缘介质膜ZnS的生长、金属化和铟柱列阵的制备等工艺,得到了原位CdTe钝化的n+-on-p...     

A Study of Sidewall Effects in HgCdTe Photoconductors Passivated with MBE-Grown CdTe

In order to evaluate the effectiveness of CdTe surface passivating layers, HgCdTe photoconductors with and without CdTe sidewall passivation were fabricated. As expected, photoconductors with CdTe sidewall passivation demonstrated significantly higher responsivity in comparison with those without sidewall passivation, indicating the effectiveness of molecular-beam epitaxially (MBE)-grown CdTe as a passivation layer in reducing surface recombination velocity. Characterization of the responsivity differences between photoconductors with and without sidewall CdTe passivation offers a potential method for measuring the interface/surface recombination velocity. This has been demonstrated in this paper by extracting the value of the surface recombination velocity using the Synopsys Sentaurus commercial modeling package to fit experimental responsivity data for fully and partially passivated devices.     

多层HgCdTe异质外延材料的热退火应力分析

前期研究采用高温热处理方法,获得了抑制位错的最佳退火条件.通过比对实验,发现不同衬底上HgCdTe表面的CdTe钝化层在热处理过程中对位错的抑制作用各有不同.结合晶格失配应力和热应力对不同异质结构进行理论计算,借助X射线摇摆曲线的倒易空间分析,解释了CdTe钝化层对HgCdTe位错抑制的影响作用.     

MBE HgCdTe on Alternative Substrates for FPA Applications

Results of first-principles calculations and experiments focusing on molecular beam epitaxy (MBE) growth of HgCdTe on the alternative substrates of GaAs and Si are described. The As passivation on (2 × 1) reconstructed (211) Si and its effects on the surface polarity of ZnTe or CdTe were clarified by examining the bonding configurations of As. The quality of HgCdTe grown on Si was confirmed to be similar to that grown on GaAs. Typical surface defects in HgCdTe and CdTe were classified. Good results for uniformities of full width at half maximum (FWHM) values of x-ray rocking curves, surface defects, and x values of Hg_1−x Cd _x Te were obtained by refining the demanding parameters and possible tradeoffs. The sticking coefficient of As₄ for MBE HgCdTe was determined. The effects of Hg-assisted annealing for As activation were investigated experimentally and theoretically by examining the difference of the formation energy of As_Hg and As_Te. Results of focal-plane arrays (FPAs) fabricated with HgCdTe grown on Si and on GaAs are discussed.     

HgCdTe-MISFET fabrication with multi-step surface passivation and quantum effects

We have used multi-step surface passivation process integrating electrochemical reduction and UV exposure with native sulfidization by H₂S gas to obtain high quality ZnS/p-HgCdTe interface. It shows very low parasitic interface charge density of the order of 10¹⁰cm⁻². The insulating ZnS layer also exhibits very high resistivity of ∼10¹² Θcm. The resulting fabricated HgCdTe-MISFETs show 2D quantum effects. Magnetoresistance measured at 1.5K displays oscillations which begin to appear above the gate voltage of 10V. They are identified as the Shubnikov-de Haas oscillations involving three electronic subbands. The magnetotransport data are quantitatively analyzed with the calculated Landau level-fan diagram and confirm the 2D subband quantization of the inversion layer at the ZnS/p-HgCdTe interface. This result demonstrates successful role of the multi-step surface passivation for realizing 2D ZnS/HgCdTe interface which will provide high quality 2DEG resevoir basis in future Hg-based narrow-gap nanostructure device applications.     

Photo-enhanced native oxidation process forHg0.8Cd0.2Te photoconductors

Proposes an easy and reproducible vapor-phase photo surface treatment method to improve the device performance of the Hg_0.8 Cd_0.2Te photoconductive detector. We explore the effect of surface passivation on the electrical and optical properties of the HgCdTe photoconductor. Experimental results, including surface mobility, surface carrier concentration, metal-insulator-semiconductor leakage current, 1/f noise voltage spectrum, the 1/f knee frequency, responsivity R_λ, and specific detectivity D* for stacked photo surface treatment and ZnS or CdTe passivation layers are presented. These data are all directly related to the quality of the interface between the passivation layer and the HgCdTe substrate. We found that, by inserting a photo native oxide layer, we can shift the 1/f knee frequency, reduce the noise power spectrum, and achieve a lower surface recombination velocity S. A higher D* can also be achieved. It was also found that HgCdTe photoconductors passivated with stacked layers show improved interface properties compared to the photoconductors passivated only with a single ZnS or CdTe layer     

Growth of (111) HgCdTe on (100) Si by MOVPE using metalorganic tellurium adsorption and annealing

(lll)B CdTe layers free of antiphase domains and twins were directly grown on (100) Si 4°-misoriented toward<011> substrates, using a metalorganic tellurium (Te) adsorption and annealing technique. Direct growth of (lll)B CdTe on (100) Si has three major problems: the etching of Si by Te, antiphase domains, and twinning. Te adsorption at low temperature avoids the etching effect and annealing at a high temperature grows single domain CdTe layers. Te atoms on the Si surface are arranged in two stable positions, depending on annealing temperatures. We evaluated the characteristics of (lll)B CdTe and (lll)B HgCdTe layers. The full width at half maximum (FWHM) of the x-ray double crystal rocking curve (DCRC) showed 146 arc sec at the 8 |im thick CdTe layers. In Hg_1−xCd_xJe (x = 0.22 to 0.24) layers, the FWHMs of the DCRCs were 127 arc sec for a 7 (im thick layer and 119 arc sec for a 17 (im thick layer. The etch pit densities of the HgCdTe were 2.3 x 106 cm2 at 7 ^m and 1.5 x 106 cm-2 at 17 um.     

Investigation of HgCdTe p-n device structures grown by liquid-phase epitaxy

The microstructure of p-n device structures grown by liquid-phase epitaxy (LPE) on CdZnTe substrates has been evaluated using transmission electron microscopy (TEM). The devices consisted of thick (∼21-μm) n-type layers and thin (∼1.6-μm) p-type layers, with final CdTe (∼0.5 μm) passivation layers. Initial observations revealed small defects, both within the n-type layer (doped with 8×10¹⁴/cm³ of In) and also within the p-type layer but at a much reduced level. These defects were not visible, however, in cross-sectional samples prepared by ion milling with the sample held at liquid nitrogen temperature. Only isolated growth defects were observed in samples having low indium doping levels (2×10¹⁴/cm³). The CdTe passivation layers were generally columnar and polycrystalline, and interfaces with the p-type HgCdTe layers were uneven. No obvious structural changes were apparent in the region of the CdTe/HgCdTe interfaces as a result of annealing at 250°C.     

Passivation effect on optical and electrical properties of molecular beam epitaxy-grown HgCdTe/CdTe/Si layers

The effects of passivation with two different passivants, ZnS and CdTe, and two different passivation techniques, physical vapor deposition (PVD) and molecular beam epitaxy (MBE), were quantified in terms of the minority carrier lifetime and extracted surface recombination velocity on both MBE-grown medium-wavelength ir (MWIR) and long-wavelength ir HgCdTe samples. A gradual increment of the minority carrier lifetime was reported as the passivation technique was changed from PVD ZnS to PVD CdTe, and finally to MBE CdTe, especially at low temperatures. A corresponding reduction in the extracted surface recombination velocity in the same order was also reported for the first time. Initial data on the 1/f noise values of as-grown MWIR samples showed a reduction of two orders of noise power after 1200-Å ZnS deposition.     

MBE外延InSb基CdTe工艺研究

成功制备了CdTe/InSb复合衬底,为长波HgCdTe外延提供了可能。通过工艺研究解决了InSb氧化层去除及In元素扩散控制两个难点问题,使用As钝化法可以解决双腔衬底转移的问题,在常用的退火工艺下,通过厚度的调整可以阻挡In元素的扩散。     

The interface of metalorganic chemical vapor deposition-CdTe/HgCdTe

The metalorganic chemical vapor deposition (MOCVD) growth of CdTe on bulk n-type HgCdTe is reported and the resulting interfaces are investigated. Metalinsulator-semiconductor test structures are processed and their electrical properties are measured by capacitance-voltage and current-voltage characteristics. The MOCVD CdTe which was developed in this study, exhibits excellent dielectric, insulating, and mechano-chemical properties as well as interface properties, as exhibited by MIS devices where the MOCVD CdTe is the single insulator. Interfaces characterized by slight accumulation and a small or negligible hysteresis, are demonstrated. The passivation properties of CdTe/ HgCdTe heterostructures are predicted by modeling the band diagram of abrupt and graded P-CdTe/n-HgCdTe heterostructures. The analysis includes the effect of valence band offset and interface charges on the surface potentials at abrupt hetero-interface, for typical doping levels of the n-type layers and the MOCVD grown CdTe. In the case of graded heterojunctions, the effect of grading on the band diagram for various doping levels is studied, while taking into consideration a generally accepted valence band offset. The MOCVD CdTe with additional pre and post treatments and anneal form the basis of a photodiode with a new design. The new device architecture is based on a combination of a p-on-n homojunction in a single layer of n-type HgCdTe and the CdTe/HgCdTe heterostructure for passivation.     

抑制In元素在CdTe中的退火扩散

分子束外延HgCdTe/InSb 材料需要阻止 In 元素在 HgCdTe 中的不受控扩散。我们使用 CdTe缓冲层作为阻挡层,以期控制 In 的扩散。为研究 In 元素在 CdTe 材料中的扩散,我们使用分子束外延方法获得CdTe/InSb样品。考虑到在退火时In 元素可能通过环境扩散污染材料,我们使用 SiO2 作为钝化层,通过对比试验发现 In 元素通过环境扩散污染表面的证据,为控制 In 元素的扩散提供新的思路。     

X-ray Diffraction Imaging of Improved Bulk-Grown CdZnTe(211) and Its Comparison with Epitaxially Grown CdTe Buffer Layers on Si and Ge Substrates

Large-area high-quality Hg_1–x Cd _x Te sensing layers for infrared imaging in the 8 μm to 12 μm spectral region are typically grown on bulk Cd_1–x Zn _x Te substrates. Alternatively, epitaxial CdTe grown on Si or Ge has been used as a buffer layer for high-quality epitaxial HgCdTe growth. In this paper, x-ray topographs and rocking-curve full-width at half-maximum (FWHM) data will be presented for recent high-quality bulk CdZnTe grown by the vertical gradient freeze (VGF) method, previous bulk CdZnTe grown by the vertical Bridgman technique, epitaxial CdTe buffer layers on Si and Ge, and a HgCdTe layer epitaxially grown on bulk VGF CdZnTe.     

CdTe/ZnS复合钝化层对长波碲镉汞器件性能的影响研究

采用CdTe/ZnS复合钝化技术对长波HgCdTe薄膜进行表面钝化,并对钝化膜生长工艺进行了改进。采用不同钝化工艺分别制备了MIS器件和二极管器件,并进行了SEM、C-V和I-V表征分析,研究了HgCdTe/钝化层之间的界面特性及其对器件性能的影响。结果表明,钝化工艺改进后所生长的CdTe薄膜更为致密且无大的孔洞,CdTe/HgCdTe界面晶格结构有序度获得改善;采用改进的钝化工艺制备的MIS器件C-V测试曲线呈现高频特性,界面固定电荷面密度从改进前的1.671011 cm-2下降至5.691010 cm-2;采用常规钝化工艺制备的二极管器件在较高反向偏压下出现较大的表面沟道漏电流,新工艺制备的器件表面漏电现象获得了有效抑制。     

Passivation effects on reactive-ion-etch-formed n-on-p junctions in HgCdTe

The formation of n-on-p junctions by reactive ion etching (RIE) of HgCdTe using an H₂/CH₄ plasma has previously been demonstrated to produce high-performance photodiodes. To fully exploit the inherent advantages of this process, a compatible surface-passivation technology that provides long-term stability is required. This paper examines the effects of thermally evaporated CdTe- and ZnS-passivation on RIE-formed photodiodes undergoing low-temperature baking in a vacuum at temperatures typically used for Dewar bakeout. Experimental results show that as a single passivation layer, neither CdTe nor ZnS are suitable for vacuum packaging of RIE-formed diodes that are to be operated at cryogenic temperatures. A double passivation layer, however, consisting of CdTe passivation and an insulating overlayer of ZnS, produces photodiodes that are stable throughout 175 h, approximately 1 week, of 80°C baking in a vacuum.     

Characterization of high quality RTCVD relaxed Si1−xGex grown on ge graded buffer layers on Si by photoluminescence spectroscopy

Relaxed Si_1−xGe_x layers grown by rapid thermal chemical vapor deposition (RTCVD) have been characterized by photoluminescence (PL) spectroscopy. The structures consist of a Si_1−xGe_x capping layer with a 0.32 and 0.52 Ge concentration, grown on a compositionally graded Si_1−xGe_x buffer layer. The effect of the composition grading rate on the layer quality has been intensively studied. Well-resolved near band edge luminescence (excitonic lines with no-phonon and phonon replica similar as in bulk SiGe alloys) coming from the relaxed alloy capping layer and dislocation-related bands (Dl, D2, D3, D4 lines) in the graded buffer layer have been measured. The electronic quality of this relaxed capping layer, controlled by the design of the compositionally graded buffer layer, has been determined by the excitonic photoluminescence. A detailed analysis of the energy of the D4 dislocation band demonstrates that the main misfit dislocations remain confined in the first steps of the graded buffer layer. Si_1−xGe_x layers grown on these pseudo-substrates either under compressive or tensile strain and the well-defined PL results obtained are discussed on the bases of strain symmetrization and of high quality of the layers. This points out the possibility of using such high quality relaxed Si_1−xGe_x layers as substrates for the integration of new devices associated with Si technology.