Silicon implanted super low-noise GaAs MESFET

Super low-nose GaAs MESFETs have been fabricated using direct ion implantation into undoped LEC substrates. Microwave results at 12 GHz include a noise figure of 1.3 dB, with an associated gain of 10.3 dB and a maximum available gain of 14.9 dB.     

A complete analytical model of GaN MESFET for microwave frequency applications

A simple physics-based analytical model for a non-self-aligned GaN MESFET suitable for microwave frequency applications is presented. The model includes the effect of parasitic source/drain resistances and the gate length modulation. The model is then extended to evaluate I–V and C–V characteristics, transconductance, cut-off frequency, transit time, RC time constant, optimum noise figure and maximum power density. The transconductance of about 21 mS/mm is obtained for GaN MESFET using the present theory in comparison to 23 mS/mm of the reported data. The cut-off frequency of more than 1 GHz, optimum noise figure of 6 dB and maximum output power density of more than 1 W/mm are predicted.     

A low-noise dual-gate GaAs MESFET for UHF TV tuner

Demonstrates a new dual-gate GaAs MESFET specially designed for a low-noise UHF TV tuner. The device has been designed under the philosophy as follows: (1) to reduce |S/SUB 11/| and input Q of the field-effect transistor (FET) at the smallest expense of the low-noise feature inherent in GaAs MESFET's (2) to obtain automatic gain control (AGC) and cross-modulation performances compatible with those of a conventional Si MOS tetrode. The optimized pattern geometry satisfying the above philosophy was obtained through theoretical and experimental studies. The FET, of which minimum noise figure (NF) value is as low as 0.9 dB at 1 GHz, was compatible with an Si MOS tetrode in a conventional tuner circuit owing to the small |S/SUB 11/| and low input Q values obtained. The AGC and cross-modulation performance were also satisfactory.     

Effect of gate engineering in submicron GaAs MESFET for microwave frequency applications

We present an approach of GaAs MESFET incorporating the gate engineering effect to improve immunity against the short channel effects in order to enhance the scaling capability and the device performance for microwave frequency applications. In this context, a physics-based model for I–V characteristics and various microwave characteristics such as transconductance, cut-off frequency and maximum frequency of oscillation of submicron triple material gate(TM) GaAs MESFET are developed. The reduced short channel effects have also been discussed in combined designs i.e. TM, DM and SM in order to show the impact of our approach on the GaAs MESFETs-based device design. The proposed analytical models have been verified by their good agreement with 2D numerical simulations. The models developed in this paper will be useful for submicron and microwave analysis for circuit design.     

High-dynamic-range low-noise microwave amplifier

The operation of a high-dynamic-range parametric amplifier is described. The varactor is a GaAs p?n junction with an n type layer suitable for operation as a K band transferred-electron oscillator (t.e.o.). A dynamic range of approximately 177 dB/Hz and a noise figure of less than 2 dB were measured at C band. The tests were made to show the feasibility of high-dynamic-range low-noise microwave amplification for radar-receiver applications, and to establish the feasibility of high-performance monolithic multifunction chips from the material standpoint.     

A low-noise GaAs MESFET made with graded-channel doping profiles

We have demonstrated that devices fabricated from epitaxially grown material with a graded-channel doping profile are capable of improved microwave performance. For operation at 12 GHz, graded-channel doping profile devices have an associated gain that is always 1 dB higher at the minimum noise-figure point compared to ion-implanted Gaussian-channel doping profile devices. A noise figure of 1.60 dB with 11-dB associated gain has been obtained at 12 GHz for 0.5-µm × 300-µm gate devices. A tranconductance of 200 mS/mm for this device has been achieved.     

Growth temperature dependence of low-noise MESFET in molecular-beam epitaxy

The substrate growth temperature dependence of electrical properties for a low-noise MESFET fabricated on MBE-grown material has been demonstrated. The optimum noise figure and its associated gain were attributed to the higher epilayer quality and mobility at a growth temperature of 650°C between temperatures of 550°C and 700°C.     

Beam-lead Schottky-barrier diodes for low-noise integrated microwave mixers

This paper describes the fabrication and performance of beam leadnonn^{+}silicon-molybdenum, barrier dual Schottky diodes. The fabrication is by a process sequence which allows the use of a single molybdenum gold-metal deposition step for both the Schottky barrier and beam-lead interconnection system. TypicalI-Vand1/C^{2}-Vplots indicate uniformity of barrier heigh and n factor. Values of n less than 1.1 were measured with the barrier height at 0.61 eV. Measurements of change in barrier height with temperature up to 500°C show less than ± 10 mV variation. Dc characteristics of these devices give forward current matching of ± 10 mV at 1 mA. The Rsis 10 ohms and the Cjis less than 0.3 pF, giving an RC product less than 3 × 10^-12seconds. Using these devices in a chrome-gold on alumina microstrip integrated mixer, overall single sideband noise figures of 6.5-7.0 dB were measured, with a 1.5 dB IF noise figure, at 9.4 GHz. Measured noise figure was essentially constant over a range of 1-10 mW of local oscillator power, and the diodes will with stand over 500 mW CW RF power. These values compare favorably with discrete packaged devices. Fabrication in series pairs, matched quads or other configurations can be accomplished with good uniformity.     

Generation of coherent low-noise microwave oscillations

A way of generating low-noise and highly frequency stable microwave oscillations is presented which is based on the use of the original PLL circuit with the phase noise compensator.     

A low-noise microwave HEMT using MOCVD

Low-noise high-electron-mobility Transistors (HEMT's) with AlGaAs/GaAs heterostructures have been successfully fabricated using normal pressure metal-organic chemical vapor deposition (MOCVD). Hall mobilities of the two-dimensional electron gas at the interface are 8030 and 14 8000 cm²/V . s at 300 and 77 K, respectively, with an undoped Al0.3Ga0.7As spacer layer of 100 Å. The HEMT's with 0.65-µm-long and 200-µm-wide gates have exhibited a noise figure of 1.13 dB with 10.8 dB of associated gain at 12 GHz, and a dc transconductance of 280 mS/mm. These values are comparable to other reported HEMT devices using molecular-beam epitaxy (MBE).     

GaAs MESFET ICs for gigabit logic applications

This paper gives an overview of the basic concepts used in the design and fabrication of gallium arsenide MESFET integrated circuits intended for gigabit logic applications. The present status of speed-power performances, packing densities, and integration levels is presented on the basis of some MSI and LSI MESFET IC realizations made possible by the principal GaAs logic approaches to date. Finally, the potential field of application and future trends of GaAs IC technology are assessed.     

Whole-ingot annealed semi-insulating GaAs substrates for low-noise microwave amplifiers

The quality of liquid-encapsulated Czochralski (LEC) grown GaAs substrates critically affects the final low-noise microwave device and circuit performance as evidenced by comparing Si-implanted undoped, In-alloyed, and whole-ingot annealed semi-insulating substrates. We investigated differences in Si-implant activation, electrical profiles, and uniformity of material, device, and circuit parameters. The best noise figure of 1.33 dB at 10 GHz was measured on a 0.5-µm low-noise FET fabricated on the high-pressure whole-ingot annealed LEC wafer. A noise figure of 2.0 dB with associated gain of 24 dB at 10 GHz was achieved for a monolithic two-stage low-noise amplifier (LNA) fabricated on the standard high-pressure LEC substrate.     

Design optimization of AlInAs-GalnAs HEMTs for low-noise applications

In order to optimize the low-noise performance of 50-nm-gate AlInAs-GalnAs high-electron mobility transistors (HEMTs), by using an ensemble Monte Carlo simulation we study the influence of three important technological parameters on their noise level: the doping of the /spl delta/-doped layer, the width of the devices and the length of the recess. The noise behavior of the devices is firstly analyzed in terms of the physics-based P, R, and C parameters, and then characterized from a practical (circuit oriented) point of view through their four noise parameters: minimum noise figure, F/sub min/, noise resistance, R/sub n/, and complex input admittance, Y/sub opt/ (or reflection coefficient, /spl Gamma//sub opt/). We have observed an enhancement of the noise when the /spl delta/-doping or the device width are increased (a deterioration parallel to that of f/sub max/). Thus, the optimum noise operation is obtained for the lowest possible values of the /spl delta/-doping and device width. However, for small width the effect of the offset parasitic capacitances makes F/sub min/ increase, thus, imposing a limit for the reduction of the noise. Moreover, the increase of R/sub n/ for small W makes the noise tuning condition critical to reach the optimum low-noise operation. We have also confirmed that when shortening the recess length from 100 to 20 nm at each side of the gate F/sub min/ is reduced, with a slight deterioration of f/sub max/, while the static characteristics are not modified.     

基于ADS的微波低噪声放大器的设计与仿真

低噪声放大器包括输入匹配网络、微波晶体管放大器和输出匹配网络.微波晶体管放大器是设计中的核心部分.根据低噪声放大器设计的原理,提出技术指标要求,设计一个5GHz单级低噪声放大器,经过技术指标分析,采用Fujitsu公司的FHX35LG型HEMT场效应管晶体管.阐述了如何利用Agilent公司的ADS软件进行分析和优化设...     

A potentially low-noise avalanche diode microwave amplifier

A sequence of AlGaAs, GaAs heterojunctions can be used to generate a series of potential steps that are just large enough to accelerate conduction-band electrons to energies above the impact-ionization threshold while valence-band holes do not obtain this much energy. The smaller difference in the valence-band heterojunction discontinuity and the higher scattering rate for holes than conduction-band electrons are shown to suppress the initiation of impact ionization by valence-band holes in this structure. The resulting transit-time device is predicted to be a relatively low-noise amplifier or oscillator that can be used in the microwave region and will be insensitive to small fluctuations in the power supply voltage.     

Power optimization of high-efficiency microwave MESFET oscillators

Achieving high output power and efficiency in GaAs MESFET oscillators is mainly hampered by the device's parasitics, its static I-V characteristics, and the circuit embedding impedance. In this paper, the derivation of the relationship between oscillator output power and various circuit and device parameters is presented. From these analytical expressions, optimum operating conditions for maximum oscillator output power and efficiency are determined. The analysis method employed here is based upon a quasi-linear approach and an open-loop model of the oscillator. The design procedure is verified by measurements on an experimental circuit, which have demonstrated a dc/radio-frequency conversion efficiency of 54%     

MESFET simulation oriented toward computer-aided microwave circuitdesign

A MESFET simulator designed to link physically based transistor simulation to microwave circuit simulation within an integrated CAD environment is described. The key features of the simulator are efficient implementation of a large-signal time-domain device simulation kernel; incorporation of extensive postprocessing of raw time-domain data; and an interactive, graphics-oriented user interface. An example that demonstrates the utility of the approach for assessing circuit models is presented     

A low-power low-noise CMOS amplifier for neural recording applications

There is a need among scientists and clinicians for low-noise low-power biosignal amplifiers capable of amplifying signals in the millihertz-to-kilohertz range while rejecting large dc offsets generated at the electrode-tissue interface. The advent of fully implantable multielectrode arrays has created the need for fully integrated micropower amplifiers. We designed and tested a novel bioamplifier that uses a MOS-bipolar pseudoresistor element to amplify low-frequency signals down to the millihertz range while rejecting large dc offsets. We derive the theoretical noise-power tradeoff limit - the noise efficiency factor - for this amplifier and demonstrate that our VLSI implementation approaches this limit by selectively operating MOS transistors in either weak or strong inversion. The resulting amplifier, built in a standard 1.5-/spl mu/m CMOS process, passes signals from 0.025Hz to 7.2 kHz with an input-referred noise of 2.2 /spl mu/Vrms and a power dissipation of 80 /spl mu/W while consuming 0.16 mm/sup 2/ of chip area. Our design technique was also used to develop an electroencephalogram amplifier having a bandwidth of 30 Hz and a power dissipation of 0.9 /spl mu/W while maintaining a similar noise-power tradeoff.     

Low-temperature buffer GaAs MESFET technology for high-speedintegrated circuit applications

The fabrication of high-performance digital integrated circuits with low-temperature buffer (LTB) GaAs MESFET technology is presented. Individual 0.2-μm-gate-length transistors show a g_m of 600 mS/mm and an extrapolated f_T of 80 GHz. Backgating and light sensitivity are eliminated with the LTB technology. Static source-coupled FET logic frequency dividers exhibit a maximum clock rate of 22 GHz     

A simplified capless annealing of GaAs for MESFET applications

A simple capless annealing technique for post-implantation annealing of a GaAs wafer is described. The technique incorporates a novel boat design and uses InAs as the source of arsenic overpressure. Using this technique, wafers annealed at 850°C show mobilities in the range of 4000 cm². V^-1. S^-1with over 85-percent activation for a Si dose of5 times 10^{12}cm^-2. Dopant depth profiles with peak donor densities of2 times 10^{17}cm^-3and minimal tailing were demonstrated. Electron channeling data show that crystallinity is fully restored during the anneal. 1-µm gate length MESFET's processed on n⁺-n implanted layers exhibitedg_{m} geq 160mS/mm and pinchoff voltages in the range of 3 V.