概率逻辑神经元网络的记忆容量

本文研究概率逻辑神经元网络的记忆容量问题，主要结果有，１给出构造指定记忆容量网络的方法２给出网络独立记忆容量与网络规模之间的数量关系，得出ＰＬＮ网络的记忆容量不仅与元件的输入线个数有关，而且与网络的元件个数也有关。以上结论为ＰＬＮ网络的综合提供了新方法。     

单层反馈PLN网络的识别复杂性

本文讨论将单层反馈PLN(概率逻辑神经元模型)网络当作联想记忆网络时,其识别的复杂性问题,即其平均识别速度与网络规模之间的数量关系,我们得到的主要结论是,设单层反馈PLN网络N的规模为m,则其识别计算量是m的指数函数,给出识别计算量是m多项式的必要条件。     

PLN网络的改进及其应用

本文在分析概率逻辑神经元（ＰＬＮ）网络原型存在不足的基础上,提出ＰＬＮ元件的一个改进模型,并指出原来的ＰＬＮ网络模型、Ｈｏｐｆｉｅｌｄ学习律以及Ｂｏｌｔｚｍａｎ机的演化律等都是ＰＬＮ网络改进模型的特例．文中还给出ＰＬＮ网络改进模型在联想记忆应用中的模拟实验结果,说明改进模型无论在鲁棒性和收敛速度上比原型都有很大改进．     

PLN网络吸引区域的定量分析

本文证明在ＰＬＮ网络中适当给定广义Ａ－学习律,可使网络满足如下条件：（１）所有训练样本都是稳定状态;（２）每个稳定状态具有最大的吸引域;（３）具有很快的收敛速度．由此可见,将这种ＰＬＮ网络作为联想记忆器是很理想的．     

Further Results on the Asymptotic Memory Capacity of the Generalized Hopfield Network

This paper presents a further theoretical analysis on the asymptotic memory capacity of the generalized Hopfield network (GHN) under the perceptron learning scheme. It has been proved that the asymptotic memory capacity of the GHN is exactly 2(n– 1), where n is the number of neurons in the network. That is, the GHN of n neurons can store 2(n– 1) bipolar sample patterns as its stable states when n is large, which has significantly improved the existing results on the asymptotic memory capacity of the GHN.     

Generalizations of the Hamming Associative Memory

This Letter reviews four models of associative memory which generalize the operation of the Hamming associative memory: the grounded Hamming memory, the cellular Hamming memory, the decoupled Hamming memory, and the two-level decoupled Hamming memory. These memory models offer high performance and allow for a more practical hardware realization than the Hamming net and other fully interconnected neural net architectures.     

Memory of Distributed Computer Systems: Distinctive Features of Their Architectural-Structural Organization and Use

Distinctive features of architectural-structural organization and use of memory networks are considered with the aim of choosing an optimal configuration in designing distributed computer systems.     

Storage Capacity of the Exponential Correlation Associative Memory

In this paper we analyze the pattern storage capacity of the exponential correlation associative memory (ECAM). This architecture was first studied by Chiueh and Goodman [3] who concluded that, under certain conditions on the input patterns, the memory has a storage capacity that was exponential in the length of the bit-patterns. A recent analysis by Pelillo and Hancock [9], using the Kanerva picture of recall, concluded that the storage capacity was limited by 2 ^N–1/N ² patterns. Both of these analyses can be criticised on the basis that they overlook the role of initial bit-errors in the recall process and deal only with the capacity for perfect pattern recall. In other words, they fail to model the effect of presenting corrupted patterns to the memory. This can be expected to lead to a more pessimistic limit. Here we model the performance of the ECAM when presented with corrupted input patterns. Our model leads to an expression for the storage capacity of the ECAM both in terms of the length of the bit-patterns and the probability of bit-corruption in the original input patterns. These storage capacities agree closely with simulation. In addition, our results show that slightly superior performance can be obtained by selecting an optimal value of the exponential constant.     

多模无线传感器网络的容量

密集无线传感网络中,可通过配置多个Sink收集节点来观察所监测区域内的多个随机过程,并在相应的Sink节点处重建所观察到的过程。当网络中传感器节点的功率固定时,分析了采用基于波束成形的通信方式时网络的可达容量域,推导出每个过程可获得的传输容量为专(log(N)),并进一步分析了该网络可以同时观察到的随机过程的数目为O(N茁)。     

广播内存网在实时半实物仿真系统中的实现

针对实时半实物仿真系统对实时性要求高的特点,提出一种利用广播内存网技术构建实时半实物仿真系统的方法.详细地阐述了广播内存网的工作原理、技术特点和连接方式,设计了一套基于虚拟共享内存中间件技术的实时半实物仿真基础平台软件.以该基础平台软件为核心,对整个实时半实物仿真系统进行了详尽的功能及性能测试,测试结果表明该系统传输延迟及抖动小,传输可靠性高,可以满足实时半实物仿真系统对实时性和可靠性的要求.     

Design and Simulation of the Aquarius-II Multiprocessor

Aquarius-II is a cache coherent multiprocessor system designed for the parallel execution of Prolog programs. It contains two tiers of memory: synchronization memory and high bandwidth (HB) memory. The synchronization memory consists of snooping caches connected to a bus and is used to store rendezvous points, synchronization bits, synchronization variables such as locks and semaphores and most of the write shared data. The HB memory is used to store the bulk of the application program code and data. It contains caches and an inexpensive VLSI chip based crossbar interconnection network to memory. The caches connected to the crossbar do not have full snooping capability. The architecture is evaluated by a full simulation of parallel execution of Prolog programs on Aquarius-II. The design details of the components of the architecture and simulation results are presented. Simulation results indicate that the two tier memory system significantly reduces memory interference and speeds up synchronization when compared to a single bus multi. This shared memory multiprocesor architecture has the potential to support other parallel programming paradigms.     

一种基于稀疏分布记忆模型的汉字联想记忆方法

本文描述了Ｋａｎｅｒｖａ的稀疏分布记忆模型，指出了它在用于汉字联想时的问题，同时提出了改进的模型，试验表明，这种改进模型使记忆容量和容错能力大大提高。     

语音词汇网单词联想记忆

语音联想记忆是一种高效的记忆方法。为了给学习者提供语音联想的素材,引导学习者进行语音联想,熟悉读音规则,加深对单词拼写和发音的记忆,帮助学习者建立字母组合与相关发音间的双向认知,提出一种基于语音的词汇网。语音词汇网是基于常见字母组合和单词读音之间的差异构建的,因此其中既包含了语音近似度信息,也包含了一定的单词结构信息。利用该网络,学习系统不但可以实现语音联想功能,还能提供语音方面的相关统计信息。语音词汇网的引入能进一步完善单词学习系统的联想记忆功能。     

基于RapidIO和存储映射的高速互连网络

分析当前高速互连网络中同时存在的TCP/IP, GAMMA, InfiniBand, SCI等技术的实现机制,介绍RapidIO高性能总线技术。研究RapidIO协议和MPC8548处理器的相关技术,提出在RapidIO高速互连网络中实现存储映射的通信技术解决方案。     

LNMS网络内存系统及性能优化技术

在Linux环境下设计并实现了一个两级服务结构的网络内存系统(LNMS)。LNMS较传统网络内存系统具有更好的可扩展性。对LNMS提出了两种性能优化技术：预取和主动内存技术。在预取优化方面,针对并发应用提出一种M-PPM算法。主动内存技术则发掘了内存服务器的计算能力。实验表明,两种优化技术可有效地提升网络内存系统的性能。     

反射内存网实时通信技术的研究

介绍了一种实时网络技术一反射内存网技术,结合实际详细地阐述了反射内存网的工作原理,并与传统计算机网络技术进行了比较,通过设计 一套基于反射内存网的实时通信软件,验证了反射内存网的基本性能。     

基于结构学习和迭代自映射的自联想记忆模型

传统的人工神经元网络连接结构是固定的,是对权值的学习.提出一种基于生理神经元特征的人工神经元模型,并在以此为单元构成的用于实现自联想记忆的神经网络上进行对结构的学习.学习算法以设定神经元的输入/输出感受野、调整突触和轴突末梢的连接、并行的自投影迭代为特征.给出了此网络模型的矩阵描述和实验结果.