多晶发射极双台面微波功率SiGe HBT

研制成功了可商业化的75mm单片超高真空化学气相淀积锗硅外延设备SGE500,并生长了器件级SiGe HBT材料.研制了具有优良小电流特性的多晶发射极双台面微波功率SiGe HBT器件,其性能为:β=60@VCE/IC=9V/300μA,β=100@5V/50mA,BVCBO=22V,ft/fmax=5.4GHz/7.7GHz@10指,3V/10mA.多晶发射极可进一步提供直流和射频性能的折衷,该工艺总共只有6步光刻,与CMOS工艺兼容且(因多晶发射极)无需发射极外延层的生长,这些优点使其适合于商业化生产.利用60指和120指的SiGe HBT制作了微波锗硅功率放大器.60指功放在900MHz和3.5V/0.2A偏置时在1dB压缩点给出P1dB/Gp/PAE＝22dBm/11dB/26.1%.120指功放900MHz工作时给出了Pout/Gp/PAE＝33.3dBm (2.1W)/10.3dB/33.9%@11V/0.52A.     

Half-terahertz operation of SiGe HBTs

This letter presents the first demonstration of a silicon-germanium heterojunction bipolar transistor (SiGe HBT) capable of operation above the one-half terahertz (500 GHz) frequency. An extracted peak unity gain cutoff frequency (f/sub T/) of 510 GHz at 4.5 K was measured for a 0.12/spl times/1.0 /spl mu/m/sup 2/ SiGe HBT (352 GHz at 300 K) at a breakdown voltage BV/sub CEO/ of 1.36 V (1.47 V at 300 K), yielding an f/sub T//spl times/BV/sub CEO/ product of 693.6 GHz-V at 4.5 K (517.4 GHz-V at 300 K).     

High-speed scaled-down self-aligned SEG SiGe HBTs

A scaled-down self-aligned selective-epitaxial-growth (SEG) SiGe HBT, structurally optimized for an emitter scaled down toward 100 nm, was developed. This SiGe HBT features a funnel-shaped emitter electrode and a narrow separation between the emitter and base electrodes. The first feature is effective for suppressing the increase of the emitter resistance, while the second one reduces the base resistance of the scaled-down emitter. The good current-voltage performance - a current gain of 500 for the SiGe HBT with an emitter area of 0.11 /spl times/ 0.34 /spl mu/m and V/sub BE/ standard deviation of less than 0.8 mV for emitter width down to about 0.13 /spl mu/m - demonstrates the applicability of this SiGe HBT with a narrow emitter. This SiGe HBT demonstrated high-speed operation: an emitter-coupled logic (ECL) gate delay of 4.8 ps and a maximum operating frequency of 81 GHz for a static frequency divider.     

High-performance SiGe epitaxial base bipolar transistors producedby a reduced-pressure CVD reactor

High-performance Si and SiGe epitaxial base bipolar transistors have been fabricated using a commercially available, reduced pressure, epitaxial reactor. The SiGe devices exhibit exceptional Early voltages in the range of 400-500 V, and an f_T of 31 GHz with a BV_CEO of 7.6 V and BV_CBO of 16 V. These results demonstrate that SiGe has potential as a commercially viable technology for analog, digital, and mixed-signal applications     

50-nm gate Schottky source/drain p-MOSFETs with a SiGe channel

We propose new SiGe channel p-MOSFETs with germano-silicide Schottky source/drains (S/Ds). The Schottky barrier-height (SBH) for SiGe is expected to be low enough to improve the injection of carriers into the SiGe channel and, as a result, current drivability is also expected to improve. In this work, we demonstrate the proposed Schottky S/D p-MOSFETs down to a 50-nm gate-length. The drain current and transconductance are -339 /spl mu/A//spl mu/m and 285 /spl mu/S//spl mu/m at V/sub GS/=V/sub DS/=-1.5 V, respectively. By increasing the Ge content in the SiGe channel from 30% to 35%, the drive current. and transconductance can be improved up to 23% and 18%, respectively. This is partly due to the lower barrier-height for strained Si/sub 0.65/Ge/sub 0.35/ channel than those for strained Si/sub 0.7/Ge/sub 0.3/ channel device and partly due to the lower effective mass of the holes.     

A novel low-voltage N-channel heterostructure dynamic threshold voltage MOSFET (N-HDTMOS) with p-type doped SiGe body

A novel N-channel Si/SiGe heterostructure dynamic threshold voltage MOSFET (N-HDTMOS) has been proposed and fabricated. The Si/SiGe N-HDTMOS consists of an unstrained surface Si channel and heavily p-type doped SiGe body. The potential of the conduction band edge of the surface Si channel can be lowered by introducing a heavily p-type doped SiGe layer into a suitable position in the body region. As a result, the N-HDTMOS shows a threshold voltage reduction and a body effect factor (/spl gamma/) enhancement while keeping high doping concentration in the SiGe layer. The fabricated SiGe N-HDTMOS exhibits superior properties, that is, 0.1 V reduction of V/sub th/, 1.5 times enhancement of /spl gamma/, and 1.3 times saturated current, as compared with those of Si N-DTMOS.     

p-Type SiGe transistors with low gate leakage using SiN gatedielectric

Using high-quality jet-vapor-deposited (JVD) SiN as gate dielectric, p-type SiGe transistors are fabricated on SiGe heterostructures grown by ultra-high-vacuum chemical vapor deposition (UHVCVD). For an 0.25-μm gate-length device, the gate leakage current is as small as 2.4 nA/mm at V_ds=-1.0 V and V_gn=0.4 V. A maximum extrinsic transconductance of 167 mS/mm is measured. A unity current gain cutoff frequency of 27 GHz and a maximum oscillation frequency of 35 GHz are obtained     

A 77 GHz SiGe sub-harmonic balanced mixer

A novel SiGe 77 GHz sub-harmonic balanced mixer is presented with a goal to push the technology to its limit [SiGe2-RF transistor (f/sub T/=80 GHz)]. This new topology uses a compact input network not only to achieve high isolation between the LO and RF ports, but also to result in excellent 2LO-RF isolation. The measured results demonstrate a conversion gain of 0.7 dB at 77 GHz with an LO power of 10 dBm at 38 GHz, LO-RF isolation better than 30 dB, 2LO-RF isolation of 25 dB, and a P/sub 1dB/ of -8 dBm. The mixer core consumes 4.4 mA at 5 V. The circuit demonstrates that SiGe sub-harmonic mixers have comparable performance with GaAs designs, at a fraction of the cost.     

Vertically Stacked SiGe Nanowire Array Channel CMOS Transistors

We demonstrate, for the first time, the fabrication of vertically stacked SiGe nanowire (NW) arrays with a fully CMOS compatible technique. Our method uses the phenomenon of Ge condensation onto Si and the faster oxidation rate of SiGe than Si to realize the vertical stacking of NWs. Gate-all-around nand p-FETs, fabricated using these stacked NW arrays as the channel (L_gges0.35 mum), exhibit excellent device performance with high I_ON/I_OFF ratio (~10⁶), near ideal subthreshold slope (~62-75 mV/dec) and low drain induced barrier-lowering (~20 mV/V). The transconductance characteristics suggest quantum confinement of holes in the [Ge]-rich outer-surface of SiGe for p-FETs and confinement of electrons in the core Si with significantly less [Ge] for n-FETs. The presented device architecture can be a promising option to overcome the low drive current restriction of Si NW MOSFETs for a given planar estate     

Ultra-wideband SiGe low-noise amplifier

A low-noise amplifier (LNA) for ultra-wideband (UWB) is presented. The LNA, consisting of two gain stages in multiple feedback loops, achieves a flat power gain of a nominal 20 dB and a noise figure of 2.8-4.7 dB over the 3.1-10.6 GHz UWB band. Implemented in a 0.25 /spl mu/m SiGe BiCMOS process, the amplifier occupies 0.34 mm/sup 2/ and draws 11 mA from a 2.7 V supply.     

Low-power multi-GHz and multi-Gb/s SiGe BiCMOS circuits

Over the last decade, SiGe HBT BiCIMOS technology has matured from a laboratory research effort to become a 50/65-GHz fT/fmax silicon-based 0.5-μm BiCMOS production technology. This progress has extended silicon-based production technology into the multigigahertz (multi-GHz) and multigigabits-per-second (multi-Gb/s) range, thus, opening up an array of wireless and wired circuit and network applications and markets. SiGe circuits are now being designed in the same application space as GaAs MESFET and HBTs, and offer the yield cost, stability and manufacturing advantages associated with conventional silicon fabrication. A wide range of microwave circuits have been built in this technology including 5.8-GHz low-noise amplifiers with 1-V supply, up to 17-GHz fully monolithic VCOs with excellent figures of merit, high-efficiency 2.4-GHz power devices with supply voltage of 1.5 V, and move complicated functions such as 2.5/5.0-GHz frequency synthesizer circuits as well as 10/12.5-Gb/s clock and data recovery PLLs. This paper focuses on several key circuit applications of SiGe BiCMOS technology and describes the performance improvements that can be obtained by its utilization in mixed-signal microwave circuit design. By way of examples, the article highlights the fact that the combination of high-bandwidth, high-gain and low-noise SiGe HBTs with dense CMOS functionality in a SiGe BiCMOS technology enables implementation of powerful single-chip transceiver architectures for multi-GHz and multi-Gb/s communication applications     

A 10-GHz SiGe BiCMOS phase-locked-loop frequency synthesizer

A SiGe BiCMOS phase-locked-loop (ILL) circuit is presented. A maximum operational frequency of 10 GHz and a current consumption of 7.6 mA, i.e., 17 mW, is demonstrated. For a 9-mW low-power version, a maximum frequency of 4.7 GHz is determined. In a GSM direct conversion application, an in-band phase noise of -79 dBc/Hz at 2 kHz and a spurious suppression of -75 dBc at 400 kHz was measured at 3.4 GHz, which corresponds to a PLL phase noise floor of -214 dBc/Hz. For low-power applications, the PLL can be operated at supply voltages as low as 2.2 V and at RF input powers as low as -20 dBm while having a large output voltage range of 0.2 V to (V_cc-0.3 V). This demonstrates the speed and power advantage of the SiGe BiCMOS over Si BiCMOS and CMOS technologies for wireless communications     

Si/SiGe digital optoelectronic switch

The physical parameters and functional characteristics of a Si/SiGe digital optoelectronic switch are reported. The device is found to have bistable electrical states: a high-impedance (40 kΩ) OFF state connected to a low-impedance (100 Ω) ON state by a regime of negative differential resistance. The switching voltage and holding voltage are measured to be 2.6 and 1.3 V, respectively, and the switching current and holding current are measured to be 500 μA and 1 mA, respectively. These DC characteristics are found to be similar to those measured in double heterostructure optoelectronic switching devices manifested in the AlGaAs/GaAs materials system. The DC characteristics of this Si/SiGe digital optoelectronic switch are also found to be sensitive to optical input and temperature     

Applications and processing of SiGe and SiGe:C for high-speed HBT devices

The continued growth of high-speed-digital data transmission and wireless communications technology has motivated increased integration levels for ICs serving these markets. Further, the increasing use of portable wireless communications tools requiring long battery lifetimes necessitates low power consumption by the semiconductor devices within these tools. The SiGe and SiGe:C materials systems provide solutions to both of these market needs in that they are fully monolithically integratible with Si BiCMOS technology. Also, the use of SiGe or SiGe:C HBTs for the high-frequency bipolar elements in the BiCMOS circuits results in greatly decreased power consumption when compared to Si BJT devices.Either a DFT (graded Ge content across the base) or a true HBT (constant Ge content across the base) bipolar transistor can be fabricated using SiGe or SiGe:C. Historically, the graded profile has been favored in the industry since the average Ge content in the pseudomorphic base is less than that of a true HBT and, therefore, the DFT is tolerant of higher thermal budget processing after deposition of the base. The inclusion of small amounts of C (e.g. <0.5%) in SiGe is effective in suppressing the diffusion of B such that very narrow extremely heavily doped base regions can be built. Thus the f_T and f_max of a SiGe:C HBT/DFT are capable of being much higher than that of a SiGe HBT/DFT.The growth of the base region can be accomplished by either nonselective mixed deposition or by selective epitaxy. The nonselective process has the advantage of reduced complexity, higher deposition rate and, therefore, higher productivity than the selective epitaxy process. The selective epi process, however, requires fewer changes to an existing fabrication sequence in order to accommodate SiGe or SiGe:C HBT/DFT devices into the BiCMOS circuit.     

SiGe/Si单光子雪崩光电二极管仿真

通过理论模拟CMOS工艺兼容的SiGe/Si 单光子雪崩二极管,研究并讨论了掺杂条件对于电场分布、频宽特性、以及器件量子效率的影响。设计出具有浅结结构、可在盖革模式下工作、低击穿电压(30 V)的1.06 m单光子技术雪崩光电二极管。器件采用分离吸收倍增区结构,其中Si材料作为倍增区、SiGe材料作为吸收区,这充分利用了硅材料较高的载流子离化比差异,降低了器件噪声;在1.06 m波长下,SiGe探测器的量子效率为4.2%,相比于Si探测器的效率提高了4 倍。仿真表明优化掺杂条件可以优化电场分布,从而在APD击穿电压处获得更好的带宽特性。     

Low-cost, high-efficiency, and high-speed SiGe phototransistors in commercial BiCMOS

We present a new approach to obtain low-cost and high-performance SiGe phototransistors in a commercial BiCMOS process. Photoresponsivity of 2.7 A/W was obtained for 850-nm detection due to the transistor gain, corresponding to 393% quantum efficiency. Responsivities of 0.13 A/W and 0.07mA/W were achieved for 1060 and 1310 nm with SiGe absorption. With V/sub ce/=2 V, we measure a -3-dB bandwidth of up to 5.3 GHz for phototransistors with a 4-/spl mu/m/sup 2/ active area and 2.0 GHz for phototransistors with 60-/spl mu/m/sup 2/ active area and finger contacts. This high-efficiency and high-speed phototransistor is an enabling device for monolithic receiver integration.     

Suppression of the floating-body effect using SiGe layers invertical surrounding-gate MOSFETs

The use of silicon germanium (SiGe) heterostructures in vertical surrounding-gate MOSFETs provides an additional means for tailoring current-voltage (I-V) characteristics by controlling physical effects inside the device. Incorporation of an SiGe layer in the vertical MOSFET source can delay the floating-body effect by changing the back injection efficiency and current gain of the parasitic bipolar junction transistor (BJT). Structures with abrupt and ramped SiGe source layers showed up to 2 V and 6 V increases in breakdown voltage at low gate voltages with suppression of the floating-body effect kink. Comparison of simulation to experiment displayed the difficulties of accurately predicting device parameters, but demonstrated the usefulness of simulation to qualitatively predict device behavior     

A Tail-Injected Divide-by-4 SiGe HBT Injection Locked Frequency Divider

This letter presents a silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) divide-by-4 injection locked frequency divider (ILFD). The ILFD is based on a single-stage voltage-controlled oscillator with active-inductor, and was fabricated in the 0.35 mu m SiGe 3P3M BiCMOS technology. The divide-by-4 function is performed by injecting a signal to the base of the tail HBT. Measurement results show that when the supply voltage V_DD is 3.1 V and the tuning voltage is tuned from 2.0 to 2.8 V, the divider free-running oscillation frequency is tunable from 2.12 to 2.76 GHz, and at the incident power of 0 dBm the operation range is about 1.15 GHz, from the incident frequency 8.55 to 9.7 GHz. The die area is 0.65 times 0.435 mm².     

Development of Microwave SiGe Heterojunction Bipolar Transistors

The microwave SiGe Heterojunction Bipolar Transistors (HBT) were fabricated by the material grown with home-made high vacuum/rapid thermal processing chemical vapor deposition equipment. The HBTs show good performance and industrial use value. The current gain is beyond 100;the breakdown voltage BVceo is 3.3V,and the cut-off frequency is 12.5GHz which is measured in packaged form.     

Low-voltage MOBILE logic module based on Si/SiGe interbandtunnelling diodes

Si/SiGe interband tunnelling diodes have been grown by MBE on high resistivity (n^-) silicon substrates. The device enables a very low voltage, high-speed logic on a silicon substrate. A novel self-aligned diode is processed using optical lithography and dopant-selective wet chemical etching. A maximum speed index for a 60 μm² anode area device is evaluated to 2.2 ns/V resulting in a switching speed of 0.5 ns. A logic latch built of two series connected diodes (MOBILE principle) is demonstrated, showing very robust logic operation at a supply voltage as low as 0.3 V. The used technology may be employed for a co-integration with both SiGe heterostructure bipolar- and field-effect transistor technology and may contribute to future low-voltage high speed logic on Si substrates