Performance enhancement of p-type organic thin-film transistors by surface modification of hybrid dielectrics

The quality of the dielectric/organic semiconductor interface is a critical issue, because it determines the charge transport properties in organic thin-film transistors (OTFTs). High-k organic-inorganic hybrid films have received considerable attention for their outstanding dielectric properties, including low leakage currents, high breakdown fields, and suitable band offsets against the organic semiconductor. However, Hf and Zr hybrid gate dielectrics on p-type OTFTs show poor charge transport properties in the organic semiconductor channel, due to the polaron disorder elicited by the high-k properties and the presence of the –N(CH₃)₂ polarity (hole trapper) on the dielectric/semiconductor interface. In this report, the surface of the Hf and Zr hybrid dielectrics was capped by an ultra-thin poly-1,3,5-trivinyl-1,3,5,-trimethyl-cyclosiloxane (pV3D3) layer formed via an initiated chemical vapor deposition (iCVD) process, to modify the hybrid dielectrics/semiconductor interface. The pV3D3-capped Hf and Zr hybrid OTFTs show an enhanced V_T stability while a large amount of V_T shift was observed from the Hf and Zr hybrid OTFTs. This large amount of V_T shift is attributed to the hole trap sites originated by –N(CH₃)₂ on the uncapped hybrid dielectrics. Furthermore, the p-type OTFTs with the pV3D3-capped hybrid dielectrics show a higher mobility than those with the uncapped hybrid dielectrics. The presence of the non-polar/low-k pV3D3 on the hybrids contribute to narrow the density of state (DOS) in the organic channel, improving the charge transport properties. This combined approach using the bulk layer of Hf and Zr hybrid films and the pV3D3 capping layer can overcome the limitations of single-layer hybrid dielectrics and improve the overall device performance of the OTFTs.     

Synthesis of Ultrathin,Homogeneous Copolymer Dielectrics to Control the Threshold Voltage of Organic Thin‐Film Transistors

This work demonstrates that threshold voltage (V_T) of organic thin‐film transistors (OTFTs) can be controlled systematically by introducing new copolymer dielectrics with electropositive functionality. A series of homogeneous copolymer dielectrics are polymerized from two monomers, 1,3,5‐trimethyl‐1,3,5‐trivinyl cyclotrisiloxane (V3D3) and 1‐vinylimidazole (VI), via initiated chemical vapor deposition. The chemical composition of the copolymer dielectrics is exquisitely controlled to tune the V_T of C₆₀ OTFTs. In particular, all the copolymer dielectrics demonstrated in this work exhibit extremely low leakage current densities (lower than 2.5 × 10^?8 A cm^?2 at ±3 MV cm^?1) even with a thickness less than 23 nm. Furthermore, by introducing an ultrathin pV3D3 interfacial layer (about 3 nm) between the copolymer dielectrics and C₆₀ semiconductor, the high mobility of the C₆₀ OTFTs (about 1 cm² V^?1 s^?1) remains unperturbed, showing that V_T can be controlled independently by tuning the composition of the copolymer dielectrics. Coupled with the ultralow dielectric thickness, the independent V_T controllability allows the V_T to be aligned near 0 V with sub‐3 V operating voltage, which enables a substantial decrease of device power consumption. The suggested method can be employed widely to enhance device performance and reduce power consumption in various organic integrated circuit applications.     

Low‐Power Nonvolatile Charge Storage Memory Based on MoS2 and an Ultrathin Polymer Tunneling Dielectric

Low‐power, nonvolatile memory is an essential electronic component to store and process the unprecedented data flood arising from the oncoming Internet of Things era. Molybdenum disulfide (MoS₂) is a 2D material that is increasingly regarded as a promising semiconductor material in electronic device applications because of its unique physical characteristics. However, dielectric formation of an ultrathin low‐k tunneling on the dangling bond‐free surface of MoS₂ is a challenging task. Here, MoS₂‐based low‐power nonvolatile charge storage memory devices are reported with a poly(1,3,5‐trimethyl‐1,3,5‐trivinyl cyclotrisiloxane) (pV3D3) tunneling dielectric layer formed via a solvent‐free initiated chemical vapor deposition (iCVD) process. The surface‐growing polymerization and low‐temperature nature of the iCVD process enable the conformal growing of low‐k (≈2.2) pV3D3 insulating films on MoS₂. The fabricated memory devices exhibit a tunable memory window with high on/off ratio (≈10⁶), excellent retention times of 10⁵ s with an extrapolated time of possibly years, and an excellent cycling endurance of more than 10³ cycles, which are much higher than those reported previously for MoS₂‐based memory devices. By leveraging the inherent flexibility of both MoS₂ and polymer dielectric films, this research presents an important milestone in the development of low‐power flexible nonvolatile memory devices.     

Printable Organic‐Inorganic Nanoscale Multilayer Gate Dielectrics for Thin‐Film Transistors Enabled by a Polymeric Organic Interlayer

Here, a new approach to the layer‐by‐layer solution‐processed fabrication of organic/inorganic hybrid self‐assembled nanodielectrics (SANDs) is reported and it is demonstrated that these ultrathin gate dielectric films can be printed. The organic SAND component, named P‐PAE, consists of polarizable π‐electron phosphonic acid‐based units bound to a polymeric backbone. Thus, the new polymeric SAND (PSAND) can be fabricated either by spin‐coating or blade‐coating in air, by alternating P‐PAE, a capping reagent layer, and an ultrathin ZrOx layer. The new PSANDs thickness vary from 6 to 15 nm depending on the number of organic‐ZrOx bilayers, exhibit tunable film thickness, well‐defined nanostructures, large electrical capacitance (up to 558 nF cm^?2), and good insulating properties (leakage current densities as low as 10^?6 A cm^?2). Organic thin‐film transistors that are fabricated with representative p‐/n‐type organic molecular/polymeric semiconducting materials, function well at low voltages (<3.0 V). Furthermore, flexible TFTs fabricated with PSAND exhibit excellent mechanical flexibility and good stress stability, offering a promising route to low operating voltage flexible electronics. Finally, printable PSANDs are also demonstrated and afford TFTs with electrical properties comparable to those achieved with the spin‐coated PSAND‐based devices.     

The Role of OTS Density on Pentacene and C60 Nucleation,Thin Film Growth,and Transistor Performance

In organic thin film transistors (OTFTs), charge transport occurs in the first few monolayers of the semiconductor near the semiconductor/dielectric interface. Previous work has investigated the roles of dielectric surface energy, roughness, and chemical functionality on performance. However, large discrepancies in performance, even with apparently identical surface treatments, indicate that additional surface parameters must be identified and controlled in order to optimize OTFTs. Here, a crystalline, dense octadecylsilane (OTS) surface modification layer is found that promotes two‐dimensional semiconductor growth. Higher mobility is consistently achieved for films deposited on crystalline OTS compared to on disordered OTS, with mobilities as high as 5.3 and 2.3 cm² V^?1 s^?1 for C₆₀ and pentacene, respectively. This is a significant step toward morphological control of organic semiconductors which is directly linked to their thin film charge carrier transport.     

Facile conversion of polymer organic thin film transistors from ambipolar and p-type into unipolar n-type using polyethyleneimine (PEI)-modified electrodes

We report here a successful polarity conversion of organic thin film transistors (OTFTs) based on several polymer semiconductors with low-lying LUMO (lowest unoccupied molecular orbital) energy levels (?−4 eV) from ambipolar and even p-type into unipolar n-type devices using an ultrathin layer (∼2–5 nm) of polyethyleneimine (PEI) to modify the source and drain contacts. The work function of gold is substantially reduced with the PEI layer on its surface, which effectively suppresses the injection of holes and thus enables electron-only charge transport of these polymers in OTFTs. This general approach of electrode work function modification broadens the scope of available polymer semiconductors for use in printed electronics where n-channel OTFTs are needed.     

Low-voltage p-channel, n-channel and ambipolar organic thin-film transistors based on an ultrathin inorganic/polymer hybrid gate dielectric layer

A key issue in research into organic thin-film transistors (OTFTs) is low-voltage operation. In this study, we fabricated low-voltage operating (below 3V) p-channel, n-channel and ambipolar OTFTs based on pentacene or/and C₆₀ as the active layers, respectively, with an ultrathin AlO_X/poly(methyl methacrylate co glycidyl methacrylate) (P(MMA–GMA)) hybrid layer as the gate dielectric. Benefited from the enhanced crystallinity of C₆₀ layer and greatly reduced density of electron trapping states at the interface of channel/dielectric due to the insertion of ultrathin pentacene layer between C₆₀ and P(MMA–GMA), high electron mobility can be achieved in present pentacene/C₆₀ heterostructure based ambipolar OTFTs. The effect of the thickness of pentacene layer and the deposition sequence of pentacene and C₆₀ on the device performance of OTFTs was studied. The highest electron mobility of 3.50 cm²/V s and hole mobility of 0.25 cm²/V s were achieved in the ambipolar OTFT with a pentacene (3.0 nm)/C₆₀ (30 nm) heterostructure.     

Low-voltage operation of organic thin-film transistors based on ultrafine printed silver electrodes

We report the low-voltage operation of organic thin-film transistors (OTFTs) based on high-resolution printed source/drain electrodes that are produced by a surface photoreactive nanometal printing (SuPR-NaP) technique. We utilized an ultrathin layer of perfluoropolymer, Cytop, that functions not only as a gate dielectric layer in the OTFTs but also as a base layer for producing a patterned reactive surface for silver nanoparticle chemisorption in the SuPR-NaP technique. We successfully demonstrate 2 V operation with negligible hysteresis in the polycrystalline pentacene OTFT with a gate dielectric thickness of 22 nm, and we achieved current amplification by the printed electrodes modified with pentafluorobenzenethiol. The SuPR-NaP technique enables the production of high-resolution printed silver electrodes required for high-performance OTFTs, which have potential practical electronic device applications.     

Highly Efficient Charge Transport in a Quasi‐Monolayer Semiconductor on Pure Polymer Dielectric

The study of monolayer organic field‐effect transistors (MOFETs) provides an effective way to investigate the intrinsic charge transport of semiconductors. To date, the research based on organic monolayers on polymeric dielectrics lays far behind that on inorganic dielectrics and the realization of a bulk‐like carrier mobility on pure polymer dielectrics is still a formidable challenge for MOFETs. Herein, a quasi‐monolayer coverage of pentacene film with orthorhombic phase is grown on the poly (amic acid) (PAA) dielectric layer. More significantly, charge density redistribution occurs at the interface between the pentacene and PAA caused by electron transfer from pentacene to the PAA dielectric layer, which is verified by theoretical simulations and experiments. As a consequence, an enhanced hole accumulation layer is formed and pentacene‐based MOFETs on pure polymer dielectrics exhibit bulk‐like carrier mobilities of up to 13.7 cm² V^?1 s^?1 from the saturation region at low V_GS, 9.1 cm² V^?1 s^?1 at high V_GS and 7.6 cm² V^?1 s^?1 from the linear region, which presents one of the best results of previously reported MOFETs so far and indicates that the monolayer semiconductor growing on pure polymer dielectric could produce highly efficient charge transport.     

Physicochemically Stable Polymer‐Coupled Oxide Dielectrics for Multipurpose Organic Electronic Applications

A chemically coupled polymer layer is introduced onto inorganic oxide dielectrics from a dilute chlorosilane‐terminated polystyrene (PS) solution. As a result of this surface modification, hydrophilic‐oxide dielectrics gain hydrophobic, physicochemically stable properties. On such PS‐coupled SiO₂ or AlO_x dielectrics, various vacuum‐ and solution‐processable organic semiconductors can develop highly ordered crystalline structures that provide higher field‐effect mobilities (μ_FETs) than other surface‐modified systems, and negligible hysteresis in organic field‐effect transistors (OFETs). In particular, the use of PS‐coupled AlO_x nanodielectrics enables a solution‐processable triethylsilylethynyl anthradithiophene OFET to operate with μ_FET ～ 1.26 cm² V^?1 s^?1 at a gate voltage below –1 V. In addition, a complementary metal‐oxide semiconductor‐like organic inverter with a high voltage gain of approximately 32 was successfully fabricated on a PS‐coupled SiO₂ dielectric.     

High performance tetrathienoacene-DDP based polymer thin-film transistors using a photo-patternable epoxy gate insulating layer

High performance organic thin-film transistors (OTFTs) are fabricated on an epoxy based photo-patternable organic gate insulating layer (p-OGI) using a top contact thin-film transistor configuration. This negative tone p-OGI material is composed of an epoxy type polymer resin, a polymeric epoxy cross-linker, and a sulfonium photoacid generator (PAG). Features from p-OGI can be precisely patterned down to ∼3 μm via i-line photolithography. In order to evaluate the potential of this epoxy type resin as a gate insulator, we evaluated the dielectric properties of the p-OGI and its gate insulating performance upon fabricating solution processed OTFTs using an organic semiconductor (OSC), namely tetrathienoacene-DPP copolymer (PTDPPTFT4). Results show that the PTDPPTFT4 based OTFTs with this p-OGI exhibit field-effect mobilities up to 1 cm² V⁻¹ s⁻¹, indicating the potential of high performance solution processed OTFT based on an epoxy based p-OGI/OSC system.     

All-Inkjet-Printed Bottom-Gate Thin-Film Transistors Using UV Curable Dielectric for Well-Defined Source-Drain Electrodes

Technological restrictions of the inkjet printing technology for printed electronics can hinder its application potential, mainly due to the limited resolution and layer homogeneity in comparison to conventional manufacturing techniques for electronics. The manufacturing of active devices such as thin-film transistors with appropriate performance using printing technologies is still one of the current challenges towards industrial applications. This work demonstrates the application of an ultraviolet (UV) curable ink as insulating material for the gate dielectric. The advantage of the UV curable ink is its fast curing and the smooth surface enabling high resolution patterns on top of it. In this way, all-inkjet-printed organic thin-film transistors (OTFTs) were fabricated with silver electrodes, UV curable gate dielectric, and 6,13-bis(triisopropylsilylethynyl)pentacene for the active semiconductor layer. By fine tuning of processing parameters and pattern geometries, a stable channel length of about 10 μm was obtained in the bottom-gate configuration without the need of additional steps, suggesting a way to build low-cost all-inkjet-printed OTFTs with well-defined source-drain electrodes and fast UV curable dielectric without any additional steps. The inkjet-printed device is characterized by an electron mobility of 0.012 cm² V^?1 s^?1 and on/off ratio of 10³.     

Battery Drivable Organic Single‐Crystalline Transistors Based on Surface Grafting Ultrathin Polymer Dielectric

High‐performance and battery drivable organic single‐crystalline transistors with operational voltages ≤ 2.0 V are demonstrated using high‐quality copper phthalocyanine (CuPc) single‐crystalline nanoribbons and ultrathin polymer nanodielectrics. The ultrathin polymer nanodielectric is synthesized by grafting a ca. 10 nm poly(methyl methacrylate) (PMMA) brush on a silicon surface via surface‐initiated atom‐transfer radical polymerization (SI‐ATRP). This surface‐grafted nanodielectric exhibits a large capacitance, excellent insulating property, and good compatibility with organic semiconductors. The realization of a low operational voltage for battery driving at high performance, together with the merits of surface grafting of a nanodielectric, as well as the mechanical flexibility of the organic nanoribbon, suggests a bright future for use of these transistors in low‐cost and flexible circuits.     

Low Voltage and Ferroelectric 2D Electron Devices Using Lead‐Free BaxSr1‐xTiO3 and MoS2 Channel

Coupling between non‐toxic lead‐free high‐k materials and 2D semiconductors is achieved to develop low voltage field effect transistors (FETs) and ferroelectric non‐volatile memory transistors as well. In fact, low voltage switching ferroelectric memory devices are extremely rare in 2D electronics. Now, both low voltage operation and ferroelectric memory function have been successfully demonstrated in 2D‐like thin MoS₂ channel FET with lead‐free high‐k dielectric Ba_xSr_1‐xTiO₃ (BST) oxides. When the BST surface is coated with a 5.5‐nm‐ultrathin poly(methyl methacrylate) (PMMA)‐brush for improved roughness, the MoS₂ FET with BST (x = 0.5) dielectric results in an extremely low voltage operation at 0.5 V. Moreover, the BST with an increased Ba composition (x = 0.8) induces quite good ferroelectric memory properties despite the existence of the ultrathin PMMA layer, well switching the MoS₂ FET channel states in a non‐volatile manner with a ±3 V low voltage pulse. Since the employed high‐k dielectric and ferroelectric oxides are lead‐free in particular, the approaches for applying high‐k BST gate oxide for 2D MoS₂ FET are not only novel but also practical towards future low voltage nanoelectronics and green technology.     

Simultaneous Modification of Bottom‐Contact Electrode and Dielectric Surfaces for Organic Thin‐Film Transistors Through Single‐Component Spin‐Cast Monolayers

An efficient process is developed by spin‐coating a single‐component, self‐assembled monolayer (SAM) to simultaneously modify the bottom‐contact electrode and dielectric surfaces of organic thin‐film transistors (OTFTs). This effi cient interface modifi cation is achieved using n‐alkyl phosphonic acid based SAMs to prime silver bottom‐contacts and hafnium oxide (HfO₂) dielectrics in low‐voltage OTFTs. Surface characterization using near edge X‐ray absorption fi ne structure (NEXAFS) spectroscopy, X‐ray photoelectron spectroscopy (XPS), attenuated total reflectance Fourier transform infrared (ATR‐FTIR) spectroscopy, atomic force microscopy (AFM), and spectroscopic ellipsometry suggest this process yields structurally well‐defi ned phosphonate SAMs on both metal and oxide surfaces. Rational selection of the alkyl length of the SAM leads to greatly enhanced performance for both n‐channel (C₆₀) and p‐channel (pentacene) based OTFTs. Specifi cally, SAMs of n‐octylphos‐phonic acid (OPA) provide both low‐contact resistance at the bottom‐contact electrodes and excellent interfacial properties for compact semiconductor grain growth with high carrier mobilities. OTFTs based on OPA modifi ed silver electrode/HfO₂ dielectric bottom‐contact structures can be operated using < 3V with low contact resistance (down to 700 Ohm‐cm), low subthreshold swing (as low as 75 mV dec^?1), high on/off current ratios of 107, and charge carrier mobilities as high as 4.6 and 0.8 cm² V^?1 s^?1, for C60 and pentacene, respectively. These results demonstrate that this is a simple and efficient process for improving the performance of bottom‐contact OTFTs.     

Organic Thin‐Film Transistors: Simultaneous Modification of Bottom‐Contact Electrode and Dielectric Surfaces for Organic Thin‐Film Transistors Through Single‐Component Spin‐Cast Monolayers (Adv. Funct. Mater. 8/2011)

An efficient process is developed by spin‐coating a single‐component, self‐assembled monolayer (SAM) to simultaneously modify the bottom‐contact electrode and dielectric surfaces of organic thin‐film transistors (OTFTs). This effi cient interface modifi cation is achieved using n‐alkyl phosphonic acid based SAMs to prime silver bottom‐contacts and hafnium oxide (HfO₂) dielectrics in low‐voltage OTFTs. Surface characterization using near edge X‐ray absorption fi ne structure (NEXAFS) spectroscopy, X‐ray photoelectron spectroscopy (XPS), attenuated total reflectance Fourier transform infrared (ATR‐FTIR) spectroscopy, atomic force microscopy (AFM), and spectroscopic ellipsometry suggest this process yields structurally well‐defi ned phosphonate SAMs on both metal and oxide surfaces. Rational selection of the alkyl length of the SAM leads to greatly enhanced performance for both n‐channel (C₆₀) and p‐channel (pentacene) based OTFTs. Specifi cally, SAMs of n‐octylphos‐phonic acid (OPA) provide both low‐contact resistance at the bottom‐contact electrodes and excellent interfacial properties for compact semiconductor grain growth with high carrier mobilities. OTFTs based on OPA modifi ed silver electrode/HfO₂ dielectric bottom‐contact structures can be operated using < 3V with low contact resistance (down to 700 Ohm‐cm), low subthreshold swing (as low as 75 mV dec^?1), high on/off current ratios of 107, and charge carrier mobilities as high as 4.6 and 0.8 cm² V^?1 s^?1, for C60 and pentacene, respectively. These results demonstrate that this is a simple and efficient process for improving the performance of bottom‐contact OTFTs.     

A Facile Method for the Growth of Organic Semiconductor Single Crystal Arrays on Polymer Dielectric toward Flexible Field‐Effect Transistors

Polymer dielectrics with intrinsic mechanical flexibility are considered as a key component for flexible organic field‐effect transistors (OFETs). However, it remains a challenge to fabricate highly aligned organic semiconductor single crystal (OSSC) arrays on the polymer dielectrics. Herein, for the first time, a facile and universal strategy, polar surface‐confined crystallization (PSCC), is proposed to grow highly aligned OSSC arrays on poly(4‐vinylphenol) (PVP) dielectric layer. The surface polarity of PVP is altered periodically with oxygen‐plasma treatment, enabling the preferential nucleation of organic crystals on the strong‐polarity regions. Moreover, a geometrical confinement effect of the patterned regions can also prevent multiple nucleation and misaligned molecular packing, enabling the highly aligned growth of OSSC arrays with uniform morphology and unitary crystallographic orientation. Using 2,7‐dioctyl[1]benzothieno[3,2‐b]benzothiophene (C8‐BTBT) as an example, highly aligned C8‐BTBT single crystal arrays with uniform molecular packing and crystal orientation are successfully fabricated on the PVP layer, which can guarantee their uniform electrical properties. OFETs made from the C8‐BTBT single crystal arrays on flexible substrates exhibit a mobility as high as 2.25 cm² V^?1 s^?1, which has surpassed the C8‐BTBT polycrystalline film‐based flexible devices. This work paves the way toward the fabrication of highly aligned OSSCs on polymer dielectrics for high‐performance, flexible organic devices.     

Nanoparticle-dispersed high-k organic–inorganic hybrid dielectrics for organic thin-film transistors

We fabricated solution-processable thin gate dielectrics for organic thin-film transistors (OTFTs) using an organosiloxane-based organic–inorganic hybrid material. The electrical characteristics of the hybrid dielectrics were controlled by adjusting the zirconium alkoxide concentration. Microstructural observation and chemical analysis allow us to determine the influence of microstructure and composition on the electrical properties of the hybrid dielectrics. Our hybrid material is composed of three phases: ZrO₂, ZrSiO₄, and organosiloxane. OTFTs based on the hybrid dielectrics exhibited better electrical performance compared to transistors based on poly(4-vinylphenol) (PVP). Using a dielectric with a higher dielectric constant and fewer hydroxyl groups enabled us to fabricate a transistor with a lower off-current, higher on/off current ratio, and lower threshold voltage.     

Polyelectrolyte Dielectrics for Flexible Low‐Voltage Organic Thin‐Film Transistors in Highly Sensitive Pressure Sensing

Organic thin‐film transistors (OTFTs) can provide an effective platform to develop flexible pressure sensors in wearable electronics due to their good signal amplification function. However, it is particularly difficult to realize OTFT‐based pressure sensors with both low‐voltage operation and high sensitivity. Here, controllable polyelectrolyte composites based on poly(ethylene glycol) (PEG) and polyacrylic acid (PAA) are developed as a type of high‐capacitance dielectrics for flexible OTFTs and ultrasensitive pressure sensors with sub‐1 V operation. Flexible OTFTs using the PAA:PEG dielectrics show good universality and greatly enhanced electrical performance under a much smaller operating voltage of ?0.7 V than those with a pristine PAA dielectric. The low‐voltage OTFTs also exhibit excellent flexibility and bending stability under various bending radii and long cycles. Flexible OTFT‐based pressure sensors with low‐voltage operation and superhigh sensitivity are demonstrated by using a suspended semiconductor/dielectric/gate structure in combination with the PAA:PEG dielectric. The sensors deliver a record high sensitivity of 452.7 kPa^?1 under a low‐voltage of ?0.7 V, and excellent operating stability over 5000 cycles. The OTFT sensors can be built into a wearable sensor array for spatial pressure mapping, which shows a bright potential in flexible electronics such as wearable devices and smart skins.     

A new biodegradable gate dielectric material based on keratin protein for organic thin film transistors

By virtue of the biocompatibility, environmental benignity, and sustainability, as well as low cost of keratin protein's source herein, we report its application as a gate dielectric material for organic electronic devices. Keratin protein, which is a biodegradable material was directly extracted from poultry chicken feathers (CFs). Solution-processed regioregular poly(3-hexylthiophene) (P3HT) organic thin film transistors (OTFTs) with keratin dielectric thin film exhibited enhanced charge mobility of 2.293 × 10⁻³ cm² V⁻¹ s⁻¹ (saturation regime), high on-off current ratio of 10⁵ and low threshold voltage, -1V as compared to conventional SiO₂ dielectric. All the fabrication processes were performed below 100 °C. A detailed semiconductor-dielectric interface study has revealed that the high content of β-sheet structure in keratin protein has guided the P3HT polymer chains, through supramolecular forces of interaction to form 2D nanoribbons of large crystallite size (150 nm) over keratin thin film. This has led to the reduced trapping sites at the semiconductor/dielectric interface and hence the enhanced electrical performance of OTFTs was observed. Atomic force microscopy (AFM) and Grazing Incidence X-ray diffraction (GI-XRD) study was further employed to explore the mechanism of formation of 2D nanoribbons of P3HT. The primary and secondary structure of keratin protein as analyzed by AFM, Transmission electron microscopy (TEM) and Fourier transform spectroscopy (FTIR) is also provided in this study. The water compatible nature of keratin has helped to overcome the common issue of dielectric layer washing that occurs mostly during fabrication of OTFTs by sol-gel method. The biodegradable nature of keratin protein has also been demonstrated here by providing it as feed to fishes in an aquarium.