4H-SiC PIN二极管的正向特性计算模型

提出了一种基于双极性扩散方程的PIN二极管的一维物理计算模型。该模型主要针对PIN二极管的正向温度特性研究,考虑了载流子扩散系数、载流子迁移率、禁带变窄效应、载流子寿命随温度变化的影响。介绍了双极性扩散方程的傅里叶级数解,利用方程的傅里叶级数解推导得到一组微分方程,并采用迭代法求解。利用该模型计算分析了4H-SiC PIN二极管在298～498 K温度下的正向电学特性,分析了PIN二极管的PN结处的电子电流和空穴电流的分布,结合SILVACO-TCAD仿真软件,设计了一种器件结构,仿真结果与计算模型基本吻合。最后结合实验数据验证了模型的准确性。     

PIN开关速度仿真

高速PIN开关在通信、雷达和电子对抗系统中有着广泛的应用,然而在设计PIN开关电路时却不能通过仿真准确地得出其开关速度。提出一种新的PIN管开关速度的仿真方法,根据PIN二极管开关导通与关断时刻内部各个PIN管的状态作为判定依据,可以准确仿真计算开关的导通与截止时间。采用Strllo提出的PIN管瞬态模型进行仿真,计算结果与实际测试结果相符。该方法可准确地仿真PIN开关速度,也可以用于其他半导体控制电路的开关时间仿真。     

基于短波通信的射频前端电磁脉冲防护模块仿真与设计

随着通信系统面临的电磁工作环境越来越严峻,高功率容量、低插损、快响应时间的电磁脉冲防护模块对其射频前端电路的保护越发的重要起来.本文主要基于PIN二级管射频限幅的原理,构建了PIN二极管的时域等效电路模型,利用去嵌入阻抗场计算方法提取相应电路的S参数,优化设计匹配网络,并采用无源多级PIN二极管结构,设计了一个工作于0~200MHz,插入损耗小于0.15dB,驻波比小于1.4dB,响应时间小于1ns的短波通信电磁脉冲防护模块.结合PIN二极管时域等效电路模型,利用先进设计系统（Advanced Design System,ADS）仿真软件对电磁脉冲防护模块限幅性能进行仿真,并对加工出来的电磁脉冲防护模块进行了测试,结果验证了各项指标满足要求.     

一种PIN二极管参数的提取方法与应用

采用夹具测量微波元件参数时会引入夹具误差。本文设计了一款适用于SMP-1320-079LF型号PIN二极管散射参数测量的夹具和对应的TRL校准套件,并利用TRL校准方法测试了该型号PIN二极管在UHF频段的实际散射参数。然后,建立了PIN二极管在两种工作状态下的等效电路模型,并根据测试参数,提取了等效电路参数。基于UHF-RFID系统应用需求,将PIN二极管应用于三端口开关馈电网络的设计,其工作频段为900～950 MHz。结果表明,改变PIN二极管的输入输出阻抗,三端口馈电网络均具有较好的开关特性,仿真与实测结果吻合。     

功率PIN二极管PSpice子电路模型

提出一种改进的PIN二极管子电路模型。该模型能够反映PIN二极管的瞬态开关特性,将基区电导调制效应考虑在内。通过PSpice软件瞬态仿真PIN二极管的正向直流、反向恢复特性。利用该子电路对新型SiC材料PIN二极管建模仿真,仿真结果表明运用新材料对二极管开关性能有显著提高。     

PIN二极管子电路模型与微波限幅研究

利用一种改进的PIN二极管子电路模型，通过Pspice软件瞬态仿真研究了PIN限幅器的平顶泄漏和高频限幅性能。利用该子电路对新型SiC材料PIN二极管建模仿真，仿真结果表明新型二极管可以提高限幅器的性能。     

一种新型的波导缝隙频率可重构天线的研究与设计

设计了一种基于硅基等离子体的波导缝隙频率可重构天线.首先对横向PIN二极管进行了介绍,并以横向PIN二极管为基础提出了一种双横向PIN二极管结构,叙述了双横向PIN二极管的工作原理.其次,结合双横向PIN二极管和波导缝隙天线,提出了一种新型的波导缝隙频率可重构天线,并对天线进行建模与仿真,仿真结果表明:该天线实现了103.5、104和104.5 GHz的频率可重构.     

基于AFSS的吸波性能可调的微波吸收体

从传统的Salisbury屏结构出发,设计了一种由半圆和三角图形组合而成的频率选择表面(FSS)单元,随后将PIN二极管与FSS图形相结合,制得了一种AFSS吸波结构体.利用电抗加载方式对该结构体进行了仿真,并在微波暗室下对实物进行了测试.结果表明:测试结果和仿真结果变化趋势相似.在2～8 GHz内,结构体吸收峰从-4...     

基于ADS的数字调谐跳频滤波器设计方法

介绍了基于ADS的数字调谐跳频滤波器仿真设计方法。根据集总元件耦合谐振器滤波器理论计算出滤波器仿真参数,应用ADS对包括微带线、PIN二极管等参数模型的滤波器电路模拟仿真,解决数字调谐跳频滤波器电容阵列的取值问题。结合ADS仿真数据和实物测试结果,验证了该方法的有效性。     

应用于硅基等离子天线的横向PIN二极管的研究

介绍了横向PIN二极管及其在硅基等离子天线方面的应用,用一维理论分析了载流子大注入情况下横向PIN二极管本征区载流子浓度分布.对横向PIN二极管进行了物理建模,仿真分析了本征区长度、二氧化硅埋层、电极长度、结区掺杂浓度及表面电荷对横向PIN二极管本征区载流子浓度的影响,总结了横向PIN二极管的一般设计规则.     

Simulation and Experimental Study on the Junction Termination Structure for High-Voltage 4H-SiC PiN Diodes

Designing and fabrication of 10-kV 4H-SiC PiN diodes with an improved junction termination structure have been investigated. An improved bevel mesa structure and a single-zonejunction termination extension (JTE) have been employed to achieve a high breakdown voltage $(geq!hbox{10} hbox{kV})$ . The improved bevel mesa structure, nearly a vertical sidewall at the edge of the p-n junction and a gradual slope at the mesa bottom, has been fabricated by reactive ion etching. The effectiveness of the improved bevel mesa structure has been experimentally demonstrated. The JTE region has been optimized by device simulation, and the JTE dose dependence of the breakdown voltage has been compared with experimental results. A 4H-SiC PiN diode with a JTE dose of $hbox{1.1} times hbox{10}^{13} hbox{cm}^{-2}$ has exhibited a high blocking voltage of 10.2 kV. The locations of electric field crowding and breakdown are also discussed.      

High-voltage 4H-SiC PiN diodes with the etched implant junction termination extension

This paper presents the design and fabrication of an etched implant junction termination extension(JTE) for high-voltage 4H-SiC PiN diodes. Unlike the conventional JTE structure, the proposed structure utilizes multiple etching steps to achieve the optimum JTE concentration range. The simulation results show that the etched implant JTE method can improve the blocking voltage of SiC PiN diodes and also provides broad process latitude for parameter variations, such as implantation dose and activation annealing condition. The fabricated SiC PiN diodes with the etched implant JTE exhibit a highest blocking voltage of 4.5 kV and the forward on-state voltage of 4.6 V at room temperature. These results are of interest for understanding the etched implant method in the fabrication of high-voltage power devices.     

High-Voltage 4H-SiC PiN Diodes With Etched Junction Termination Extension

Implantation-free mesa-etched 4H-SiC PiN diodes with a near-ideal breakdown voltage of 4.3 kV (about 80% of the theoretical value) were fabricated, measured, and analyzed by device simulation and optical imaging measurements at breakdown. The key step in achieving a high breakdown voltage is a controlled etching into the epitaxially grown p-doped anode layer to reach an optimum dopant dose of $sim!! hbox{1.2}times hbox{10}^{13} hbox{cm}^{-2}$ in the junction termination extension (JTE). Electroluminescence revealed a localized avalanche breakdown that is in good agreement with device simulation. A comparison of diodes with single- and double-zone etched JTEs shows a higher breakdown voltage and a less sensitivity to varying processing conditions for diodes with a two-zone JTE.      

Device processing and characterisation of high temperature silicon carbide Schottky diodes

High temperature silicon carbide diodes with nickel silicide Schottky contacts were fabricated by deposition of titanium-nickel metal film on 4H-SiC epitaxial wafer followed by annealing at 550 °C in vacuum. Room temperature boron implantation have been used to form single zone junction termination extension. 4H-SiC epitaxial structures designed to have theoretical parallel-plain breakdown voltages of 1900 and 3600 V have been used for this research. The diodes revealed soft recoverable avalanche breakdown at voltages of 1450 and 3400 V, respectively, which are about 80% and 95% of theoretical values. I-V characteristics of fabricated 4H-SiC Schottky diodes have been measured at temperatures from room temperature up to 400 °C. The diodes revealed unchangeable barrier heights and ideality factors as well as positive coefficients of breakdown voltage.     

6H-SiC高反压台面pn结二极管

在可商业获得的单晶6H-SiC晶片上,通过化学气相淀积,进行同质外延生长;并在此6H-SiC结构材料上,利用反应离子刻蚀和接触合金化技术,制作台面pn结二极管．详细测量并分析了器件的电学特性,测量结果表明此6H-SiC二极管在室温、空气介质中,-10V时,漏电流密度为2.4×10-8A/cm2,在反向电压低于600V及接近300℃高温下都具有良好的整流特性．     

Static and dynamic characterization of large-areahigh-current-density SiC Schottky diodes

The static and dynamic characteristics of large-area, high-voltage 4H-SiC Schottky barrier diodes are presented. With a breakdown voltage greater than 1200 V and a forward current in excess of 6 A at 2 V forward bias, these devices enable for the first time the evaluation of SiC Schottky diodes in practical switching circuits. These diodes were inserted into standard test circuits and compared to commercially available silicon devices, the results of which are reported here. Substituting SiC Schottky diodes in place of comparably rated silicon PIN diodes reduced the switching losses by a factor of four, and virtually eliminated the reverse recovery transient. These results are even more dramatic at elevated temperatures. While the switching loss in silicon diodes increases dramatically with temperature, the SiC devices remain essentially unchanged. The data presented here clearly demonstrates the distinct advantages offered by SiC Schottky rectifiers, and their emerging potential to replace silicon PIN diodes in power switching applications     

Planar edge termination for 4H-silicon carbide devices

In this paper, it is demonstrated that the edge termination for 6H-SiC based upon self-aligned implantation of a neutral species on the edges of devices to form an amorphous layer can also be applied to 4H-SiC inspite of differences in their band structures. With this termination formed using argon implantation on Schottky barrier diodes, breakdown voltages were found to exceed those reported for mesa edge terminated diodes. Based upon this, it can be concluded that nearly ideal breakdown voltage is also achievable in 4H-SiC devices by using this planar edge termination     

SiC power Schottky and PiN diodes

The present state of SiC power Schottky and PiN diodes are presented in this paper. The design, fabrication, and characterization of a 130 A Schottky diode, 4.9 kV Schottky diode, and an 8.6 kV 4H-SiC PiN diode, which are considered to be significant milestones in the development of high power SiC diodes, are described in detail. Design guidelines and practical issues for the realization of high-power SiC Schottky and PiN diodes are also presented. Experimental results on edge termination techniques applied to newly developed, extremely thick (e.g., 85 and 100 μm) 4H-SiC epitaxial layers show promising results. Switching and high-temperature measurements prove that SiC power diodes offer extremely low loss alternatives to conventional technologies and show the promise of demonstrating efficient power circuits. At sufficiently high on-state current densities, the on-state voltage drop of Schottky and PiN diodes have been shown to be comparable to those offered by conventional technologies     

高性能SiC整流二极管研究

在n型4H-SiC单晶导电衬底上制备了具有MPS(merged p-i-n Schottky diode)结构和JTE(junction termination extension)结构的肖特基势垒二极管。通过高温离子注入及相应的退火工艺,进行了区域性p型掺杂,形成了高真空电子束蒸发Ni/Pt/Au复合金属制备肖特基接触,衬底溅射Ti W/Au并合金做欧姆接触,采用场板和JTE技术减小高压电场集边效应。该器件具有良好的正向整流特性和较高的反向击穿电压。反向击穿电压可以达到1300V,开启电压约为0.7V,理想因子为1.15,肖特基势垒高度为0.93eV,正向电压3.0V时,电流密度可以达到700A/cm2。     

一种新型4H-SiC BJT结终端结构研究

设计了一种应用于4H-SiC BJT的新型结终端结构。该新型结终端结构通过对基区外围进行刻蚀形成单层刻蚀型外延终端,辅助耐压的p+环位于刻蚀型外延终端的表面,采用离子注入的方式,与基极接触的p+区同时形成。借助半导体数值分析软件SILVACO,对基区外围的刻蚀厚度和p+环的间距进行了优化。仿真分析结果表明,当刻蚀厚度为0.8μm,环间距分别为8,10和9μm时,能获得最高击穿电压。新结构与传统保护环(GR)和传统结终端外延(JTE)相比,BVCEO分别提高了34%和15%。利用该新型终端结构,得到共发射极电流增益β>47、共发射极击穿电压BVCEO为1 570V的4H-SiC BJT器件。