State‐of‐the‐Art in GPU‐Based Large‐Scale Volume Visualization

This survey gives an overview of the current state of the art in GPU techniques for interactive large‐scale volume visualization. Modern techniques in this field have brought about a sea change in how interactive visualization and analysis of giga‐, tera‐ and petabytes of volume data can be enabled on GPUs. In addition to combining the parallel processing power of GPUs with out‐of‐core methods and data streaming, a major enabler for interactivity is making both the computational and the visualization effort proportional to the amount and resolution of data that is actually visible on screen, i.e. ‘output‐sensitive’ algorithms and system designs. This leads to recent output‐sensitive approaches that are ‘ray‐guided’, ‘visualization‐driven’ or ‘display‐aware’. In this survey, we focus on these characteristics and propose a new categorization of GPU‐based large‐scale volume visualization techniques based on the notions of actual output‐resolution visibility and the current working set of volume bricks—the current subset of data that is minimally required to produce an output image of the desired display resolution. Furthermore, we discuss the differences and similarities of different rendering and data traversal strategies in volume rendering by putting them into a common context—the notion of address translation. For our purposes here, we view parallel (distributed) visualization using clusters as an orthogonal set of techniques that we do not discuss in detail but that can be used in conjunction with what we present in this survey.     

Finite‐time boundedness of switched systems with time‐varying delays via sampled‐data control

In the framework of sampled‐data control, finite‐time boundedness (FTB) of switched systems with time‐varying delays is investigated. Sufficient conditions for FTB of switched systems with time‐varying delays via sampled‐data control are proposed. Moreover, considering the relationship between the sampling period and the mode‐dependent average dwell time, switching signals are designed. In addition, finite‐time weighted L₂‐gain (FTW‐L₂‐gain) of switched systems with time‐varying delays is proposed to measure their disturbance tolerance capacity within a finite‐time interval. Multiple Lyapunov‐Krasovskii functionals are applied to complete subsequent proofs in detail. Simulation results are exemplified to verify the proposed method.     

Space‐Time Co‐Segmentation of Articulated Point Cloud Sequences

Consistent segmentation is to the center of many applications based on dynamic geometric data. Directly segmenting a raw 3D point cloud sequence is a challenging task due to the low data quality and large inter‐frame variation across the whole sequence. We propose a local‐to‐global approach to co‐segment point cloud sequences of articulated objects into near‐rigid moving parts. Our method starts from a per‐frame point clustering, derived from a robust voting‐based trajectory analysis. The local segments are then progressively propagated to the neighboring frames with a cut propagation operation, and further merged through all frames using a novel space‐time segment grouping technqiue, leading to a globally consistent and compact segmentation of the entire articulated point cloud sequence. Such progressive propagating and merging, in both space and time dimensions, makes our co‐segmentation algorithm especially robust in handling noise, occlusions and pose/view variations that are usually associated with raw scan data.     

IN‐Tune: an In‐Situ non‐invasive performance tuning tool for multi‐threaded Linux on symmetric multiprocessing Pentium workstations

This paper documents the design and implementation of the IN‐Tune software tool suite, which enables a user to collect real‐time code and hardware profiling information on Intel‐based symmetric multiprocessors running the Linux operating system. IN‐Tune provides a virtually non‐invasive tool for performance analysis and tuning of programs. Unlike other analysis tools, IN‐Tune isolates data with respect to individual threads. It also utilizes performance monitoring hardware registers to permit instrumentation of individual threads as they run in‐situ, thus collecting data with appropriate considerations for a multiprocessor environment. Data can be sampled using two different mechanisms. First, the user can collect data by making calls to the system upon the occurrence of specific software events. Secondly, data can be collected at a fixed, fine grain (e.g. 1–10 microseconds) interval using either software or hardware interrupts. To allow observation of codes for which source code modification is impractical or impossible, a ‘shell’ task is created which permits monitoring without code modification. Although this work deals with Intel processors and Linux, the widespread availability of performance monitoring registers in modern processors makes this work widely applicable. Copyright © 1999 John Wiley & Sons, Ltd.     

Improved image quality of a high‐transflective tRGB‐t/rW TFT‐LCD

Abstract— This work combines a very simple resolution rescaling method, a well‐known RGB‐to‐YUV converting technique and a detection strategy into an optimized switchable mechanism in order to eliminate the problems of obvious zigzag profiles caused by the special layouts of transflective tRGB‐t/rW TFT‐LCDs and the poor reflective gray‐level contrast ratio effected by the minimum white data in the transmissive RGB‐W + subpixel rendering algorithms. Finally, a transflective tRGB‐t/rW TFT‐LCD is revealed not only to have no visible zigzag profiles and high visibility of reflective gray‐level contrast ratio, but also to have extreme reflectance and transmittance. The excellent optical performance of the proposed system makes it particularly suitable for single‐panel applications that need both high‐transmissive main displays and high‐reflective subdisplays.     

Improving Shift‐Reduce Phrase‐Structure Parsing with Constituent Boundary Information

Shift‐reduce parsing enjoys the property of efficiency because of the use of efficient parsing algorithms like greedy/deterministic search and beam search. In addition, shift‐reduce parsing is much simpler and easy to implement compared with other parsing algorithms. In this article, we explore constituent boundary information to improve the performance of shift‐reduce phrase‐structure parsing. In previous work, constituent boundary information has been used to speed up chart parsers successfully. However, whether it is useful for improving parsing accuracy has not been investigated. We propose two different models to capture constituent boundary information, based on which two sets of novel features are designed for a shift‐reduce parser. The first model is a boundary prediction model that uses a classifier to predict the boundaries of constituents. We use automatically parsed data to train the classifier. The second one is a Tree Likelihood Model that measures the validity of a constituent by its likelihood which is calculated on automatically parsed data. Experimental results show that our proposed method outperforms a strong baseline by 0.8% and 1.6% in F‐score on English and Chinese data, respectively, achieving the competitive parsing accuracies on Chinese (84.8%) and English (90.8%). To our knowledge, this is the first time for shift‐reduce phrase‐structure parsing to advance the state‐of‐the‐art with constituent boundary information.     

ON MULTI‐CLASS COST‐SENSITIVE LEARNING

Rescaling is possibly the most popular approach to cost‐sensitive learning. This approach works by rebalancing the classes according to their costs, and it can be realized in different ways, for example, re‐weighting or resampling the training examples in proportion to their costs, moving the decision boundaries of classifiers faraway from high‐cost classes in proportion to costs, etc. This approach is very effective in dealing with two‐class problems, yet some studies showed that it is often not so helpful on multi‐class problems. In this article, we try to explore why the rescaling approach is often helpless on multi‐class problems. Our analysis discloses that the rescaling approach works well when the costs are consistent, while directly applying it to multi‐class problems with inconsistent costs may not be a good choice. Based on this recognition, we advocate that before applying the rescaling approach, the consistency of the costs must be examined at first. If the costs are consistent, the rescaling approach can be conducted directly; otherwise it is better to apply rescaling after decomposing the multi‐class problem into a series of two‐class problems. An empirical study involving 20 multi‐class data sets and seven types of cost‐sensitive learners validates our proposal. Moreover, we show that the proposal is also helpful for class‐imbalance learning.     

Key Time Steps Selection for Large‐Scale Time‐Varying Volume Datasets Using an Information‐Theoretic Storyboard

Key time steps selection is essential for effective and efficient scientific visualization of large‐scale time‐varying datasets. We present a novel approach that can decide the number of most representative time steps while selecting them to minimize the difference in the amount of information from the original data. We use linear interpolation to reconstruct the data of intermediate time steps between selected time steps. We propose an evaluation of selected time steps by computing the difference in the amount of information (called information difference) using variation of information (VI) from information theory, which compares the interpolated time steps against the original data. In the one‐time preprocessing phase, a dynamic programming is applied to extract the subset of time steps that minimize the information difference. In the run‐time phase, a novel chart is used to present the dynamic programming results, which serves as a storyboard of the data to guide the user to select the best time steps very efficiently. We extend our preprocessing approach to a novel out‐of‐core approximate algorithm to achieve optimal I/O cost, which also greatly reduces the in‐core computing time and exhibits a nice trade‐off between computing speed and accuracy. As shown in the experiments, our approximate method outperforms the previous globally optimal DTW approach [ TLS12 ] on out‐of‐core data by significantly improving the running time while keeping similar qualities, and is our major contribution.     

H∞ stabilization for networked semi‐Markovian jump systems with randomly occurring uncertainties via improved dynamic event‐triggered scheme

This paper aims to solve the H_∞ stabilization problem for networked semi‐Markovian jump systems subject to randomly occurring uncertainties by an improved event‐triggered technique. A new measurement error that is defined as the difference value between the latest transmitted data and the mean value of both current data and latest transmitted data is introduced into the event‐triggered condition. Compared with traditional dynamic event‐triggered scheme, more unexpected data could be avoided to be transmitted, which is demonstrated in the simulation through sufficient comparison experiments. Furthermore, by employing a Lyapunov‐Krasovskii functional method and a free‐weighting matrix method, sufficient conditions are derived to guarantee the stabilization of the closed‐loop semi‐Markovian jump time‐delay system with uncertainties and a prescribed performance index. Then, a codesign method for H_∞ controller gains and event‐triggered parameters is presented. Finally, simulations are given to verify the effectiveness of our improved dynamic event‐triggered scheme.     

SAT‐based and CP‐based declarative approaches for Top‐Rank‐K closed frequent itemset mining

Top‐Rank‐K Frequent Itemset (or Pattern) Mining (FPM) is an important data mining task, where user decides on the number of top frequency ranks of patterns (itemsets) they want to mine from a transactional dataset. This problem does not require the minimum support threshold parameter that is typically used in FPM problems. Rather, the algorithms solving the Top‐Rank‐K FPM problem are fed with $K$, the number of frequency ranks of itemsets required, to compute the threshold internally. This paper presents two declarative approaches to tackle the Top‐Rank‐K Closed FPM problem. The first approach is Boolean Satisfiability‐based (SAT‐based) where we propose an effective encoding for the problem along with an efficient algorithm employing this encoding. The second approach is CP‐based, that is, utilizes Constraint Programming technique, where a simple CP model is exploited in an innovative manner to mine the Top‐Rank‐K Closed FPM itemsets from transactional datasets. Both approaches are evaluated experimentally against other declarative and imperative algorithms. The proposed SAT‐based approach significantly outperforms IM, another SAT‐based approach, and outperforms the proposed CP‐approach for sparse and moderate datasets, whereas the latter excels on dense datasets. An extensive study has been conducted to assess the proposed approaches in terms of their feasibility, performance factors, and practicality of use.     

Sampling‐interval‐dependent stability for sampled‐data systems with state quantization

This paper is concerned with the stability of sampled‐data systems with state quantization. A new piecewise differentiable Lyapunov functional is first constructed by fully utilizing information about sampling instants. This functional has two features: one is that it is of the second order in time t and of every term being dependent on time t explicitly and the other is that it is discontinuous and is only required to be definite positive at sampling instants. Then, on the basis of this piecewise differentiable Lyapunov functional, a sampling‐interval‐dependent exponential stability criterion is derived by applying the technique of a convex quadratic function with respect to the time t to check the negative definiteness for the derivative of the piecewise differentiable Lyapunov functional. In the case of no quantization, a new sampling‐interval‐dependent stability criterion is also obtained. It is shown that the new stability criterion is less conservative than some existing one in the literature. Finally, two examples are given to illustrate the effectiveness of the stability criterion. Copyright © 2013 John Wiley & Sons, Ltd.     

A third‐generation timing controller and column‐driver architecture using point‐to‐point differential signaling

Abstract— Many assume LCDs will quickly dominate the TV market by simply scaling existing LCD‐monitor panels to wider formats (e.g.,16:9 HDTV) and larger sizes. However, a number of TV requirements push beyond the state‐of‐the‐art monitors of today; response time, brightness, contrast, color envelope, color temperature, and progressive scan‐and‐hold issues require a re‐engineering of the monitor solution. Building upon the strengths of LVDS and RSDS technology solutions in digital video‐data communications, we have created a completely new architecture that fully addresses the needs of TV while supporting existing LCD‐monitor and notebook panels. The Point‐to‐Point Differential Signaling (PPDS?) architecture is more than a data link between the timing controller and the column driver. It is an architecture that supports very large displays with features like multiple windows each with its own gamma, various gamma optimizations, color balance at every gray level, minimal bezel size, a color path greater than 30 bits to the display surface, four‐color mosaics, and numerous other benefits.     

Compact and power‐saving polysilicon data driver with common‐decoder DA converter (CD‐DAC)

Abstract— A common‐decoder architecture for a data‐driver circuit fabricated by using a polysilicon process has been developed. The architecture achieves a compact circuit and low‐power consumption. In application to an integrated polysilicon data driver for small‐sized displays, this architecture reduces the area of the data driver by removing the vertical bus lines that occupy a large area. It also suppresses the power consumption of the data bus by reducing the number of driven lines in the data bus during word‐to‐word transitions from six to two. By using a conventional 4‐μm design rule, we fabricated an active‐matrix OLED (AMOLED) panel with an integrated six‐bit data‐driver circuit with 384 outputs. The driver circuit had a height of 2.6 mm and a pitch between output lines of 84 μm. The maximum power consumption of the driver was only 5 mW, i.e., 3.8 mW for logic‐data transfer and 1.2 mW for reference‐voltage source. Furthermore, we also fabricated an active‐matrix LCD (AMLCD) panel including driver circuits of the same type as the integrated elements. Six‐bit full‐color images were successfully displayed on both panels.     

Defect‐free half‐V‐mode ferroelectric liquid‐crystal device

Abstract— The horizontal chevron defect found in a half‐V‐mode ferroelectric‐liquid‐crystal (HV‐FLC) device can be suppressed by lowering the FLC's total free energy. The energy levels between spontaneous polarization (PS) up and down domains were degenerated by asymmetrical‐alignment treatments. The difference in the polar surface coefficient (γ²) was the key to suppressing the alignment defect. Alignment layers with opposite surface polarities and different anchoring energies were applied to control the sign and value of γ². The asymmetric cells of PIrub ‐ PIplasma (rubbed polyimide and plasma‐treated polyimide surfaces), PVArub ‐ PIplasma (rubbed polyvinyl alcohol and plasma‐treated polyimide surfaces), and PVArub ‐ PIplasma (both rubbed PI and PVA) alignment conditions presented defect‐free alignment textures under a slow‐cooling process. Among these different alignment treatments, the PVArub ‐ PIrub treated cell demonstrated the best alignment result, benefited by the largest difference in polar surface coefficient.     

Multirate sampled‐data stabilization for a class of low‐order lower‐triangular nonlinear systems

This paper investigates the problem of sampled‐data controller design for a class of lower‐triangular systems in the p‐normal form (0<p<1). A multirate digital feedback control scheme is proposed to achieve the global strong stabilization of the sampled‐data closed‐loop system under some assumptions. In the design of the controller, the input‐Lyapunov matching strategy and multirate control approach are combined to obtain better stabilizing performance. Unlike the design method based on the approximate discrete‐time model, our controller is obtained from the exact discrete‐time equivalent model, which does not need to be computed completely. The approximate multirate digital controllers are proved to be effective in the practical implementation. It is shown that, compared with the emulated control scheme, our controller may provide faster decrease of Lyapunov function for each subsystem. This will lead to allow large sampling periods. An illustrative example is provided to verify the effectiveness of the proposed control scheme.     

A 1‐to‐n way single‐ended‐to‐balanced substrate integrated waveguide filtering power splitter

An approach to 1‐to‐n (n = 3, 4…) way single‐ended‐to‐balanced filtering power splitter (SETBFPS) is proposed. The properly placed balanced ports with 0.5λ_g (λ_g is the substrate integrated waveguide [SIW] guided wavelength at f₀) space make the TE32nd 103 and TE32nd 105 modes of n 32nd‐mode SIW multimode resonators form differential‐mode (DM) passband of the SETBFPS. Compared with the state‐of‐art single‐ended‐to‐balanced power splitters, the proposed approach has all the functions of 1‐to‐n way, filtering, and common‐mode (CM) suppression. A 1‐to‐3 way prototype is exemplified at 3.5 GHz with the minimum insertion loss (IL) of 0.09 dB, a fractional bandwidth (FBW) for a 15‐dB return loss of 35%, and a FBW for 15‐dB CM suppression of 52%. Low IL and wide bandwidth can be observed.     

Structured H∞‐control of infinite‐dimensional systems

We develop a novel frequency‐based H_∞‐control method for a large class of infinite‐dimensional linear time‐invariant systems in transfer function form. A major benefit of our approach is that reduction or identification techniques are not needed, which avoids typical distortions. Our method allows to exploit both state‐space or transfer function models and input/output frequency response data when only such are available. We aim for the design of practically useful H_∞‐controllers of any convenient structure and size. We use a nonsmooth trust‐region bundle method to compute arbitrarily structured locally optimal H_∞‐controllers for a frequency‐sampled approximation of the underlying infinite‐dimensional H_∞‐problem in such a way that (i) exponential stability in closed loop is guaranteed and that (ii) the optimal H_∞‐value of the approximation differs from the true infinite‐dimensional value only by a prior user‐specified tolerance. We demonstrate the versatility and practicality of our method on a variety of infinite‐dimensional H_∞‐synthesis problems, including distributed and boundary control of partial differential equations, control of dead‐time and delay systems, and using a rich testing set.     

Parallel divide‐and‐conquer scheme for 2D Delaunay triangulation

This work describes a parallel divide‐and‐conquer Delaunay triangulation scheme. This algorithm finds the affected zone, which covers the triangulation and may be modified when two sub‐block triangulations are merged. Finding the affected zone can reduce the amount of data required to be transmitted between processors. The time complexity of the divide‐and‐conquer scheme remains O(n log n), and the affected region can be located in O(n) time steps, where n denotes the number of points. The code was implemented with C, FORTRAN and MPI, making it portable to many computer systems. Experimental results on an IBM SP2 show that a parallel efficiency of 44–95% for general distributions can be attained on a 16‐node distributed memory system. Copyright © 2006 John Wiley & Sons, Ltd.     

Use of self‐erase discharges for high‐speed and low‐voltage addressing of PDPs

Abstract— A technique called “self‐erase‐discharge addressing” has been incorporated with a address‐while‐display driving scheme, contiguous subfield, and erase addressing to obtain high‐speed and low‐voltage addressing of PDPs. The technique uses a relatively high X‐sustain pulse voltage VXsus, which produces a weak self‐erase discharge at its trailing edge. An application of a data pulse Vdata synchronous to a weak self‐erase discharge results in full erase discharge and eliminates all the wall charges. The technique assures a wider operating‐voltage margin since it provides identical amounts of priming charges as well as wall charges to all the horizontal scan lines just prior to addressing. The priming charges are generated by the weak self‐erase discharges, resulting in low Vdata of 30 V and a high addressing speed of 0.66 μsec for a Ne + 10% Xe PDP. V_Xsus = 245 V, and the voltage margins of Vdata and VXsus were 35 and 16 V, respectively. For a 30% Xe PDP, Vdata and VXsus were 30 and 335 V, respectively, with an addressing speed of 1.0 μsec. In order to obtain high dark‐room contrast, it is essential to use ramp reset pulses, with which erase addressing cannot be achieved. By adopting the write addressing only to the first subfield and the self‐erase‐discharge addressing to the subsequent subfields, a peak and background luminance in green of 3100 and 0.22 cd/m², respectively, were obtained with a dark‐room contrast of 14,000:1. The number of subfields was 28, and the light emission duty was 83%. The number of ramp reset pulse drivers could be reduced to 12 by adopting the common reset pulse technique.     

Solution‐processable double‐layered ionic p‐i‐n organic light‐emitting diodes

Abstract— Solution‐processed double‐layered ionic p‐i‐n organic light‐emitting diodes (OLEDs), comprised of an emitting material layer doped with an organometallic green phosphor and a photo‐cross‐linked hole‐transporting layer doped with photo‐initiator is reported. The fabricated OLEDs were annealed using simultaneous thermal and electrical treatments to form a double‐layered ionic p‐i‐n structure. As a result, an annealed double‐layered OLED with a peak brightness over 20,000 cd/m² (20 V, 390 mA/cm²) and a peak efficiency of 15 cd/A (6 V, 210 cd/m²) was achieved.