A small‐area and low‐power data driver IC using two‐stage DAC with a capacitor array for active matrix flat‐panel displays

A small‐area and low‐power data driver integrated circuit (IC) using a two‐stage digital‐to‐analog converter (DAC) with a capacitor array is proposed for active matrix flat‐panel displays. The proposed data driver IC employs a capacitor array in the two‐stage DAC so as to reduce the DAC area and eliminate the need for a resistor string, which has high‐power consumption. To verify the proposed two‐stage DAC, a 20‐channel data driver IC with the proposed 10‐bit two‐stage DAC was fabricated using a 0.18‐μm complementary metal–oxide–semiconductor process with 1.8 and 6 V complementary metal–oxide–semiconductor devices. The proposed 10‐bit two‐stage DAC occupies only 43.8% of the area of a conventional 10‐bit two‐stage DAC. The measurement results show that the differential nonlinearity and integral nonlinearity are +0.58/?0.52 least significant bit and +0.62/?0.59 least significant bit, respectively. The measured interchannel deviation of the voltage outputs is 8.8 mV, and the measured power consumption of the 20‐channel data driver IC is reduced to 7.1 mW, which is less than half of the power consumed by the conventional one.     

Digital time‐modulation pixel memory circuit in LTPS technology

Abstract— A digital time‐modulation pixel memory circuit on glass substrate has been designed and verified for a 3‐μm low‐temperature polysilicon (LTPS) technology. From the experimental results, the proposed circuit can generate 4‐bit digital codes and the corresponding inversion data with a time‐modulation technique. While the liquid‐crystal‐display (LCD) panel operates in the still mode, which means the same image is displayed on the panel, a data driver for an LCD panel is not required to provide the image data of the frame by the proposed pixel memory circuit. This pixel memory circuit can store the frame data and generate its corresponding inversion data to refresh a static image without activating the data driver circuit. Therefore, the power consumption of a data driver can be reduced in the LCD panel.     

High refresh rate and low power consumption AMOLED panel using top‐gate n‐oxide and p‐LTPS TFTs

A pixel circuit and a gate driver on array for light‐emitting display are presented. By simultaneously utilizing top‐gate n‐type oxide and p‐type low‐temperature polycrystalline silicon (LTPS) thin‐film transistors (TFTs), the circuits provide high refresh rate and low power consumption. An active‐matrix LED (AMOLED) panel with proposed circuits is fabricated, and driving at various refresh rate ranging from 1 to 120 Hz could be achieved.     

Low‐power and small‐area holding latch with level‐shifting function using LTPS TFTs for mobile applications

Abstract— A holding latch having a level shifting function fabricated by using a low‐temperature polysilicon (LTPS) process with a 5‐μm design rule on a glass backplane for power and cost effectiveness has been proposed. The layout area and the power consumption of the proposed circuit are reduced by 10% and 52%, respectively, compared with those of a typical structure which combines a static D‐latch and a cross‐coupled level shifter for a 2.2‐in. qVGA TFT‐LCD panel.     

Low‐temperature poly‐Si TFT‐LCD with an integrated analog circuit

We have developed a 6‐bit D/A converter and amplifier integrated low‐temperature poly‐Si TFT‐LCD in which an integrated signal‐line driver is driven by a 5‐V power supply. We have employed a D/A converter including a new capacitor array and an original amplifier comprised of serially connected comparators to achieve high accuracy. The D/A converter performs gamma correction using upper significant bits of input data. Control signals for these circuits were generated by the integrated timing circuit. These advances in integration have been achieved for the first time using 3‐μm design rule and improved LTPS TFT technologies and provide an advanced display system with lower power consumption, smaller module size, and higher durability.     

A novel pixel memory using integrated voltage‐loss‐compensation (VLC) circuit for ultra‐low‐power TFT‐LCDs

Abstract— A novel pixel memory using an integrated voltage‐loss‐compensation (VLC) circuit has been proposed for ultra‐low‐power TFT‐LCDs, which can increase the number of gray‐scale levels for a single subpixel using an analog voltage gray‐scale technique. The new pixel with a VLC circuit is integrated under a small reflective electrode in a high‐transmissive aperture‐ratio (39%) 3.17‐in. HVGA transflective panel by using a standard low‐temperature‐polysilicon process based on 1.5‐μm rules. No additional process steps are required. The VLC circuit in each pixel enables simultaneous refresh with a very small change in voltage, resulting in a two‐orders‐of‐magnitude reduction in circuit power for a 64‐color image display. The advanced transflective TFT‐LCD using the newly proposed pixel can display high‐quality multi‐color images anytime and anywhere, due to its low power consumption and good outdoor readability.     

A novel low‐power gate driver architecture for large 8 K 120 Hz liquid crystal display employing IGZO technology

A novel low‐power gate driver architecture was developed for large 8 K 120 Hz liquid crystal display panel. For this application, not only high‐speed driving but also low power consumption is required. We employed a high mobility In‐Ga‐Zn‐O, dual V_GL level driving method, and gate driver circuit driven by DC supply. The simulation results show that our proposals meet 8 K 120 Hz driving requirements. Also, we have fabricated a prototype panel and confirmed both high‐speed driving and low power consumption.     

A novel low‐power‐consumption all‐digital system‐on‐glass display with serial interface

Abstract— A new conceptual ultra‐compact LCD panel, which features a simple interface and lower‐power consumption by using low‐temperature polysilicon thin‐film transistor (LTPS‐TFT) technology has been developed. This panel is capable of switching operation modes based on an input command, and all the data are directly communicated with the circuit inside the panel through a Serial Peripheral Interface (SPI) protocol. The integration of the serial‐data‐receiver function on glass substrate has enabled the achievement of a significant reduction in the number of interface pins. Moreover, a low power consumption of 15 μW for a 2.26‐in. reflective LCD panel in combination with the technique of integrating a memory circuit in each pixel has been achieved.     

Digital‐to‐analog converter with gamma correction on glass substrate for TFT‐panel applications

Abstract— Low‐temperature polysilicon (LTPS) technology has a tendency towards integrating all circuits on glass substrate. However, the poly‐Si TFTs suffered poor uniformity with large variations in the device characteristics due to a narrow laser process window for producing large‐grained poly‐Si TFTs. The device variation is a serious problem for circuit realization on the LCD panel, so how to design reliable on‐panel circuits is a challenge for system‐on‐panel (SOP) applications. In this work, a 6‐bit R‐string digital‐to‐analog converter (DAC) with gamma correction on glass substrate for TFT‐panel applications is proposed. The proposed circuit, which is composed of a folded R‐string circuit, a segmented digital decoder, and reordering of the decoding circuit, has been designed and fabricated in a 3‐μm LTPS technology. The area of the new proposed DAC circuit is effectively reduced to about one‐sixth compared to that of the conventional circuit for the same LTPS process.     

A 1.4‐Gbps intra‐panel interface with low‐power and low‐EMI schemes for Tablet PC applications

An intra‐panel interface addressing all of the high‐speed, low‐power, and low‐electromagnetic interference (EMI) requirements for tablet personal computer applications is presented. This work proposes an adaptive clock window scheme to achieve 1.4‐Gbps data‐rate. For EMI suppression, data scrambling, horizontal blank period pattern scrambling, and novel clock and data recovery circuit are introduced. Lastly, for power‐saving, the proposed interface dynamically biases source driver's output buffers and employs early charge sharing by controlling the configuration data. For verification, a WQXGA thin‐film transistor liquid crystal display system is implemented with the timing controller and source driver ICs that are fabricated using 65‐nm and 180‐nm complementary metal‐oxide semiconductor (CMOS) processes, respectively. The liquid crystal display system demonstrates maximum operation speed of 1.4 Gbps and suppression of EMI noise in LTE Band‐20 and GSM 850 bands. The proposed power‐saving schemes achieve 4.3% reduction in total power consumption by source driver IC, which reaches about 85% of power consumption by enhanced reduced‐voltage differential signaling interface circuit.     

FPC‐free LCD panel with capacitive coupling for transmission of signals and power

Abstract— A flexible‐printed‐cable (FPC) free liquid‐crystal‐display (LCD) panel by using a capacitive‐coupling technique has been developed. A QQVGAeight‐color image was successfully displayed for the first time without attaching any signal or power cables to the panel. The receiving circuitry and capacitive‐coupling electrodes were integrated on the LCD panel using a low‐temperature polysilicon (LTPS) fabrication process. In the proposed digital coding method, the receiving circuit converts derivative waveform signals via the capacitive coupling to conventional logic‐level signals. The maximum data rate of 2.4‐Mbps × 3ch (RGB) was achieved. In addition, LTPS low‐capacitance diode bridge and regulator enabled us to obtain stable DC power of 2.4 mW on the panel from the AC‐power signal. This study is the first step towards integrating the wireless‐communication function on the display panel to achieve a high‐value‐added flat‐panel display (FPD).     

Robust integrated shift register circuit over clock noises for in‐cell touch applications

This paper proposes an integrated shift register circuit for an in‐cell touch panel that is robust over clock noises. It is composed of 10 thin film transistors and 1 capacitor, and the time division driving method is adopted to prevent the negative effect of display signals on the touch sensing. Two pre‐charging nodes are employed for reducing the uniformity degradation of gate pulses over time. In particular, the proposed circuit connects a drain of the first pre‐charging node's pull‐up thin film transistor (TFT) to the positive supply voltage instead of clock signals. This facilitates to lower coupling noises as well as to clock power consumption. The simulation program with an integrated circuit emphasis is conducted for the proposed circuit with low temperature poly‐silicon TFTs. The positive threshold voltage that shifts up to 12 V at the first pre‐charging pull‐up TFT can be compensated for without the uniformity degradation of gate pulses. For a 60‐Hz full‐HD display with a 120‐Hz reporting rate of touches, the clock power consumption of the proposed gate driver circuit is estimated as 7.13 mW with 160 stages of shift registers. In addition, the noise level at the first pre‐charging node is lowered to ?28.95 dB compared with 2.37 dB of the previous circuit.     

Integrated a‐Si TFT row driver circuits for high‐resolution applications

Abstract— A 12.1‐in. tablet liquid‐crystal‐display (LCD) panel with integrated amorphous‐silicon row driver circuits has been developed using a standard TFT process and Advanced Fringe‐Field Switching (AFFS) technology. An XGA‐resolution 768‐stage shift‐register circuit with two‐phase clocks has been designed and fabricated. The circuit parameters were optimized in order to obtain a highly reliable a‐Si row‐driver‐circuit structure. Thermal Humidity Operation (THO) test results at 50°C and 80% humidity during 500 hours of operation shows that the fabricated panel is reliable during long‐term operation and any abnormal display phenomenon was not observed at 0°C.     

Clamped‐inverter circuit architecture for luminescent‐period‐control driving of active‐matrix OLED displays

Abstract— An innovative pixel‐driving technology for high‐performance active‐matrix OLED flat‐panel displays is described. Called “clamped‐inverter circuit architecture,” it uses luminescent‐period‐control driving to reduce the inter‐pixel non‐uniformity caused by the device‐to‐device variability of low‐temperature poly‐Si TFTs. A prototype full‐color display shows a luminous deviation of less than 1.6%, which corresponds to only the LSB‐error in 6‐bit gray‐scale.     

TFT‐LCD driver IC with embedded non‐volatile memory for portable applications

Abstract— To improve the display quality and yield of the TFT‐LCD driver IC, non‐volatile multiple‐time‐programmable (MTP) memory, which consists of an EEPROM cell and our proposed sense amplifier and power control circuit (SP), was integrated into a TFT‐LCD driver IC. The proposed SP has a 30% smaller layout area and a 18% faster response time compared to that of the conventional SP. The proposed SP also has lower power consumption because it does not use a static current. The TFT‐LCD quality was also improved by tuning the characteristics of the driver IC and the panel with the VREF, OSC, and VCOM blocks, using non‐volatile MTP memory. When the display quality improved, the yield also improved, along with a reduction in the failure ratio of the display module, which consists of the driver IC and the panel. As a result, the TFT‐LCD driver IC with the non‐volatile MTP memory demonstrated improved display quality and a higher yield compared to conventional driver ICs without such a memory.     

An integrated poly‐Si TFT current data driver with a data‐line pre‐charge function

Abstract— We have developed an integrated poly‐Si TFT current data driver with a data‐line pre‐charge function for active‐matrix organic light‐emitting diode (AMOLED) displays. The current data driver is capable of outputting highly accurate (±0.8%) current determined by 6‐bit digital input data. A novel current‐programming approach employing a data‐line pre‐charge function helps achieve accurate current programming at low brightness. A 1.9‐in. 120 × 136‐pixel AMOLED display using these circuits was demonstrated.     

Peripheral circuit designs using low‐temperature p‐type poly‐Si thin‐film transistors

Abstract— P‐type low‐temperature (450°C) polycrystalline‐silicon thin‐film‐transistor circuits for peripheral driver integration in active‐matrix displays are proposed and verified. A low‐voltage (5 V) driven poly‐Si scan driver is designed by employing a level shifter and shift register. A source driver for six‐bit digital interface is proposed, and the building blocks such as latch, DAC, and analog buffer are described. The latch samples and holds the digital bits (D and D') without an output voltage loss. A new source‐follower type analog buffer is developed and exhibits a small offset deviation regardless of the V_TH variation of the buffer TFT. The simulation and measurement results ensure that the proposed circuits were successfully designed for p‐type panel integration.     

LTPS circuit integration for system‐on‐glass LCDs

Abstract— A 3.5‐in. QVGA‐formatted driving‐circuit fully integrated LCD has been developed using low‐temperature poly‐Si (LTPS) technology. This display module, in which no external ICs are required, integrates all the driving circuits for a six‐bit RGB digital interface with an LTPS device called a “FASt LDD TFT” and achieves a high‐quality image, narrow frame width, and low power consumption. The LTPS process, device, and circuit technologies developed for system‐on‐glass LCD discussed. The development phase of LTPS circuit integration for system‐on‐glass LCDs is also reviewed.     

Novel analog feedback current programming architecture compatible with 2‐transistor 1‐capacitor pixel for active matrix organic light‐emitting diode displays

A new feedback current programming architecture is described, which is compatible with active matrix organic light‐emitting diode (AMOLED) displays having the 2T1C pixel structure. The new pixel programming approach is compatible with all TFT technologies and can compensate for non‐uniformities in both threshold voltage and carrier mobility of the pixel OLED drive TFT. Based on circuit simulations, a pixel drive current of less than 10 nA can be programmed in less than 50 µ. This new approach can be implemented within an AMOLED external or integrated display data driver.     

Fully‐integrated active matrix programmable UV and blue micro‐LED display system‐on‐panel (SoP)

High pixel per inch and high‐resolution micro‐LED displays are attracting more and more attentions. The increasing pixel number requires a large amount of bonding pads and brings huge difficulties to micro‐LED system design and lowers power efficiency as well. It is urgent to integrate row and column driving circuits onto the micro‐LED panel. Here, we report a fully integrated active matrix programmable micro‐LED system on panel (SoP) with ultraviolet and blue emission wavelengths. The micro‐LED SoP has a resolution of 60 × 60 and pixel pitch of 70 μm. The micro‐LED SoP was achieved by integrating micro‐LED arrays with silicon‐based p‐channel metal‐oxide semiconductor driving panel using fine‐toned flip‐chip bonding technology. With fully integrated scan and data circuits, the number of bonding pads was greatly reduced from 136 to 28, and large amount of metal interconnection lines were saved. The micro‐LED SoP panel was mounted on a periphery driving board, and representative characters were displayed successfully.