Multiwavelength InGaAs/InGaAsP strained-layer MQW-laser array usingshadow-masked growth

A simple technique for fabricating multiwavelength laser arrays is presented. The lateral variations in bandgap (or emission wavelength) between the different lasers are obtained by the use of shadow-masked growth. The shadow masked growth results in variations in thickness (and to a lesser extent, in composition) over the substrate. In combination with a multiquantum well (MQW) active region, this gives the required bandgap variations. By varying the window width in the shadow mask between 10 μm and >500 μm it was possible to obtain a wavelength span of 130 nm centered around 1.55 μm. The strained-layer-ridge MQW Fabry-Perot lasers showed a constant threshold current (around 70 mA for an 11-μm×500-μm stripe)     

Side-emitting GaAs/AlGaAs SQW LEDs showing wide spectrum using shadow masked growth

Side-emitting LEDs are proposed showing a wide optical spectrum. The LEDs were fabricated using a special growth technique called shadow masked growth (SMG). The width of the window in the shadow mask was gradually changed along the LED stripe direction and therefore resulted in a continuous variation of the layer thickness. The combination with a quantum well active region results in a continuous variation in bandgap and emission wavelength. These different spectra add up at one side of the LED offering a broad spectrum. By decreasing the width of the window, starting from 100 mu m, GaAs/AlGaAs GRINSCH SQW LEDs have been realised with spectral widths up to 63 nm and very small spectral ripple.<>     

Compositional nonuniformities and strain relaxation at misoriented InxGa(1−x)As/GaAs interfaces

Compositional nonuniforimities and misfit dislocations are observed near misoriented In_0.2Ga_0.8As/GaAs interfaces. The compositional nonuniformities results from In interdiffusion at the interface over a distance of 3 nm and formation of InAs platelet precipitates. The misfit dislocations are of pure edge and 60° types. The core of pure edge misfit dislocations generally consists of two 60° dislocations separated by approximately 2.5 nm. One of these 60° dislocations is usually split into partials and decorated by platelets of InAs. The interface and surface morphologies are strongly influenced by the substrate tilt away from exact [001] crystallographic orientation.     

Properties of a poly-Si/GaAs layered structure on Si for Si heterojunction bipolar transistor

The properties of poly-Si/GaAs layered films on Si for use in wide bandgap emitters for Si heterojunction bipolar transistors (Si-HBTs), were studied. A smooth GaAs film surface grown on Si was obtained at low temperature (200° C) from the initial stage of growth. The x-ray diffraction (XRD) results indicated that strong GaAs orientation (111) was obtained for the poly-Si/GaAs/Si-substrate layered structure after annealing at 800° C for 20 sec. Secondary ion mass spectroscopy (SIMS) profiles indicated that impurity diffusion from the GaAs layer into the p-type Si substrate was negligible at 800° C. The electrical characteristics forn-poly-Si/n-GaAs/p-Si-substrate heterojunction diodes were also investigated.     

Selected-area GaAs epitaxial growth on Si free from detrimental sidewall interactions

The growth of GaAs on patterned Si trenches is essential for the realization of planarized monolithic co-integration of GaAs and Si devices. The patterned boundary regions also provide lateral sinks for stresses and defect propagation so long as the undesirable sidewall growth interactions are suppressed. In this study, we developed a cantilever patterning mask structure, with feature sizes ranging from 1.5 to 100 μm using overhung SiO₂ masks sitting on top of 3-μm-tall undercutting poly-Si patterns. The Si growth surface is protected and unetched. Patterned molecular beam epitaxial (MBE) grown GaAs layers are then prepared with complete elimination of sidewall interactions. Cross-sectional transmission electron microscopy (XTEM) results show there are reduced-defect areas in the regions 2 to 3 μm from the pattern edges compared to blanket grown areas. Combining the near-edge defect-reduction feature with other defect-reduction schemes incorporated during growth, patterned GaAs with sizes of 10 μm or under exhibits significant material quality improvements compared to blanket layer growth under the same conditions.     

利用反应离子刻蚀实现GaAs晶片通孔工艺

贯穿晶片的背面通孔已成为ＧａＡｓＭＭＩＣ和功率ＭＥＳＦＥＴ的有效接地方式。本文介绍了利用Ｃｌ２／ＳｉＣｌ４作为反应气体，以正性光刻胶为掩模的反应离子刻蚀背孔工艺。利用该工艺刻蚀出的深孔具有倾斜的剖面和光滑的侧壁，孔的横向侧蚀小，在５０ｍｍＧａＡｓ圆片上获得了良好的均匀性和重复性。     

A micromachined, shadow-mask technology for the OMVPE fabrication of integrated optical structures

A micromachined, silicon shadow-mask technology is described which extends the capabilities of shadow-masked OMVPE for the fabrication of nonplanar micro-optical elements. The deep reactive ion etched (DRIE) shadow mask is inexpensive, reusable and produces smooth, nonplanar structures with precise control of position, shape and size. Direct fusion bonding of the mask to the substrate was found to be a reliable and reproducible method for attaching the mask to the substrate during growth. The DRIE shadow mask technology allows the deposition of microlenses with focal lengths out to 3 mm without the central flattening that was previously observed in shadow masked lenses grown under the epitaxial mask. We also describe novel applications of this technology in the fabrication of micromirrors and concentrically-variable Bragg reflectors, which should improve mode discrimination in large aperture VCSELs.     

Crystallographic orientation dependence of the growth rate for GaAs low pressure organometallic vapor phase epitaxy

The complete crystallographic orientation dependence of the growth rate for GaAs low pressure organometallic vapor phase epitaxy (LPOMVPE) is determined using a previously described semi-empirical model. A set of LPOMVPE growth rate polar diagrams is presented for reactor temperatures near 550°C as well as near 700°C. Also, the variation of the growth rate polar diagrams as a function of process variables is given. The experimental data utilized in the semiempirical model was attained using a typical horizontal reactor LPOMVPE system and typical LPOMVPE process parameters.     

Selective area epitaxy of GaAs using tri-isopropylgallium

We have studied the selective area epitaxy of GaAs by chemical beam epitaxy, using tri-isopropylgallium as the Ga source. The results show that GaAs can be selectively grown at a rate of up to ∼0.36 μm/h on patterned GaAs substrates at temperatures as low as 380°C. A low selective growth temperature allows us to utilize deep-ultraviolet radiation to modify the GaAs surface oxides for use as the masking material. We found that excess AsH₃ over-pressure degrades the selectivity significantly, and the maximum selective growth thickness is limited by a critical total adatom coverage on the mask. In addition, the low selective growth temperature does not result in a very high C background concentration. Initial Hall measurements indicate that unintentional C doping levels are at least two orders of magnitude lower than those in GaAs layers grown under comparable conditions using trimethylgallium.     

Process parameter dependence of impurity-free interdiffusion in GaAs/AlxGa1−xAs and InxGa1−yAs/GaAs multiple quantum wells

The dependence of the impurity-free interdiffusion process on the properties of the dielectric cap layer has been studied, for both unstrained GaAs/Al_xGa_1−xAs and pseudomorphic In_y Ga_1−yAs/GaAs MQW structures grown by molecular beam epitaxy. The influence of the cap layer thickness, composition, and deposition technique on the degree of interdiffusion were all systematically investigated. Electron-beam evaporated SiO₂ films of varying thickness, chemical-vapor-deposited SiO_xN_y films of varying composition, and spin-on SiO₂ films were used as cap layers during rapid thermal annealing (850-950°C). Photoluminescence at 10K has been employed to determine the interdiffusioninduced bandgap shifts and to calculate the corresponding Al-Ga and In-Ga interdiffusion coefficients. The latter were found to increase with the cap layer thickness (e-beam SiO₂) up to a limit determined by saturation of the outdiffused Ga concentration in the SiO₂ caps. A maximum concentration of [Ga] = 4–7 ×10¹⁹ cm⁻³ in the SiO₂ caps was determined using secondary ion mass spectroscopy profiling. Larger band-edge shifts are also obtained when the oxygen content of SiO_xN_y cap layers is increased, although the differences are not sufficiently large for a laterally selective interdiffusion process based on variations in cap layer composition alone. Much larger differences are obtained by using different deposition techniques for the cap layers, indicating that the porosity of the cap layer is a much more important parameter than the film composition for the realization of a laterally selective interdiffusion process. For the calculated In_0.2Ga_0.8As/GaAs interdiffusion coefficients, activation energies E_A and prefactors D_o were estimated to ranging from 3.04 to 4.74 eV and 5 × Kh⁻³ to 2 × 10⁵ cm²/s, respectively, dependent on the cap layer deposition technique and the depth of the MQW from the sample surface.     

1.3 μm lasers on GaAs(111)B employing ordered (InAs)1(GaAs)1 quantum wells for high frequency response applications

We propose a novel laser active region design that employs a strained and ordered ([nAs)₁(GaAs)₁ quantum well on a GaAs(111)B substrate for 1.31 μm high-speed applications. The increased Matthevvs-Blakeslee critical thickness for this orientation as compared to the (001) case allows for wider wells with higher indium compositions. In the In_0.5Ga_4.5As case, however, the bandgap is not significantly affected by the reduced quantum confinement because an increase in the hydrostatic strain component of the Hamiltonian for the (111)-orientation approximately negates any narrowing effects. By using an alternate monolayer superlattice active region to replace the alloy, we find that wavelengths well beyond 1.3 μm can be achieved. We also discuss some of the adBANtages of moving to the (111)-orientation that indicate higher modulation bandwidths are possible using this material system over conventional 1.3 μm laser diodes on InP substrates.     

Effects of GaAs buffer layer and lattice-matching on deep levels in Zn(S)Se/GaAs heterostructures

The effects of GaAs buffer layer and lattice-matching on the nature of deep levels involved in Zn(S)Se/GaAs heterostructures are investigated by means of deeplevel transient spectroscopy (DLTS). The heterojunction diodes (HDs) where nZn(S)Se is grown on p⁺-GaAs by metalorganic vapor phase epitaxy are used as a test structure. The DLTS measurement reveals that when ZnSe is directly grown on a GaAs substrate, there exist five electron traps A-E at activation energies of 0.20, 0.23, 0.25, 0.37, and 0.53 eV, respectively. Either GaAs buffer layer and lattice-matching may reduce the incorporation of traps C, D, and E, implying that these traps are ascribed to surface treatment of GaAs substrate and to lattice relaxation. Concentration of trap B, which is the most dominant level, is proportional to the donor concentration. However, in the ZnSSe/GaAs sub. HD, another trap level, instead of trap B, locates at the almost same position as that of trap B, and it shows anomalous behavior that the DLTS peak amplitude changes drastically as changing the rate windows. This is explained by the defect generation through the interaction between sulfide and a GaAs substrate surface. For the trap A, the concentration is a function of donor concentration and lattice mismatch, and the origin is attributed to a complex of donor induced defects and dislocations.     

GaAs的CH_4／H_2反应离子腐蚀研究

在前研究ＩｎＰ的ＣＨ４／Ｈ２反应离子腐蚀的基础上，进行了ＧａＡｓ的ＣＨ４／Ｈ２反应离子腐蚀研究。ＧａＡｓ的腐蚀速率比ＩｎＰ慢，随ＣＨ４／Ｈ２组份之比值、工作压强、总流量率等而改变，从２ｎｍ／ｍｉｎ到８ｎｍ／ｍｉｎ。当总流量率为３０～１２３ｓｃｃｍ之间、ＣＨ４／Ｈ２＝０．１８，腐蚀后的表面总是光亮平滑的，损伤层的厚度≥３０ｎｍ。当用ＣＨ４／Ｈ２ＲＩＥ在ＣａＡｓ上制作深度＞０．６μｍ的结构时，必须要考虑高能离子的轰击给晶体造成的损伤和给光刻胶掩模造成的浸蚀，此时光刻胶作掩模已经不能满足要求，应改用介质薄膜。     

LP-MOCVD grown (lnAs)m(GaAs)m short period superlattices on InP

(InAs)_m(GaAs)_m (1 ≤ m ≤ 12) short period superlattices (SPSs) have been grown on semi-insulated InP substrates with a 200 nm InP cap layer using low pressure metalorganic chemical vapor deposition (MOCVD). According to double crystal x-ray diffraction and transmission electron microscopy results, the critical layer thickness of (InAs)_m(GaAs)_m SPS was observed to be ～30Å (m = 5). For the SPS below the critical layer thickness, mirror-like surface morphology was found without defects, and strong intensity Fourier transformed photoluminescence (FT-PL) spectra were also obtained at room temperature. The SPS with m = 4 showed a drastic improvement in photoluminescence intensity of order of two compared to an InGaAs ternary layer. However, the SPS with a large value of m (m ≥ 6), rough surface was observed with defects, with broad and weak FT-PL spectra. The surface morphology of SPS was greatly affected by the substrate orientation. The SPS with m = 5 was grown on two degree tilted substrate from (100) direction and showed poor surface morphology as compared to the one grown on (100) exact substrate Moreover, the SPS grown on a (111)B substrate showed a rough triangular pattern with Nomarski optical microscopy. In-situ thermal annealed SPS with m = 4 showed a 18 meV increase in PL peak energy compared to the as-grown sample due to phase separation resulting from thermal interdiffusion.     

IntegratedIn Situ wafer and system monitoring for the growth of CdTe/ZnTe/GaAs/Si for mercury cadmium telluride epitaxy

Reproducible improvements in the metalorganic vapor phase epitaxy (MOVPE) grown CdTe buffer quality have been demonstrated in a horizontal rectangular duct silica reactor by the use of integratedin situ monitoring that includes laser reflectometry, pyrometry, and Epison concentration monitoring. Specular He-Ne laser reflectance was used toin situ monitor the growth rates, layer thickness, and morphology for both ZnTe and CdTe. The substrate surface temperature was monitored using a pyrometer which was sensitive to the 2–2.6 μm waveband and accurate to ±1°C. The group II and group VI precursor concentrations entering the reactor cell were measured simultaneously using two Epison ultrasonic monitors and significant variations were observed with time, in particular for DIPTe. The surface morphology and growth rates were studied as a function of VI/II ratio for temperatures between 380 and 460°C. The background morphology was the smoothest for VI/IIratio in the vicinity of 1.5–1.75 and could be maintained using Epison monitors. Regularly shaped morphological defects were found to be associated with morphological defects in the GaAs/Si substrate. The x-ray rocking curve widths for CuK_α (531) reflections were in the range of 2.3–3.6 arc-min, with no clear trend with changing VI/II ratio. X-ray topography images of CdTe buffer layers on GaAs/Si showed a mosaic structure that is similar to CdTe/sapphire substrates. The etch pit density in Hg_1-xCd_xTe layers grown onto improved buffer layers was as low as 6 x 10⁶ cm^-2 for low temperature MOVPE growth using the interdiffused multilayer process.     

Sputtered dielectric films for GaAs diffusion masks

We have explored the use of sputtered dielectrics, rather than the more conventional thermal or plasma enhanced chemical vapor deposition films, as masks for localized zinc diffusion into GaAs. The masks employed in this study were films of Si0₂, Si₃N₄, and A1₂O₃, and part of the routine characterization included measurement of the mechanical stress within the films. Zinc diffusion was carried out for 60 min at 600° C in a “leaky tube” diffusion furnace. In short, it was found that (1) the alumina films did not work as diffusion masks, (2) the build-in stress within the SiO₂ and Si₃N₄ films was dependent upon the thickness of the film (increasing with thickness for SiO₂, and diminishing with thickness for Si₃N₄), and (3) the lateral diffusion of the zinc underneath the mask increased with the stress content of the film, regardless of the mask composition.     

(111)B-oriented AlAs/GaAs/AIAs double barrier resonant tunneling devices grown in a gas source molecular beam epitaxy system

We have studied the growth of (lll)B-oriented AlAs/GaAs/AIAs double barrier resonant tunneling structures in a gas source molecular beam epitaxy system. We investigate the current peak-to-valley ratios of the resonant tunneling structures grown on (lll)B GaAs substrates under the various growth conditions, such as III/V flux ratios, substrate temperature, growth interruption at the heterointerfaces, buffer or contact layers, etc. We demonstrate that, in contrast to previous reports, high quality heterostructures can be grown in a gas source system if certainIII/V flux ratio, substrate temperature, and misoriented substrate are used. We show that the As/Ga flux ratio plays the key role for the growth on the misoriented ( 111 )B GaAs substrate, and growth at extremely high temperatures is not beneficial to the negative differential resistance. We also show that, although inserting a growth interruption in the buffer layer is believed to be helpful to the surface morphology, it is detrimental to the current peak-to-valley ratio.     

快速率生长MBE InAs/GaAs(001)量子点

用快速率(1.0ML/s)生长MBE InAs/GaAs(001)量子点。原子力显微镜观察结果表明,在量子点体系形成的较早阶段,量子点密度N(θ)随InAs沉积量θ的变化符合自然指数形式N(θ)∝ek(θ-θc),这与以前在慢速生长(≤0.1ML/s)条件下出现的标度规律N(θ)∝(θ-θc)α明显不同。另外,在N(θ)随θ增加的过程中,快速率生长量子点的高度分布没有经历量子点平均高度随沉积量θ逐渐增加的过程。这些实验观察说明,以原子在生长表面作扩散运动为基础的生长动力学理论至少是不全面的,不适用于解释InAs量子点的形成。这些观察和讨论说明,即使在1.0ML/s的快速率生长条件下,量子点密度也可以通过InAs沉积量有效地控制在1.0×108cm-2以下,实现低密度InAs量子点体系的制备。     

Large area depositon of Cd1-xZnxTe on GaAs and Si substrates by metalorganic chemical vapor deposition

Results of large-area (up to 1000 cm²/run) Cd_1-xZn_xTe heteroepitaxy on both GaAs and GaAs/Si substrates by metalorganic chemical vapor deposition (MOCVD) are presented. Cd_1-xZn_xTe (x = 0-0.1) films exhibited specular surface morphology, 1% thickness uniformity (standard deviation), and compositional uniformity (Δx) of ±0.002 over 100 mm diam substrates. For selected substrate orientations and deposition conditions, the only planar defects exhibited by (lll)B Cd_1-xZn_xTe/GaAs/Si films were lamella twins parallel to the CdTe/GaAs interface; these do not propagate through either the Cd_1-xZn_xTe layer or subsequently deposited liquid phase epitaxy (LPE) HgCdTe layer(s). Background Ga and As-impurity levels for Cd_1-xZn_xTe on GaAs/Si substrates were below the secondary ion mass spectroscopy detection limit. Preliminary results of HgCdTe liquid phase epitaxy using a Te-rich melt on Si-based substrates resulted in x-ray rocking curve linewidths as narrow as 72 arc-sec and etch-pit densities in the range 1 to 3 x 10⁶ cm².     

Comparison of GaAs grown on standard Si (511) and compliant SOI (511)

Gallium arsenide (GaAs) films were grown by molecular beam epitaxy (MBE) on a (511) silicon substrate and a compliant (511) silicon-on-insulator (SOI) substrate. The top silicon layer of the compliant (511) SOI was thinned to ～1000 Å. The five inch diameter SOI wafer was created by wafer bonding. The GaAs (004) x-ray diffraction (XRD) reflection showed a 25% reduction in the full width half maximum (FWHM) for GaAs on a compliant (511) SOI as compared to GaAs on a silicon substrate. Cross section transmission electron microscopy (XTEM) clearly indicates a different dislocation structure for the two substrates. The threading dislocation density is reduced by at least an order of magnitude in the compliant (511) SOI as compared to the (511) silicon. XTEM found dislocations and damage was generated in the top silicon layer of the compliant SOI substrate after GaAs growth.