InGaAs(InAlAs)/InP和InP/InAlAs湿法选择腐蚀研究

介绍了两种选择腐蚀液对InGaAs(InAlAs)I/nP和InPI/nAlAs异质结构材料选择腐蚀的实验结果,重点介绍在InAlAs上面生长InP的湿法选择腐蚀,用HClH∶3PO4C∶H3COOH系列腐蚀液,InPI/nAlAs选择比大于300。InPI/nAlAs湿法选择腐蚀的结果可以很好应用到OEIC芯片制作中,并取得了较好的器件及电路结果。     

InP基一镜斜置三镜腔型光电探测器理论分析及实验研究

介绍了一种新型长波长InP基一镜斜置三镜腔型（OMITMiC）光电探测器，并对其进行了数值模拟。介绍了该光电探测器的两项关键制备工艺。首先，利用动态掩膜湿法腐蚀技术，通过调节HCl：HF：CrO3腐蚀溶液的选择比。在与InP晶格匹配的In0.72Ga0.28As0.6P0.4外延层上制备出了不同倾角的楔形结构。其次，利用选择性湿法腐蚀技术，通过FeCl3；H2O溶液对In0.53Ga0.47As牺牲层的腐蚀，制备出了具有InP／空气隙的高反射率分布式布拉格反射镜（DBR）。     

刻蚀腔InGaAsP/InP双异质结激光器的制作与特性

本文报道了用反应离子刻蚀（RIE）与晶向湿法化学腐蚀（XWCE）相结合沿InP衬底（110）方向获得工作波长1．3μm的InGaAsP／InP双异质结激光器的腔面的方法．用CH4：H2：Ar2的混合物作干法刻蚀的反应气体，用H2SO4：HCl：H2O2作湿法腐蚀的腐蚀剂，我们获得了质量较好的激光器的光学腔面．用一个刻蚀腔面与一个解理面组成激光器的F－P腔，我们获得了它的宽接触阈值电流和微分量子效率与用传统的解理腔面的激光器的宽接触阈值电流与微分量子效率相当的激光器．     

栅长90nm的晶格匹配InAlAs／InGaAs／InP HEMT

文章报道了90nm栅长的晶格匹配InP基HEMT器件。栅图形是通过80kV的电子束直写的,并采用了优化的三层胶工艺。器件做在匹配的InAlAs／InGaAs／InP HEMT材料上。当Vds=1．0V时,两指75μm栅宽器件的本征峰值跨导达到720ms／mm,最大电流密度为500mA／mm,器件的阂值电压为．0．8V,截止频率达到127GHz,最大振荡频率达到152GHz。     

用于InP基DHBT制备的GaAs0.51 Sb0.49湿法腐蚀研究

介绍了采用基于柠檬酸、硫酸和磷酸的腐蚀溶液对气态分子束外延生长的InP衬底上GaAs0.51 Sb0.49湿法腐蚀研究工作.对不同体积比的腐蚀溶液的腐蚀速率和表面粗糙度进行了研究.和硫酸及磷酸基腐蚀液相比,柠檬酸/双氧水腐蚀液的腐蚀速率较慢但具有很好的表面粗糙度.作为验征,采用最优体积比5∶1的柠檬酸/双氧水腐蚀溶液,...     

腐蚀工艺条件对InP晶片表面状况的影响

对InP晶片的化学腐蚀特性进行了分析,研究了酸性腐蚀液(盐酸系列腐蚀液)的配比、腐蚀液温度等工艺条件对InP晶片腐蚀速率、表面腐蚀形貌和化学腐蚀片表面粗糙度的影响。研究结果表明,腐蚀液温度为室温时,改变腐蚀液配比,InP晶片的腐蚀速率变化不明显,而当腐蚀液温度发生变化时则腐蚀速率、晶片表面腐蚀形貌(显微镜下的表面状况)和化学腐蚀后晶片的表面粗糙度均有较大变化,当腐蚀液温度控制在一定范围时,晶片表面光洁,显微镜下观察到的腐蚀图形均匀一致。研究结果对确定InP晶体加工过程中的化学腐蚀工艺有一定的指导意义。     

新型长波长InP基谐振腔增强型光探测器

介绍了一种新型长波长InP基谐振腔增强型(RCE)光探测器。通过V(FeCl3):V(H2O)溶液对InGaAs牺牲层的选择性湿法腐蚀,制备出具有InP/空气隙的高反射率分布布拉格反射镜(DBR),并将该选择性湿法腐蚀技术成功地应用到长波长InP基谐振腔增强型光探测器的制备中去,从而彻底解决了InP/InGaAsP高反射率分布布拉格反射镜难以外延生长的问题。所制备出的谐振腔增强型光探测器,其台面面积为50μm×50μm,底部反射镜为1.5对的InP/空气隙分布布拉格反射镜,顶部反射镜靠InGaAsP与空气的界面反射来实现。测试结果表明,该谐振腔增强型光探测器在波长1.510μm处获得了约59％的峰值量子效率,在3V反偏压下暗电流为2nA,3dB响应带宽达到8GHz。     

InGaAs／InP光电探测器

InGaAs光电探测器被广泛地应用于光纤通讯领域,由于其特有的优点,国外已应用于空间遥感领域。本文简要介绍了InGaAs／InP的物理特性、PIN光电探测器结构和主要性能指标,讨论了研制InGaAs／InP空间遥感用光电探测器的意义。     

fMAX为425GHz转移衬底InP／InGaAa／InP双异质结双极晶体管

美国UniversityofCalifornia采用转移衬底技术已研制成fMAX为 4 2 5GHz ,fT 为 14 1GHz的InP/InGaAs/InP双异质结双极晶体管 (DHBT) ,这是目前所报道DHBT最高的fMAX 器件的发射极接触面积为 0 5 μm× 8μm。在Jc =5× 10 4 A/cm2 下 ,击穿电压BVCEO为 8V ,且使电流增益 β为 4 3。MBE生长InP/InGaAs/InPDHBT的层结构如表所示。表　MBE生长InP/InGaAs/InPDHBT的层结构LayerMaterialDoping ThicknessEmittercap InGaAs 1× 10 19∶Si 30 0GradeInGaAs/InAlAs 1× 10 19∶Si 2 0 0N+ + emitterInp 1× 10 …     

InP/InGaAs SHBT器件自对准结构设计和工艺实现

从InP湿法腐蚀各向异性特性实验出发，利用传统的基极-发射极自对准工艺和改进的基极-发射极工艺制作了两种InP/InGaAs SHBT自对准结构，比较了两种自对准工艺对减小基极与发射极台面间距的效果，为制作高频率特性InP/InGaAs SHBT提供了工艺途径.     

InAlAs/InGaAs/InP MODFET's with uniform threshold voltage obtainedby selective wet gate recess

Excellent uniformity in the threshold voltage, transconductance, and current-gain cutoff frequency of InAlAs/InGaAs/InP MODFETs has been achieved using a selective wet gate recess process. An etch rate ratio of 25 was achieved for InGaAs over InAlAs using a 1:1 citric acid:H₂O₂ solution. By using this solution for gate recessing, the authors have achieved a threshold voltage standard deviation of 15 mV and a transconductance standard deviation of 15 mS/mm for devices across a quarter of a 2-in-diameter wafer. The average threshold voltage, transconductance, and current-gain cutoff frequency of 1.0-μm gate-length devices were -234 mV, 355 mS/mm, and 32 GHz, respectively     

InGaAs/InAlAs HEMT with a strained InGaP Schottky contact layer

The authors have fabricated an InGaAs/InAlAs HEMT structure with a strained InGaP Schottky contact layer to achieve selective wet gate recess etching and to improve reliability for thermal stress. Strained In_0.75Ga_0.25P grown on InAlAs has been revealed to have sufficient Schottky barrier height for use as a gate contact. Threshold voltage standard deviation has been reduced to one fifth that of a conventional InGaAs/InAlAs HEMT, as a result of successful selective recess etching. After thermal treatment at 300°C for 5 min, the drain current and transconductance did not change, while those of the conventional HEMT decreased by more than 10%     

Low-frequency noise properties of selectively dry etched InP HEMT's

The low-frequency noise of lattice-matched InAlAs/InGaAs/InP high electron mobility transistors (HEMT's) gate recess etched with a highly selective dry etching process and with conventional wet etching were studied at different gate and drain biases for the temperature range of 77-340 K. The measurements showed a significantly lower normalized drain current 1/f noise for the dry etched HEMT's under all bias conditions. No difference in the normalized gate current 1/f noise could be observed for the two device types. By varying the temperature, four electron traps could be identified in the drain current noise spectra for both dry and wet etched devices. No additional traps were introduced by the dry etching step. The concentration of the main trap in the Schottky layer is one order of magnitude lower for the dry etched HEMT's. No hydrogen passivation of the shallow donors was observed in these devices. We presume hydrogen passivation of the deep levels as the cause for the trap density reduction. The kink effect in the dry etched HEMT's was observed to be reduced significantly compared with wet etched devices which gives further evidence of trap passivation during dry etching. These results show that dry etched InP HEMT's have suitable characteristics for the fabrication of devices for noise sensitive applications     

Heterojunction InAlAs/InP MESFETs grown by OMVPE

Lattice-matched InAlAs/n-InP and InAlAs/n⁺-InP heterostructure MESFETs with extrinsic transconductances of 220 and 155 mS/mm, respectively, have been fabricated on semi-insulating InP substrates. Maximum stable gains of 11.5 dB for the 1.25-μm-gate n-InP channel and 10 dB for the 1.0-μm-gate n⁺-InP channel devices were measured at 10 GHz. An extrapolated f_max of 42 GHz was obtained for the n⁺-channel MESFET     

An 80-Gbit/s multiplexer IC using InAlAs/InGaAs/InP HEMTs

This paper describes the design and performance of an 80-Gbit/s 2:1 selector-type multiplexer IC fabricated with InAlAs/InGaAs/InP HEMTs. By using a double-layer interconnection process with a low-dielectric insulator, microstrip lines were designed to make impedance-matched, high-speed intercell connection of critical signal paths. The record operating data rate was measured on a 3-in wafer. In spite of the bandwidth limitation on the measurement setup, clear eye patterns were successfully observed for the first time. The obtained circuit speed improvement from the previous result of 64 Gbit/s owes much to this high-speed interconnection design     

InGaAs/InGaAlAs/InAlAs/InP SCH-MQW laser diodes grown by molecular-beam epitaxy

InGaAs/InGaAlAs/InAlAs/InP separate-confinement hetero-structure-multiquantum-well (SCH-MQW) laser diodes have been fabricated by molecular-beam epitaxy (MBE), and room-temperature pulsed operation at 1.57 ?m has been achieved. This SCH-MQW laser is composed of InGaAs well layers, InGaAlAs quaternary barrier layers, and InAlAs and InP cladding layers.     

GaAs、GaP、InP、InGaAsP、AlGaAs、InAlGaAs的化学腐蚀研究

为研制全集成光开关、微片式激光器等，对ＧａＡｓ、ＧａＰ、ＩｎＧａＡｓＰ、ＩｎＡＩＧａＡｓ、ＡｌＧａＡｓ等材料的化学腐蚀进行了实验研究。为了研制ＩｎＡｌＧａＡｓ／ＩｎＡｌＡｓ／ＩｎＡｌＧａＡｓ微片式激光器，开发了Ｈ３ＰＯ４／Ｈ２Ｏ２／Ｈ２Ｏ薄层腐蚀液和ＨＣｌ／Ｈ２Ｏ选择性腐蚀液；为了研制ＩｎＧａＡｓＰ／ＩｎＰ／ＩｎＧａＡｓＰＴｂａｒ型光波导，开发了ＨＣｌ／Ｈ３ＰＯ４／Ｈ２Ｏ２薄层腐蚀液和ＨＣｌ／Ｈ２Ｏ２选择性腐蚀液；为了研制ＧａＰ、ＩｎＧａＰ光波导，开发了ＨＣｌ／ＨＮＯ３／Ｈ２Ｏ薄层腐蚀液。它们都具有稳定、重复性好、速率可控、腐蚀后表面形貌好等特点。除此之外，蚀刻成的ＧａＰ光波导侧壁平滑无波纹起伏。此种结果尚未见报导。     

Admittance spectroscopy of ring diode InGaAs/InAlAs/InP quantum-well structures

The admittance of ring planar diode Au/InGaAs/InP and Au/InGaAs/InAlAs heteronanostructures on i-InP has been studied. The structures are constituted by a silicon ??-doped layer and an InGaAs quantum well (QW) in InP or InAlAs epitaxial layers. An analysis of the capacitance-voltage and conductance-voltage characteristics yielded distribution profiles of the electron concentration and mobility in the vicinity of the QW and ??-doped layer. It is shown that lowering the temperature leads to an increase in the electron concentration and mobility in the QW.     

Charge storage in InAlAs/InGaAs/InP floating gate heterostructures

Charge retention in floating gate InAlAs/InGaAs/InP field effect transistors is limited by lateral electron motion along the storage channel, a different direction for motion than found for AlAs/GaAs devices. Storage times as a function of temperature for the InP based alloy devices are reported and compared with similar AlAs/GaAs devices by using Poisson equation models.<>