Accurate extraction of the mechanical properties of thin films by nanoindentation for the design of reliable MEMS

Traditional procedures for the extraction of mechanical properties of thin films by nanoindentation measurements have shown problems in terms of accuracy and in the ability to support sophisticated constitutive models. In this paper, an inverse modeling procedure based on finite element analysis is presented to solve these limitations. Finite element simulation is used to predict the relationships between the indentation load and depth. The developed approach is applied to extract the viscoplastic properties of aluminum single grain, the viscoelastic properties of acrylic resin films, and the residual strain in stainless steel.     

Study of nano-mechanical properties for thin porous films through instrumented indentation: SiO2 low dielectric constant films as an example

Much research has been focused on the mechanical properties of porous materials such as films of silica xerogels because of their potential for application to microelectronic interconnects. To accurately probe the film properties, one has to challenge with the porosity as well as the large differences between film and substrate properties. In this paper, a study is presented for the investigation of Young’s modulus and yield stress of these porous films by instrumented indentation under complete consideration of the substrate influence by using the approach of the ‘effectively shaped indenter concept’. This concept provides the basis of a more appropriate analysis for thin films in case of elastic-plastic contact situations as given for porous low-k films. It was found that the ratio of yield stress to Young’s modulus, which equals the yield strain of the stress-strain curve, is not constant and changes with porosity.     

Die-attachment solutions for SiC power devices

Silicon carbide has become a very attractive material for high temperature and high power electronics applications due to its physical properties, which are different than those of conventional Si semiconductors. However, the reliability of SiC devices is limited by assembly processes comprising die attachment and interconnections technology as well as the stability of ohmic contacts at high temperatures.The investigations of die to substrate connection methods which can fulfill high temperature and high power requirements are the main focuses of the paper. This work focuses on die attach technologies: solder bonding by means of gold-germanium alloys, adhesive bonding with the use of organic and inorganic conductive compositions, as well as die bonding with the use of low temperature sintering with silver nanoparticles. The applied bonding technologies are described and obtained results are presented. Of the methods tested, the best solutions for high temperature application are two die attach technologies: silver glass die attach and die bonding with the use of low temperature sintered Ag nanopowders.     

Room-Temperature Mechanical Properties and Slow Crack Growth Behavior of Mg2Si Thermoelectric Materials

Mg₂Si is of interest as a thermoelectric (TE) material in part due to its low materials cost, lack of toxic components, and low mass density. However, harvesting of waste heat subjects TE materials to a range of mechanical and thermal stresses. To understand and model the material??s response to such stresses, the mechanical properties of the TE material must be known. The Mg₂Si specimens included in this study were powder processed and then sintered via pulsed electrical current sintering. The elastic moduli (Young??s modulus, shear modulus, and Poisson??s ratio) were measured using resonant ultrasound spectroscopy, while the hardness and fracture toughness were examined using Vickers indentation. Also, the Vickers indentation crack lengths were measured as a function of time in room air to determine the susceptibility of Mg₂Si to slow crack growth.     

Are Sintered Silver Joints Ready for Use as Interconnect Material in Microelectronic Packaging?

Silver (Ag) has been under development for use as interconnect material for power electronics packaging since the late 1980s. Despite its long development history, high thermal and electrical conductivities, and lead-free composition, sintered Ag technology has limited market penetration. This review sets out to explore what is required to make this technology more viable. This review also covers the origin of sintered Ag, the different types and application methods of sintered Ag pastes and laminates, and the long-term reliability of sintered Ag joints. Sintered Ag pastes are classified according to whether pressure is required for sintering and further classified according to their filler sizes. This review discusses the main methods of applying Ag pastes/laminates as die-attach materials and the related processing conditions. The long-term reliability of sintered Ag joints depends on the density of the sintered joint, selection of metallization or plating schemes, types of substrates, substrate roughness, formulation of Ag pastes/laminates, joint configurations (i.e., joint thicknesses and die sizes), and testing conditions. This paper identifies four challenges that must be overcome for the proliferation of sintered Ag technology: changes in materials formulation, the successful navigation of the complex patent landscape, the availability of production and inspection equipment, and the health concerns of Ag nanoparticles. This paper is expected to be useful to materials suppliers and semiconductor companies that are considering this technology for their future packages.     

Exploiting Chemical Switching in a Diels–Alder Polymer for Nanoscale Probe Lithography and Data Storage

Reversibly crosslinked polymer films have properties that are beneficial to scanned‐probe data storage and lithographic applications that use thermomechanical nanoindentation as a write or expose mechanism. The novel polymer under study contains linkages based on thermally reversible Diels–Alder crosslinking. Thermomechanical properties on the nanometer scale are analyzed by indentation experiments on polymer thin films using heated tips. The underlying indentation mechanism is studied at varying tip temperatures and indentation times, revealing Arrhenius kinetics. This is in contrast to the Williams–Landau–Ferry kinetics usually observed for polymer systems. The discrepancy is explained by the reversible crosslinking incorporated into the structure of the polymer that allows switching between two different states: a rigid, highly crosslinked, low‐temperature state, and a deformable, fragmented, high‐temperature state. An individual indentation volume of less than 10^–20 L (10 000 molecule pairs) is estimated. These kinetics experiments demonstrate that a chemical reaction of only a few thousand molecules can be transduced into a mechanically measurable action. The ability to cycle between two sets of properties in these materials opens up new perspectives in lithography and data storage. Examples of data storage with densities up to 1 Tb in.^–2 and maskless lithography with resolution below 20 nm are demonstrated at writing times of 10 μs per bit/pixel.     

Board level solder joint reliability modeling and testing of TFBGA packages for telecommunication applications

For thin-profile fine-pitch BGA (TFBGA) packages, board level solder joint reliability during the thermal cycling test is a critical issue. In this paper, both global and local parametric 3D FEA fatigue models are established for TFBGA on board with considerations of detailed pad design, realistic shape of solder joint, and nonlinear material properties. They have the capability to predict the fatigue life of solder joint during the thermal cycling test within ±13% error. The fatigue model applied is based on a modified Darveaux’s approach with nonlinear viscoplastic analysis of solder joints. A solder joint damage model is used to establish a connection between the strain energy density (SED) per cycle obtained from the FEA model and the actual characteristic life during the thermal cycling test. For the test vehicles studied, the maximum SED is observed at the top corner of outermost diagonal solder ball. The modeling predicted fatigue life is first correlated to the thermal cycling test results using modified correlation constants, curve-fitted from in-house BGA thermal cycling test data. Subsequently, design analysis is performed to study the effects of 14 key package dimensions, material properties, and thermal cycling test condition. In general, smaller die size, higher solder ball standoff, smaller maximum solder ball diameter, bigger solder mask opening, thinner board, higher mold compound CTE, smaller thermal cycling temperature range, and depopulated array type of ball layout pattern contribute to longer fatigue life.     

Thermal cycling analysis of flip-chip solder joint reliability

The reliability concern in flip-chip-on-board (FCOB) technology is the high thermal mismatch deformation between the silicon die and the printed circuit board that results in large solder joint stresses and strains causing fatigue failure. Accelerated thermal cycling (ATC) test is one of the reliability tests performed to evaluate the fatigue strength of the solder interconnects. Finite element analysis (FEA) was employed to simulate thermal cycling loading for solder joint reliability in electronic assemblies. This study investigates different methods of implementing thermal cycling analysis, namely using the "dwell creep" and "full creep" methods based on a phenomenological approach to modeling time independent plastic and time dependent creep deformations. There are significant differences between the "dwell creep" and "full creep" analysis results for the flip chip solder joint strain responses and the predicted fatigue life. Comparison was made with a rate dependent viscoplastic analysis approach. Investigations on thermal cycling analysis of the temperature range, (ΔT) effects on the predicted fatigue lives of solder joints are reported     

Post-Synthetic Modification of Metal–Organic Frameworks Toward Applications

Post-synthetic modification (PSM) of metal–organic framework (MOF) compounds is a useful technique for preparing new MOFs that can exhibit or enhance many of the properties of the parent MOFs. PSM can be carried out by a number of approaches such as modifying the linker (ligand) and/or metal node, and adsorption/exchange of guest species. The surface environment of the MOF can be modified to increase structural stability as well as introducing desired properties. There is considerable scope in widening the applications of the MOF with compatible metal or ligand employing the PSM. This review focuses on the recent developments of modified materials through PSM, which augers well for the chemical modification and functionalization of MOFs. In this review, different types of PSM methods are presented in an orderly manner, and the diverse applications of resultant frameworks are described and discussed.     

Comparison of Predicted Thermoelectric Energy Conversion Efficiency by Cumulative Properties and Reduced Variables Approaches

The semi-analytical methods of thermoelectric energy conversion efficiency calculation based on the cumulative properties approach and reduced variables approach are compared for 21 high performance thermoelectric materials. Both approaches account for the temperature dependence of the material properties as well as the Thomson effect, thus the predicted conversion efficiencies are generally lower than that based on the conventional thermoelectric figure of merit ZT for nearly all of the materials evaluated. The two methods also predict material energy conversion efficiencies that are in very good agreement which each other, even for large temperature differences (average percent difference of 4% with maximum observed deviation of 11%). The tradeoff between obtaining a reliable assessment of a material’s potential for thermoelectric applications and the complexity of implementation of the three models, as well as the advantages of using more accurate modeling approaches in evaluating new thermoelectric materials, are highlighted.     

Comprehensive board-level solder joint reliability modeling and testing of QFN and PowerQFN packages

For quad flat non-lead (QFN) packages, board-level solder joint reliability during thermal cycling test is a critical issue. In this paper, a parametric 3D FEA sliced model is established for QFN on board with considerations of detailed pad design, realistic shape of solder joint and solder fillet, and non-linear material properties. It has the capability to predict the fatigue life of solder joint during thermal cycling test within ±34% error. The fatigue model applied is based on a modified Darveaux’s approach with non-linear viscoplastic analysis of solder joints. A solder joint damage model is used to establish a connection between the strain energy density (SED) per cycle obtained from the FEA model and the actual characteristic life during thermal cycling test. For the test vehicles studied, the maximum SED is observed mostly at the top corner of peripheral solder joint. The modeling predicted fatigue life is first correlated to thermal cycling test results using modified correlation constants, curve-fitted from in-house QFN thermal cycling test data. Subsequently, design analysis is performed to study the effects of 17 key package dimensions, material properties, and thermal cycling test condition. Generally, smaller package size, smaller die size, bigger pad size, thinner PCB, higher mold compound CTE, higher solder standoff, and extra soldering at the center pad help to enhance the fatigue life. Comparisons are made with thermal cycling test results to confirm the relative trends of certain effects. Another enhanced QFN design with better solder joint reliability, PowerQFN, is also studied and compared with QFN of the same package size.     

Stress analyses of high spatial resolution on TSV and BEoL structures

Knowledge and control of local stress development in Back-End-of-Line (BEoL) stacks and nearby Through Silicon Vias (TSVs) in advanced 3D integrated devices is a key to their thermo-mechanical reliability. The paper presents a combined simulation/measurement approach to evaluate stresses generated in the result of the TSV and BEoL stack manufacturing and 3D bonding processes. Stress measurement methods of high spatial resolution capability (microRaman and Focused Ion Beam (FIB) based stress release techniques) are used to obtain stress data from real components as manufactured. Finite Element Analysis (FEA) allows a more accurate interpretation of measurements results as well as a subsequent comprehensive analysis of failure behaviour. The paper gives an introduction to the applied local stress measurement on advanced multi-layer systems and 3D integration components referring to the state-of-art capabilities and limitations. The need of experimental stress data generation is illustrated on FEA examples. Illustration is given for FEA applications on 3D IC integration components currently lacking appropriate residual stress input for an assumed initial state.     

Shape-formed ceramic superconductors by slip-casting

In order to rigorously test emerging applications using prototypes and pilot designs, high temperature superconductor (HTS) materials must be fabricated into a variety of shapes in an economical manner. We have developed a simple, economical, ceramic slip-casting approach to form complex shaped monolithic HTS articles for which high bulk density has been achieved. The sintered articles exhibit good Meissner signal and consist of phase-pure HTSC phase. A low transport critical current density is observed and is explained on the basis of densification and grain growth.     

玻璃-莫来石陶瓷复合材料基板的研究

以低介电常数的玻璃粉末和莫来石粉末为原料,制备了玻璃–莫来石陶瓷复合材料基板。研究了烧结温度和莫来石含量对复合材料的介电性能和抗弯强度的影响。结果表明,当莫来石质量分数为50%时,玻璃–陶瓷复合材料经1 000℃、2 h的烧结后,其相对介电常数er为4.6、介质损耗tgd 为0.008、抗弯强度s 为90 MPa。另外,该复合材料在200~600℃之间的热膨胀系数约为4.0×106℃1,与Si、GaAs等半导体材料的热膨胀系数相近,可望作为优质封装材料应用。     

An Efficient Time-Domain Algorithm for the Simulation of Heterogeneous Dispersive Structures

In this paper a new general numerical algorithm for the simulation of heterogeneous dispersive structures is presented. The general algorithm is based on the ADE-FDTD approach. It finds its strength in the simulation of cases where different materials with different dispersion types are present. Several numerical examples are presented and results are compared to analytical solutions. While having the same level of accuracy, the proposed algorithm offers savings in both memory and computational requirements, compared to other ADE-based methods.     

热压烧结对Co－Mn－Ni－O热敏材料电性能的影响

研究了不同热压压力、热压方式对Ｃｏ－Ｍｎ－Ｎｉ－Ｏ热敏材料电性能的影响。热压烧结能够提高材料的电阻率及Ｂ值。Ｘ射线衍射分析表明，热压烧结材料有ＭｎＣｏ２Ｏ４、ＮｉＭｎ２Ｏ４和ＣｏＮｉＯ２三相组成。从扫描电镜照片可见，热压烧结材料晶粒细小、均匀、气孔率少，是提高其电性能的主要原因。调整热压压力可以有效地控制材料的电学参数     

热压烧结对Co－Mn－Ni－O热敏材料电性能的影响

研究了不同热压压力、热压方式对Ｃｏ－Ｍｎ－Ｎｉ－Ｏ热敏材料电性能的影响。热压烧结能够提高材料的电阻率及Ｂ值。Ｘ射线衍射分析表明，热压烧结材料有ＭｎＣｏ２Ｏ４、ＮｉＭｎ２Ｏ４和ＣｏＮｉＯ２三相组成。从扫描电镜照片可见，热压烧结材料晶粒细小、均匀、气孔率少，是提高其电性能的主要原因。调整热压压力可以有效地控制材料的电学参数     

Continuous-Flow Synthesis of High-Quality Few-Layer Antimonene Hexagons

2D materials show outstanding properties that can bring many applications in different technological fields. However, their uses are still limited by production methods. In this context, antimonene is recently suggested as a new 2D material to fabricate different (opto)electronic devices, among other potential applications. This work focuses on optimizing the synthetic parameters to produce high-quality antimonene hexagons and their implementation in a large-scale manufacturing procedure. By means of a continuous-flow synthesis, few-layer antimonene hexagons with ultra-large lateral dimensions (up to several microns) and a few nanometers thick are isolated. The suitable chemical post-treatment of these nanolayers with chloroform gives rise to antimonene surfaces showing low oxidation that can be easily contacted with microelectrodes. Therefore, the reported procedure offers a way to solve two critical problems for using antimonene in many applications: large-scale preparation of high-quality antimonene and the ability to set electrical contacts useful for device fabrication.     

真空微电子学的现状及其应用

本文综述了真空微电子学近年来的发展及其应用。主要包括FEA、材料及在FED、微波器件和其它方面的应用。     

Vertical Handover Solutions Over LTE-Advanced Wireless Networks: An Overview

The convergence of multitude radio access networks forming a cluster of seamless heterogeneous wireless environment has made the wireless communication industry meet the paradigm of always best connected, where various mobile devices are able to access numerous types of applications and services. However, achieving such landmarks could not be possible without difficulties which this paper tries to highlight some of the technical challenges underlying seamless vertical handover. It provides a general overview of the mobility management process including a brief on multi-homing mobility protocol and focuses on vertical handover decision making techniques, hi ghlighting some radio interface standar and analysed some handover approaches. The paper proposes fast intelligent inter-layer network selection as a new handover approach to select the best network among the candidate networks, where Quality of Service, handover delay and improved data bit rates are set to be achieved.