一种具有较大围长的正则LDPC码构造方法

提出一种新的具有较大围长的正则LDPC码构造方法。首先介绍以矩阵分裂技术为基础的高围长正则LDPC码的构造方法,并在此基础上分析了设计围长时参数的选取方法。仿真表明,用这种方法构造的正则LDPC码围长可以达到12,并且在AWGN信道下的性能不差于相同参数、随机构造的LDPC码,在高信噪比时甚至优于相同参数的随机码。     

On the Construction of Quasi-Systematic Block-Circulant LDPC Codes

A class of quasi-systematic block-circulant LDPC (QSBC-LDPC) Codes is proposed. The parity-check matrix of a QSBC-LDPC code is a sparse block-circulant matrix with a quasi-systematic structure. Due to the special structure of the parity-check matrix, only limited memories, XOR computations and cyclic-shifting operations are needed in the recursive encoding process of the QSBC-LDPC codes. Simulations show that the QSBC-LDPC codes provide remarkable performance improvement with low encoding complexity.     

一种低误码平层的LDPC码的构造与实现

提出了一种分层的伪随机低密度奇偶校验码(LDPC)的构造方法,有效地改善了译码性能,尤其是降低了误码平层.然后针对这种码字,介绍了相应译码器的硬件实现结构.     

Improved Sliced Message Passing Architecture for High Throughput Decoding of LDPC Codes

This paper presents an architecture for high-throughput decoding of high-rate Low-Density Parity-Check (LDPC) codes. The proposed architecture is a modification of the sliced message passing (SMP) decoding architecture which overlaps the check-node and variable-node update stages, achieving a good tradeoff between area and throughput, and also, high hardware utilization efficiency (HUE). The proposed modification does not affect the performance of the SMP algorithm and yields an area reduction of 33%. As an example, SMP architecture and the proposed modification was synthesized in a 90 nm CMOS process for the 2048-bit LDPC code of the IEEE802.3an standard with 16 iterations achieving a throughput of 5.9 Gbps with 15.3 mm² and 6.2 Gbps with 10.2 mm², respectively.     

Construction of Irregular LDPC Codes by Quasi-Cyclic Extension

In this correspondence, we propose an approach to construct irregular low-density parity-check (LDPC) codes based on quasi-cyclic extension. When decoded iteratively, the constructed irregular LDPC codes exhibit a relatively low error floor in the high signal-to-noise ratio (SNR) region and are subject to relatively few undetected errors. The LDPC codes constructed based on the proposed scheme remain efficiently encodable     

一种线性编码半随机构造LDPC码及其仿真

文章首先给出了一种消除4环的完全随机的低密度奇偶校验(LDPC)码构造法,然后通过分析快速编码计算复杂度影响因素对其进行了改进,得到一种消除4环且可线性编码的半随机构造法.仿真表明,半随机构造法相对于完全随机构造法,其性能相接近,但却可以线性时间编码,因此更适合实际应用.     

High Rate APPS and Bi-APPS LDPC Codes Design with Low Error Floor and Large Girth

In this paper, two new methods to construct low-density parity-check (LDPC) codes with low error floor and large girth are proposed. The first one is APPS-LDPC codes based on Arithmetic Progression theory and cycle classification, whose girth is at least eight. Based on the designed APPS-LDPC codes, we further construct Bi-diagonal APPS-LDPC codes with column degree 4, whose circulant permutation matrix is combined by two shifted identity matrix. The designed APPS-LDPC code has 0.25 and 0.2 dB coding gain compared to partition-and-shift (PS)-LDPC code and progressive-edge-growth (PEG)-LDPC code. And the Bi-APPS-LDPC code has similar performance to T2 LDPC code in CCSDS standard, but its effective structure is more suitable for high throughput decoder implementation on FPGA. Both codes have less construction complexity than PS-LDPC code and PEG-LDPC code.     

Algebraic Construction of Quasi-Cyclic LDPC Codes for the AWGN and Erasure Channels

This paper is concerned with construction of quasi-cyclic (QC) low-density parity-check (LDPC) codes for three different types of channels: the additive white Gaussian noise, the binary random erasure, and the binary burst erasure channels. Two algebraic methods for systematic construction of QC-LDPC codes are presented. Codes constructed perform well over all three types of channels.     

用于图像传输的改进的LDPC码译码算法

为了改善改进的加权比特翻转(IWBF)算法的误比特率性能以及译码收敛速度,结合并行比特翻转算法的特性,提出了在IWBF算法的每次迭代中一次更新多个比特的标准,并将这种算法应用于图像传输中。仿真结果表明,改进的算法不但误码性能优于IWBF算法约0.5 dB,性能明显改善,译码收敛速度也大大提高,并能实现图像的快速高质量传输。     

基于循环移位矩阵的LDPC码构造方法研究

论文提出了一种将矩阵分块并以单位阵的循环移位阵为基本单元构造LDPC码的校验矩阵的方法,降低了LDPC码在和积算法下的译码复杂度。同时,基于这种循环移位矩阵构造的类下三角结构可以减小编码复杂度。仿真和分析结果表明,这种LDPC码相对于随机构造的LDPC码在环长分布、最小汉明距离以及误码率性能方面也具有优越性。     

DVB-S2中LDPC码生成法解析

文章在详细分析DVB-S2标准的基础上,研究了DVB-S2中LDPC码的码字构造法则,推导出校验矩阵结构并进行分析,得出DVB-S2中LDPC码的相关参数。同时对标准中的一类码在AWGN信道中进行了仿真,仿真结果表明,这类码性能优异,具有很强的纠错能力。     

Decoder Design for RS-Based LDPC Codes

This brief studies very large-scale integration (VLSI) decoder architectures for RS-based low-density parity-check (LDPC) codes, which are a special class of LDPC codes based on Reed-Solomon codes. The considered code ensemble is well known for its excellent error-correcting performance and has been selected as the forward error correction coding scheme for 10GBase-T systems. By exploiting the shift-structured properties hidden in the algebraically generated parity-check matrices, novel decoder architectures are developed with significant advantages of high level of parallel decoding, efficient usage of memory, and low complexity of interconnection. To demonstrate the effectiveness of the proposed techniques, we completed a high-speed decoder design for a (2048, 1723) regular RS-LDPC code, which achieves 10-Gb/s throughput with only 820 000 gates. Furthermore, to support all possible RS-LDPC codes, two special cases in code construction are considered, and the corresponding extensions of the decoder architecture are investigated.     

Novel Construction and Optimization of LDPC Codes for NC-OFDM Cognitive Radio Systems

In this paper, a random Low-Density Parity-Check (LDPC) code is proposed for Noncontiguous Orthogonal Frequency Division Multiplexing (NC-OFDM) Cognitive Radio (CR) systems. Unlike other encoding schemes which achieve a system code rate of only 1/4 when half of the subcarriers are active, the proposed scheme achieves a system code rate of 1/2. The LDPC code is used to enhance the data transmission rate. A new channel model comprised of a binary erasure channel concatenated with an uncorrelated fading channel and an AWGN channel is adopted for NC-OFDM CR systems. Moreover, the adopted channel model is employed with density evolution algorithm to obtain good degree distribution pairs for the LDPC code. Thereafter, a modified shortest-path algorithm is used to construct the parity-check matrix for the LDPC code. Simulation results show that the proposed LDPC code performs well in terms of both error rate and data transmission rate.     

一种改进的基于有限域的准循环LDPC码设计方法

结合有限域方法和具有简单递归编码特性的Tam结构,提出了一种新的准循环LDPC码构造方法.该方法首先利用有限域方法构造出校验矩阵,并得到其相应的指数矩阵,接着采用具有Tam结构的校验矩阵对应的二元基矩阵,两者进行掩膜运算(mask),得到新的指数矩阵,最后构造出的准循环LDPC码兼具有限域方法的良好纠错特性和Tam结构的简单递归编码特性.仿真结果表明,所提方法构造的准循环LDPC码的BER(Bit Error Rate)性能要优于Tam码和802.16e码.     

消除小环的规则LDPC代数构造方法研究

文中介绍了低密度奇偶校验码的基本构造方法，并提出来一种具有较大围长的规则LDPC码的代数构造方法，通过计算机仿真性能，获得了较理想的结果。     

Shortened Array Codes of Large Girth

One approach to designing structured low-density parity-check (LDPC) codes with large girth is to shorten codes with small girth in such a manner that the deleted columns of the parity-check matrix contain all the variables involved in short cycles. This approach is especially effective if the parity-check matrix of a code is a matrix composed of blocks of circulant permutation matrices, as is the case for the class of codes known as array codes. We show how to shorten array codes by deleting certain columns of their parity-check matrices so as to increase their girth. The shortening approach is based on the observation that for array codes, and in fact for a slightly more general class of LDPC codes, the cycles in the corresponding Tanner graph are governed by certain homogeneous linear equations with integer coefficients. Consequently, we can selectively eliminate cycles from an array code by only retaining those columns from the parity-check matrix of the original code that are indexed by integer sequences that do not contain solutions to the equations governing those cycles. We provide Ramsey-theoretic estimates for the maximum number of columns that can be retained from the original parity-check matrix with the property that the sequence of their indices avoid solutions to various types of cycle-governing equations. This translates to estimates of the rate penalty incurred in shortening a code to eliminate cycles. Simulation results show that for the codes considered, shortening them to increase the girth can lead to significant gains in signal-to-noise ratio (SNR) in the case of communication over an additive white Gaussian noise (AWGN) channel     

一种估测LDPC码最小距离的方法

由于LDPC码具有译码复杂度低,纠错性能好等众多优点,WiMAX 802.16e标准已将 LDPC 码作为OFDMA物理层的一种信道编码方案.本文采用从最小距离和码重分布的角度来研究LDPC码的纠错性能,深入研究了估计LDPC码距离特性的ANC算法,并利用此算法估测出几组LDPC码的最小距离.结果验证了ANC算法的正确...     

低密度校验码量化译码研究

介绍了基于置信传播算法的LDPC码和积译码算法，分析其密度进行化特性，对不同消息空间中的量化译码问题进行研究，对采用不同量化方案时LDPC码在AWGN信道下的译码性能进行了仿真。仿真结果表明相对连续译码，中间变量6bit均匀量化会带来约0．4dB左右的损失，而10bit非均匀量化性能明显得到改善。合适的高阶量化译码可以获得接近连续译码的性能。     

Pseudocodeword Performance Analysis for LDPC Convolutional Codes

Message-passing iterative decoders for low-density parity-check (LDPC) block codes are known to be subject to decoding failures due to so-called pseudocodewords. These failures can cause the large signal-to-noise ratio (SNR) performance of message-passing iterative decoding to be worse than that predicted by the maximum-likelihood (ML) decoding union bound.