Performance of High-Reliability and High-Linearity InGaP/GaAs HBT PAs for Wireless Communication

An InGaP heterojunction-bipolar-transistor (HBT) power amplifier with the best linearity and high reliability is presented in this paper for use in wireless digital mobile communication systems. We optimized the linearity of a novel HBT device and investigated its reliability. Using SILVACO software, we performed a simulation of the HBT device. The best linearity, which was revealed for the device with a capacitance ratio C_bc (0/6 V), is 1.25 at a BV_ceo of 22 V. After the device was fabricated, a reasonably high PAE, i.e., ~ 55%, was obtained at 2.0 GHz, and an adjacent channel power ratio of over -48 dBc was achieved. In the reliability testing, the device, which was stressed at V_ce = 3 V and J_C = 25 kA/cm² under 85°C ambient temperature and 85% humidity, showed no failure for more than 1100 h. No significant beta degradation was observed under an extreme current J_C = 200 kA/cm² stress under wafer-level electrical/thermal overstress tests.     

High efficiency and high linearity InGaP/GaAs HBT power amplifiers:matching techniques of source and load impedance to improve phasedistortion and linearity

This paper reports on a matching technique of the source and load impedance focused on a phase distortion of InGaP/GaAs HBT power amplifiers to simultaneously achieve a high efficiency and a high linearity performance. Load-pull measurements were done to maximize power added efficiency (PAE) and source pull measurements to minimize the phase distortion and adjacent channel leakage power (ACP). Our HBT exhibited a high PAE of 60.7% and an ACP at a 50 kHz offset frequency of -51 dBc for 1.5 GHz π/4-shift QPSK modulated signal with an output power (P_cut) of 31 dBm under a supply voltage of 3.5 V     

High-efficiency Ku-band HBT MMIC power amplifier

A Ku-band monolithic HBT power amplifier was developed using a metal-organic chemical vapor deposition (MOCVD)-grown AlGaAs/GaAs heterojunction bipolar transistor (HBT) operating in common-emitter mode. At a 7.5 V collector bias, the amplifier produced 0.5 W CW output power with 5.0 dB gain and 42% power-added efficiency in the 15-16 GHz band. When operated at a single frequency (15 GHz), 0.66 W CW output power and 5.2 dB of gain were achieved with 43% PAE     

New fully-differential amplifier-less pipelined ADC with wide power scalability and ERBW

A 24 GHz power amplifier for direct-conversion transceiver using standard 0.18 μm CMOS technology is reported. The three-stage power amplifier comprises two cascaded cascode stages for high power gain, followed by a common-source stage for high power linearity. To increase the saturated output power (P_sat) and power-added efficiency (PAE), the output stage adopts a Wilkinson-power-divider- and combiner-based two-way power dividing and combining architecture. The power amplifier consumes 163.8 mW and achieves power gain (S₂₁) of 22.8 dB at 24 GHz. The corresponding 3-dB bandwidth of S₂₁ is 4.2 GHz, from 22.7 to 26.9 GHz. At 24 GHz, the power amplifier achieves P_sat of 15.9 dBm and maximum PAE of 14.6 %, an excellent result for a 24 GHz CMOS power amplifier. In addition, the measured output 1-dB compression point (OP_1dB) is 7 dBm at 24 GHz. These results demonstrate the proposed power amplifier architecture is very promising for 24 GHz short-range communication system applications.     

基于CMOS工艺的高效，高耐用性RF LDMOS器件

Two types of RF LDMOS devices, specified for application in the driver stage and output stage of a power amplifier, are designed based on a modified CMOS process. By optimizing the layout and process, the output capacitance per unit of gate width is as low as 225 fF/mm. The driver stage and output stage devices achieve an output power of 44 W with a PAE of 82% and 230 W with a PAE of 72.3%, respectively(P3dB compression) at 1 GHz. Both devices are capable of withstanding extremely severe ruggedness tests without any performance degradation. These tests are 3-5 dB overdrive, 10:1 voltage standing wave ratio mismatch load through all phase angles, and 40% drain overvoltage elevation at a working point of P3dB.     

高功率密度自对准结构AlGaAs/GaAs 异质结双极晶体管

利用各向异性的湿法刻蚀和侧墙隔离技术实现了发射极金属和基极金属的自对准,采用该自对准技术成功地研制出了自对准结构的AlGaAs/GaAs异质结双极晶体管,器件直流电流增益大于20,电流增益截止频率fT大于30GHz,最高振荡频率fmax大于50GHz,连续波功率测量表明：在1dB增益压缩时,单指HBT可以提供100mW输出功率,对应的功率密度为6.67W/mm,功率饱和时最大输出功率112mW,对应功率密度为7.48W/mm,功率附加效率为67%．     

高功率密度自对准结构AlGaAs/GaAs异质结双极晶体管

利用各向异性的湿法刻蚀和侧墙隔离技术实现了发射极金属和基极金属的自对准 ,采用该自对准技术成功地研制出了自对准结构的 Al Ga As/ Ga As异质结双极晶体管 ,器件直流电流增益大于 2 0 ,电流增益截止频率 f T 大于30 GHz,最高振荡频率 fmax大于 5 0 GHz,连续波功率测量表明 :在 1d B增益压缩时 ,单指 HBT可以提供 10 0 m W输出功率 ,对应的功率密度为 6 .6 7W/ m m,功率饱和时最大输出功率 112 m W,对应功率密度为 7.48W/ m m,功率附加效率为 6 7%     

一种自适应线性化偏置的单片集成功率放大器

提出一种自适应线性化偏置的电路结构,通过调节控制电压改变偏置管的工作状态,提高功率放大电路的线性度,降低偏置电流对参考电压和环境温度的敏感度.利用双反馈环结构抑制输入阻抗随频率的变化,实现了宽带匹配,拓展了放大器的带宽.采用微波电路仿真软件AWR进行仿真,验证了带宽范围内的相位偏离度在2°以内.基于2μm InGaP/GaAs HBT工艺,设计了集成电路版图并成功流片.测试结果表明:在3.5V电压供电下,该放大器在1～2.5 GHz频带范围内,输入反射系数均在-10 dB以下,功率增益为23 dB,输出功率大于30 dBm,误差向量幅度在2.412 GHz时为.2.7％@24 dBm,最大功率附加效率达40％.     

A 21-26-GHz SiGe bipolar power amplifier MMIC

A three-stage 21-26-GHz medium-power amplifier fabricated in f/sub T/=120 GHz 0.2 /spl mu/m SiGe HBT technology has 19 dB small-signal gain and 15 dB gain at maximum output power. It delivers 23 dBm, 19.75% PAE at 22 GHz, and 21 dBm, 13% PAE at 24 GHz. The differential common-base topology extends the supply to BV/sub CEO/ of the transistors (1.8 V). New on-chip components, such as onchip interconnects with floating differential shields, and self-shielding four-way power combining/dividing baluns provide inter-stage coupling and single-ended I/O interfaces at the input and output. The 2.45/spl times/2.45 mm/sup 2/ MMIC was mounted as a flipchip and tested without a heatsink.     

RF power performance of an LDMOSFET on high-resistivity SOI

This paper describes the RF power performance of an LDMOSFET technology on high-resistivity silicon-on-insulator wafers. The technology has an on-state breakdown voltage of greater than 10 V, and an off-state breakdown voltage of greater than 20 V. This device technology is shown to have excellent RF power characteristics at frequencies from 1.9 to 5.8 GHz. At 1.9 GHz, a peak power-added efficiency (PAE) of 63% was achieved with an output power of up to 520 mW from a single RF power cell. At 5.8 GHz, a peak PAE of 35% was achieved with an output power of up to 125 mW from a single RF power cell.     

2 V-operated InGaP-AlGaAs-InGaAs enhancement-mode pseudomorphic HEMT

A low-voltage single power supply enhancement-mode InGaP-AlGaAs-InGaAs pseudomorphic high-electron mobility transistor (PHEMT) is reported for the first time. The fabricated 0.5/spl times/160 /spl mu/m/sup 2/ device shows low knee voltage of 0.3 V, drain-source current (I/sub DS/) of 375 mA/mm and maximum transconductance of 550 mS/mm when drain-source voltage (V/sub DS/) was 2.5 V. High-frequency performance was also achieved; the cut-off frequency(F/sub t/) is 60 GHz and maximum oscillation frequency(F/sub max/) is 128 GHz. The noise figure of the 160-/spl mu/m gate width device at 17 GHz was measured to be 1.02 dB with 10.12 dB associated gain. The E-mode InGaP-AlGaAs-InGaAs PHEMT exhibits a high output power density of 453 mW/mm with a high linear gain of 30.5 dB at 2.4 GHz. The E-mode PHEMT can also achieve a high maximum power added efficiency (PAE) of 70%, when tuned for maximum PAE.     

A 90-nm CMOS Doherty power amplifier with minimum AM-PM distortion

A linear Doherty amplifier is presented. The design reduces AM-PM distortion by optimizing the device-size ratio of the carrier and peak amplifiers to cancel each other's phase variation. Consequently, this design achieves both good linearity and high backed-off efficiency associated with the Doherty technique, making it suitable for systems with large peak-to-average power ratio (WLAN, WiMAX, etc.). The fully integrated design has on-chip quadrature hybrid coupler, impedance transformer, and output matching networks. The experimental 90-nm CMOS prototype operating at 3.65 GHz achieves 12.5% power-added efficiency (PAE) at 6 dB back-off, while exceeding IEEE 802.11a -25 dB error vector magnitude (EVM) linearity requirement (using 1.55-V supply). A 28.9 dBm maximum Psat is achieved with 39% PAE (using 1.85-V supply). The active die area is 1.2 mm/sup 2/.     

Linearised InGaP/GaAs HBT MMIC power amplifier with active biascircuit for W-CDMA application

A high linearity InGaP/GaAs heterojunction bipolar transistor (HBT) monolithic microwave integrated circuit (MMIC) power amplifier is demonstrated using a new structure for a bias circuit for wideband-code division multiple access (W-CDMA) application. A one shunt capacitor is added to a novel active bias circuit and acts as a lineariser improving input P_{1 dB} of 16 dB and phase distortion of 5.1° for the hybrid phase shift keying (HPSK) modulated signal at the 28 dBm output power; the lineariser showing no significant increase of signal loss and chip area. The two-stage HBT MMIC amplifier exhibits a power-added efficiency (PAE) of 37%, a linear power gain of 24.5 dB, and an output power of 28 dBm with an adjacent channel power ratio (ACPR) of -45 dBc, under a 3 V operation voltage     

1 W Ku-band AlGaAs/GaAs power HBT's with 72% peak power-addedefficiency

High power and high-efficiency multi-finger heterojunction bipolar transistors (HBT's) have been successfully realized at Ku-band by using an optimum emitter ballasting resistor and a plated heat sink (PHS) structure. Output power of 1 W with power-added efficiency (PAE) of 72% at 12 GHz has been achieved from a 10-finger HBT with the total emitter size of 300 μm². 72% PAE with the output power density of 5.0 W/mm is the best performance ever reported for solid-state power devices with output powers more than 1 W at Ku-band     

Ultrahigh-efficiency power amplifier for space radar applications

This paper describes a broad-band switch mode power amplifier based on the indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. The amplifier combines the alternative Class-E mode of operation with a harmonic termination technique that minimizes the insertion loss of matching circuitry to obtain ultrahigh-efficiency operation at X-band. For broad-band Class-E performance, the amplifiers output network employs a transmission line topology to achieve broad-band harmonic terminations while providing the optimal fundamental impedance to shape the output current and voltage waveforms of the device for maximum efficiency performance. As a result, 65% power-added efficiency (PAE) was achieved at 10 GHz. Over the frequency band of 9-11 GHz, the power amplifier achieved 49%-65% PAE, 18-22 dBm of output power, and 8-11 dB gain at 4 V supply. The reported power amplifier achieved what is believed to be the best PAE performance at 10 GHz and the widest bandwidth for a switch-mode design at X-band.     

InGaP/GaAs HBT X波段混合集成功率合成放大器的研制

研制了面向X波段应用的InGaP/GaAs HBT混合集成功率合成放大器模块.电路采用一种新颖的具有片上RC稳定网络的InGaP/GaAs HBT功率管作为功率合成单元以提高电路的稳定性,并采用紧凑的微带线并联匹配网络进行功率分配和合成.在8.1GHz,偏置为Vcc=7V,Ic=230mA的AB类工作条件下,连续波最大输出功率为28.9dBm,功率合成效率达到80%.     

多晶发射极双台面微波功率SiGe HBT

研制成功了可商业化的75mm单片超高真空化学气相淀积锗硅外延设备SGE500,并生长了器件级SiGe HBT材料.研制了具有优良小电流特性的多晶发射极双台面微波功率SiGe HBT器件,其性能为:β=60@VCE/IC=9V/300μA,β=100@5V/50mA,BVCBO=22V,ft/fmax=5.4GHz/7.7GHz@10指,3V/10mA.多晶发射极可进一步提供直流和射频性能的折衷,该工艺总共只有6步光刻,与CMOS工艺兼容且(因多晶发射极)无需发射极外延层的生长,这些优点使其适合于商业化生产.利用60指和120指的SiGe HBT制作了微波锗硅功率放大器.60指功放在900MHz和3.5V/0.2A偏置时在1dB压缩点给出P1dB/Gp/PAE＝22dBm/11dB/26.1%.120指功放900MHz工作时给出了Pout/Gp/PAE＝33.3dBm (2.1W)/10.3dB/33.9%@11V/0.52A.     

5W ISM波段InGaP/GaAs HBT功率放大器MMIC

通过分析InGaP/GsAsHBT器件的热学和电学特点,结合HBT大功率放大器芯片在技术性能、稳定性、可靠性及尺寸等方面的要求,通过优化设计HBT功率器件单元和匹配电路,开发了一个大功率、高效率、小尺寸的ISM波段功率放大器单片集成电路。该三级放大器的各级器件单元的发射极面积分别为320μm2,1280μm2,5760μm2,芯片内部包括了输入、输出50Ω匹配电路,面积仅为1.9mm×2.1mm。放大器采用5V单电源供电,在2.4～2.5GHz频率范围内线性增益为27dB,2dB增益压缩点输出饱和功率达到37dBm,功率附加效率为46%。     

Design challenges of a fully integrated 65 nm CMOS half cascode SFDS PA

This paper presents the measurement results of a wideband multi-standards fully integrated 65 nm CMOS-power amplifier (PA). This PA is based on a half stacked folded pseudo-differential structure (HSFDS) cascoded. This demonstrator is composed by only one stage. It provides a maximal gain of 10 dB at 2.2 GHz with a bandwidth at −3 dB (B _w -3 dB) of 43%. At 1.95 GHz, the maximal output power (P _max ) is 23.3 dBm with a power added efficiency (PAE) of 12%. The output power at 1 dB compression (OCP ₁ ) is 21 dBm. At 2.4 GHz, Pmax is 23 dBm with a PAE of 11.3%. At this frequency, the OCP1 is 20 dBm.     

CMOS linear high performance push amplifier for WiMAX power amplifier

In this work a novel and efficient approach is proposed to optimize the linearity and efficiency of power amplifiers used in mobile WiMAX applications. A linear and high performance push amplifier is designed and implemented in 0.18 μm CMOS technology to enhance the linearity of a class-E switched-mode power amplifier. The proposed push amplifier consists of two sections; analog and switching sections. The analog section provides required linearity and the switching section guarantees satisfying total efficiency level. Each block is designed and optimized to meet required specifications. The core power amplifier which is a class-E switched-mode power amplifier is also designed to have maximum possible efficiency. The implemented circuit is simulated using HSPICERF and TSMC models for active and passive elements. The proposed power amplifier provides a maximum output power of 25 dBm and a power added efficiency (PAE) as high as 48% at 2.5 GHz operation frequency and supply voltage of 1.8 V. At 1 dB compression point this PA exhibits 23 dBm of output power with 42% PAE and 4.5% EVM which was appropriate for 64QAM OFDM signals.