Loss-Free Balancing Circuit for Series Connection of Electrolytic Capacitors Using an Auxiliary Switch-Mode Power Supply

Most of today's power converters such as three-phase variable-speed drives, uninterruptible power systems, welding converters, and telecom and server power supplies are based on voltage-source converters equipped with bulky dc-link electrolytic capacitors. To be able to handle full dc bus voltage, the dc bus capacitor is arranged as series-connected electrolytic capacitors rated at lower voltage. An electrolytic capacitor, however, is not an ideal capacitor. It has significant leakage current that strongly depends on the capacitor temperature, voltage, and ageing conditions. To compensate large dispersion of the leakage current and ensure acceptable sharing of the total dc bus voltage among the series-connected capacitors, a passive balancing circuit is often used. Drawbacks of the ordinary passive balancing circuit, such as size, significant losses, and standby consumption are discussed in this paper. An active loss-free balancing circuit, which utilizes an auxiliary switch-mode power supply (SMPS) to equalize the capacitor voltages, is proposed. The capacitors midpoint (MP) is connected to the SMPS via two devices; namely a current injection device and a compensation device. The current injection device injects current into the capacitors MP, while the compensation device sinks the difference between the capacitor leakage currents and the injected current. As a result, the capacitor voltages are controlled and maintained in the desired ratio. The proposed balancing technique is theoretically analyzed and experimentally verified on a laboratory setup. The results are presented and discussed.      

A Bidirectional DC–DC Converter for an Energy Storage System With Galvanic Isolation

This paper addresses a bidirectional dc-dc converter suitable for an energy storage system with an additional function of galvanic isolation. An energy storage device such as an electric double layer capacitor is directly connected to a dc side of the dc-dc converter without any chopper circuit. Nevertheless, the dc-dc converter can continue operating when the voltage across the energy storage device drops along with its discharge. Theoretical calculation and experimental measurement reveal that power loss and peak current impose limitations on a permissible dc-voltage range. This information may be useful in design of the dc-dc converter. Experimental results verify proper charging and discharging operation obtained from a 200-V, 2.6-kJ laboratory model of the energy storage system. Moreover, the dc-dc converter can charge the capacitor bank from zero to the rated voltage without any external precharging circuit.     

Increasing the Dynamic Range of a Micromechanical Moving-Plate Capacitor

Large electrostatic forces on a micromechanical capacitor plate can be obtained if the capacitor is tuned by using an inductor. Such an LC circuit can be used to control the position of a micromechanical capacitor plate over a large dynamic range. The pull-in phenomenon of capacitor plates does not occur because the LC drive is intrinsically stable. The LC drive can be implemented either by sweeping the frequency or the amplitude of the driving AC voltage. In both cases relatively good linearity can be obtained. It is found that the LC drive can tolerate large parasitic capacitances. Measurements done on a dual capacitive acceleration sensor verify the calculated results. A drive AC voltage rms amplitude of 10% of the DC pull-in voltage deflected the moving plate by about 60% of the nominal gap, limited only by a mechanical stopper.     

Single-Stage AC/DC Converter With Input-Current Dead-Zone Control for Wide Input Voltage Ranges

A single-phase single-stage ac/dc converter with input-current dead-zone control is proposed. It is based on flyback topology operating in discontinuous conduction mode (DCM). The current charging into the link capacitor is controlled according to line changes by adjusting the input-current blocking angle to alleviate an excessive increase of the link voltage. The reduced voltage stress can maintain an almost-constant voltage irrespective of load conditions by operating in dc/dc stage in DCM. Experimental results of a 60-W (5-V 12-A output) prototype converter show that the link voltage is limited within 384 V and that the measured power factor is more than 0.91 under universal voltage inputs and entire load conditions. In addition, the maximum efficiency is measured to be about 81% at the rated condition     

时变源作用下介观LC电路系统量子态的演化

采用代数动力学规范变换方法,求出含时变电压源的介观LC电路量子态随时间演化算符的精确解,研究含时变电压源的介观LC电路量子态的相干特性.结果表明,电路中电容器储电量q的几率是一个运动的Gauss波包,导出波包中心电量与外电源的一般关系.研究了输入电压源为单矩形脉冲电压的特例.     

栅极触发PDSOI CMOS闩锁效应研究

测试了不同静态栅极触发电压(输入电压)下诱发CMOS闩锁效应需要的电源电压和输出电压(即将闩锁时的输出电压),发现静态栅极触发CMOS闩锁效应存在触发电流限制和维持电压限制两种闩锁触发限制模式,并且此栅极触发电压.输出电压曲线是动态栅极触发CMOS闩锁效应敏感区域与非敏感区域的分界线.通过改变输出端负载电容,测试出了不同电源电压下CMOS闩锁效应需要的栅极触发电压临界下降沿,并拟合出了0 pF负载电容时的临界下降沿,最终得出了PDSOI CMOS电路存在的CMOS闩锁效应很难通过电学方法测试出来的结论.     

新型电流镜积分红外量子阱探测器读出电路的设计分析

设计了一种偏压可调电流镜积分(Current Mirroring Integration,CMI)红外量子阱探测器焦平面CMOS读出电路。该电路适应根据偏压调节响应波段的量子阱探测器,其中探测器偏压从0.61 V到1.55V范围内可调。由于CMI的电流反馈结构,使得输入阻抗接近0,注入效率达0.99;且积分电容可放在单元电路外,从而可以在一定的单元面积下,增大积分电容,提高了电荷处理能力和动态范围;为提高读出电路的性能,电路加入撇除(Skimming)方式的暗电流抑制电路。采用特许半导体(Chartered)0.35 m标准CMOS工艺对所设计的电路(16×1阵列)进行流片,测试结果表明:在电源电压为3.3V,积分电容为1.25pF时,电荷处理能力达到1.3×107个电子;输出摆幅达到1.76V;功耗为25mW;动态范围为75dB;测试结果显示CMI可应用于高性能FPA。     

Analysis and design of a single-stage single-switch bi-flyback ac/dc converter

An analysis and design of single-stage, single-switch bi-flyback ac/dc converter is presented. The main flyback stage controls the output power from the link capacitor voltage with Discontinuous Conduction Mode (DCM) or Continuous Conduction Mode (CCM) operation, while an auxiliary flyback stage supplies the power to the output directly from ac line input with DCM operation.

This scheme can effectively reduce the voltage stress on the link capacitor and can achieve the power factor correction (PFC) without a dead band at line zero-crossings, which reduces the harmonic distortion in ac line current. Theoretical analysis of the converter is presented and design guidelines to select circuit components are given. The experimental results on a 60?W (15?V, 4?A), 100?kHz ac/dc converter show that maximum link voltage and maximum efficiency are around 415?V and 82%, respectively. The power factor is above 0.96 under universal line input and load conditions.     

一种快速响应低压差线性稳压器的设计

介绍了一种应用于DRAM芯片内部供电的新型低压差线性稳压器(LDO)。在传统LDO电路PMOS输出驱动管的栅端增加了一个开关电容电路,根据负载电流使能信号控制耦合电容的接入,使驱动管的栅端耦合到一个正向或者负向的电压脉冲,在负载电流急剧变化时能快速调整过驱动电压,以适应负载电流的变化。仿真结果显示,该电路有利于输出电压的快速稳定,恢复时间缩短了38%以上。采用45 nm DRAM 掩埋字线工艺进行流片。实测结果显示,该LDO输出电压恢复时间在10 ns以内。在DDR3-1600的数据传输速度下,DRAM芯片的数据输出眼图为280 ps,符合JEDEC标准。     

Capacitance-Voltage measurement method for ultrathin gate dielectrics using LC resonance circuit

The capacitance-voltage (C-V) measurement method using the LC resonance circuit (LC resonance method) for ultrathin gate dielectrics having large leakage current is demonstrated. In the LC resonance method, only an external inductance and a resistance and a simple equivalent electrical circuit of MOS devices are employed. External inductance can be optimized using the equivalent quality factor. At each gate voltage bias point,parameters of MOS equivalent circuit are determined by fitting the calculation results to the measured impedance-frequency characteristics at the resonance frequency point. Total resistance value of MOS equivalent circuit that is determined from the dc gate current-gate voltage characteristics can be a good help in the fitting sequence. The rms error of calculated and measured impedance-frequency characteristics is used for the fitting verification. The sensitivity of rms error to the variation in MOS capacitance value is discussed to determine the accuracy of the LC resonance method. C-V measurements of both thick (EOT=7.0 nm) and thin (EOT=1.2/spl bsol/ nm) gate dielectrics are demonstrated and the electrical oxide thickness (EOT) values are extracted from the C-V characteristics. Comparison between the LC resonance method and the other C-V measurement methods is also made with respect to C-V measurement results to show the good applicability of the LC resonance method.     

Measurements of leakage currents and the capacitance of the storagecapacitor in a single DRAM cell

Methods of measuring leakage currents and the capacitance of the storage capacitor in a single DRAM cell have been developed for correlation with the electrode shape of the capacitor. In the circuit used for these measurements, the plate electrode of the storage capacitor is connected to the gate of the MOSFET which amplifies the voltage variations of the storage capacitor during the measurements. Here, only a conventional transistor parameter analyzer and a capacitance meter are required for the measurements. For the capacitance measurement, the linear region characteristics of the MOSFET are used to simplify the analysis. For the leakage current measurement, however, the subthreshold region characteristics of the MOSFET are used to enhance the accuracy of the measurement. The results show that the very low leakage currents (down to below 0.1 fA) and the capacitance (37.5 fF) of the storage capacitor can be measured accurately. Further, the leakage current-voltage characteristics of the storage capacitor are discussed by comparing with those of a large area planar capacitor whose structure is the same as the storage capacitor     

A Family of Single-Stage Resonant AC/DC Converters With PFC

A family of novel, single-stage, isolated, resonant-based ac/dc power supply circuits with inherently high power factor is presented in this paper. The three topologies in the family are transformer isolated; they contain a bulk energy storage capacitor to enable output voltage holdup, and they also contain a resonant circuit in which a resonant capacitor is connected directly across the mains input rectifier. The presence of this resonant circuit results in ac line current being drawn over much of the line cycle, as well as in soft switching of the power devices. The rectifier-compensated fundamental-mode approximation (RCFMA) method is used to provide an accurate yet simple analysis of the circuit. Experimental results for closed-loop operation of two of the topologies are also presented. This family of single-stage, high–power-factor converters provides for simple control and high-frequency operation, due to the resonant configuration of the power circuit, without the excessive conduction loss of fully resonant techniques.      

MOPA结构准分子激光电源的高精度电压控制研究

为了减小激光器双腔放电时间的相对抖动、稳定激光器输出能量,采用闭环控制回路电压泄放方法,设计了一套主振荡功率放大结构准分子激光谐振充电高精度电压控制方案。通过对电容电压取样处理,动态监测储能电容电压,当电容电压大于目标电压时,由泄放电路泄放电压至目标值,得到高精度的充电电压,使用此电压控制方案后,充电电压的波动由1.67减小到0.83。结果表明,该方案很好地提高了谐振电源储能电容上的电压精度,减小了激光器双腔放电时间的相对抖动,并为后期的激光器能量输出稳定控制打下良好基础。     

A Minimal Harmonic Controller for a STATCOM

In this paper, a novel controller with fixed modulation index (MI) and variable dc capacitor voltage reference to minimize voltage and current harmonics is presented for a distribution static synchronous compensator (STATCOM). The STATCOM with the proposed controller consists of a three-phase voltage-sourced inverter and a dc capacitor and is used to provide reactive power compensation and regulate ac system bus voltage with minimum harmonics. A systematic design procedure based on pole-zero cancellation, root locus method, and pole assignment method has been developed to determine proper parameters for the current regulator, the dc voltage controller, and the ac voltage controller of the STATCOM. With the proposed STATCOM controller, harmonic distortions in the inverter output current and voltage can be reduced since the MI is held constant at unity in steady state. In addition, a fast adjustment in the STATCOM output reactive power is achieved to regulate the ac bus voltage through the adjustment of the dc voltage reference during the transient period. Simulation and experimental results for the steady-state operating condition and transient operating conditions for the system subjected to a reactive current reference step change, a three-phase line to neutral fault, and a step load change are presented to demonstrate the effectiveness of the proposed controller.     

基于双向半桥DC-DC的超级电容器储能系统仿真研究

引入了双向半桥DC—DC变换器对超级电容器进行充放电的换流方式;阐述了超级电容器在双向半桥DC—DC变换器工作原理;分析了单端稳压和稳压快速充电两种控制策略,并给出了双闭环控制的原理框图;最后搭建了以直流电机为负载的上述两种控制策略下的仿真系统,通过设定电机运行多种工况,完整地考察了超级电容与位能负载间的多种换流情况。仿真结果验证了该变换电路不仅能够实现馈能的完全吸收,还具有较’陕速的放电过程动态响应,且电路简单,易于工程实现,满足了位能型负载下超级电容器储能系统的变换要求。     

一种实现50 ms断电维持供电的电路设计

针对机载28 V直流供电系统50 ms供电中断的情况,基于钽电容储能作用,采用充电电路、储能电容、放电电路的结构,设计了一种50 ms断电维持供电电路。在输入正常时,由充电电路将钽电容充电至高压来存储能量;当输入断电时,由放电电路将钽电容储能尽可能释放给后级DC-DC变换器,从而实现50 ms不间断供电。分析了电容充电浪涌电流和断电维持电压振荡的问题,提出了充电限流和宽滞回电压欠压保护方案。经实验电路测试验证,满足指标要求。     

A novel single-stage full-bridge buck-boost inverter

A novel single-stage full-bridge series-resonant buck-boost inverter (FB-SRBBI) is proposed in this paper. The proposed inverter only includes a full-bridge topology and a LC resonant tank without auxiliary switches. The output voltage of the proposed inverter can be larger or lower than the dc input voltage, depending on the instantaneous duty-cycle. This property is not found in the classical voltage source inverter, which produces an ac output instantaneous voltage always lower than the dc input voltage. The proposed inverter circuit topology provides the main switch for turn-on at ZCS by a resonant tank. The nonlinear control strategy is designed against the input dc perturbation and achieves well dynamic regulation. An average approach is employed to analyze the system. A design example of 500 W dc/ac inverter is examined to assess the inverter performance and it provides high power efficiency above 90% under the rated power.     

New stack capacitor for dynamic data storage in polysilicon activematrix arrays

A stack capacitor for dynamic circuits employing self-aligned polysilicon thin-film transistors (TFTs) is proposed. Through circuit layout without deviation in processing, a thin-oxide capacitor can be fabricated directly underneath the conventional planar thick-oxide capacitor to form a sandwiched stack capacitor. Due to the addition of the thin-oxide capacitor with high unit capacitance, significant savings in chip area can be achieved. The stack capacitor structure has been successfully demonstrated in polysilicon linear arrays for printer applications. Improved data retention and decreased feedthrough voltage, characteristic of higher storage capacitance, are demonstrated     

Voltage-source active power filter based on multilevel converter and ultracapacitor DC link

A new topology for active power filters (APF) using an 81-level converter is analyzed. Each phase of the converter is composed of four three-state converters, all of them connected to the same capacitor dc link voltage and their output connected in series through output transformers. The main advantages of this kind of converter are the negligible harmonic distortion obtained and the very low switching frequency operation. The single-phase equivalent circuit is analyzed and their governing equations derived. The dc link voltage control, based on manipulating the converter's voltage phase, is analyzed together with the circuit's characteristics that determine the capability to draw or deliver active and reactive current. Simulation results for this application are compared with conventional pulsewidth-modulated (PWM) converters, showing that this filter can compensate load current harmonics, keeping better-quality sinusoidal currents from the source. The simulated configuration uses a 1-F ultracapacitor in the dc link, making it possible to store energy and deliver it during short voltage dips. This is achieved by applying a modulation control to maintain a stable ac voltage during dc voltage drops. A prototype of the filter was implemented and tested, and the obtained current waveforms showed to be as good as expected.     

EL characteristics of a TFEL/TFT stacked structure display devicedriven by a HV-Si·TFT circuit

TFEL/TFT stacked structure display devices were fabricated onto a quartz substrate. By using a HV-TFT circuit as the basis of a TFEL/TFT device, an EL device on the TFT circuit can be switched at a sufficiently low signal line voltage of V_s=2-3 V. The maximum brightness of the TFEL/TFT device is 230 cd/m² and the ON/OFF brightness ratio is more than 90 between Vs=0 and Vs=4 V at a V_app frequency of 5 kHz and a voltage of 50. Evaluation of the dynamic behavior of TFT circuits using multichannel HV-Si·TFT's showed that the rise time of the fundamental TFT circuit at the EL driving point of the circuit was about 20 μs and that the hold time of the circuit was about 70 mS. The rise time and the fall time of the luminescence were each about 20 μs. The memory characteristics of the TFEL/TFT device showed that the hold time of the luminescence was about 40 mS. These dynamic characteristics of the TFEL/TFT stacked structure device satisfy the conditions required for a flat panel display