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1.
Cobalt silicide films have been prepared by rapid thermal annealing of cobalt layers sputter deposited on silicon substrates. We report on the evolution of silicide phases, surface and interface roughness as a function of the annealing temperature and silicon surface preparation. The characterizations are carried out by atomic force microscopy, X-ray diffraction, X-ray reflectivity, Raman spectroscopy, and transmission electron microscopy. The cleaning procedure of the silicon substrate affects the interface roughness and the silicide thickness, whereas little effects are found on the surface. On the other hand, surface roughness increases with annealing temperature.  相似文献   

2.
The tradeoffs involved in alternative processes for the formation of ultra shallow junctions are described. Low energy implantation, preamorphization to eliminate channeling and low thermal budget processing are adequate to form junctions that are 0.1 to 0.3μm deep. For junctions less than about 100 nm, however, the enhanced diffusion resulting from the amorphization implant reduces its benefits. Athermal diffusion can result in considerable junction motion even when low thermal budget processing is used. Junctions this shallow typically require silicide or metal cladding to reduce the sheet resistance; however, the dopant redistribution associated with siliciding pre-existing junctions increases the contact resistance which diminishes the potential benefit of silicidation. In addition, high leakage can result from excessive silicon consumption. While the use of silicide as a diffusion source can overcome some of the limitations of silicided junctions, this technique can be especially hindered by slow dopant diffusion or compound formation in the silicide and by the limited thermal stability of the silicide. One outstanding issue associated with silicide diffusion sources is understanding the seemingly enhanced diffusivity of dopant in the silicon.  相似文献   

3.
Ultra-shallow p+/n and n+/p junctions were fabricated using SADS (silicide-as-diffusion-source) and ITS (ion-implantation-through-silicide processing) of 45-nm CoSi2 films (3.5 Ω/□) using a low thermal budget. The best junctions of either type were made by moderate 10-s RTA (rapid thermal annealing) at 800°C, where the total junction depth, counting the silicide thickness, is believed to be under 60 nm. Diffusion-limited current predominated down to 50°C in junctions made under these conditions. The initial implantation energy had only a minor effect on the junction leakage, where shallower implants required slightly higher temperatures to form low leakage diodes, resulting in diodes which were somewhat more susceptible to shorting during silicide agglomeration at high temperatures. The ITS scheme, where dopant is implanted slightly beyond the silicide, gives an equally low leakage current. Nevertheless, the ITS scheme gives deeper junctions than the SADS process, and it is difficult to control the position of the ITS junction due to silicide/silicon interface fluctuations  相似文献   

4.
Low-resistivity, uniform molybdenum silicide layers, and shallow p+-n junctions with good electrical characteristics have been formed using ion-beam mixing and rapid thermal annealing (RTA). Detailed reverse leakage current data on RTA annealed diodes, which were formed by implanting BF2+into Si substrates through the molybdenum films deposited on Si, are presented. The process has a great potential for CMOS fabrication with self-aligned silicided source, drain, and gate.  相似文献   

5.
Ternary cobalt-nickel silicide thin films were synthesized by DC magnetron sputtering from an equiatomic cobalt-nickel alloy target. Grazing incidence XRD, Rutherford back scattering, high-resolution cross-sectional TEM analysis and electrical study were carried out to investigate the formation of silicide, stoichiometry, film thickness, depth profile and sheet resistance of as-deposited and post-deposition annealed films. The ternary silicide layer thickness was calculated from RBS simulated data, which was found to vary 20-43 nm for as-deposited and different vacuum annealed films. A minimum value of sheet resistance 2.73 Ω/sq corresponding to a resistivity of ∼8.4 μΩ-cm was obtained for optimized deposition and annealing conditions.  相似文献   

6.
The current-voltage (I-V) characteristics of shallow silicided p +-n and n+-p junctions are presented. In the former the diode behavior was same as in nonsilicided junction, while drastic change in diode I-V was observed in the latter. The formation of Schottky contact was conclusively shown to be the root cause of the modified I-V behavior of n+-p junction in the forward bias region. Poole-Frenkel barrier lowering predominantly influenced the reverse leakage current, masking thereby the effect of Schottky contact. The leakage current in n+-p diodes was higher than in nonsilicided diodes by two orders of magnitude and this is consistent with the formation of Schottky contact via titanium or titanium-silicide penetrating into the p-substrate and generating trap sites. There is no increase in the leakage current and no formation of Schottky contact in case of the p+-n junction. The Schottky contact amounting to less than 0.01% of the total junction area and not amenable for SEM or TEM observation was extracted for the first time by simultaneous characterization of forward and reverse characteristics of silicided n +-p diode  相似文献   

7.
Polysilicon thin-film transistors (TFTs) with island thickness of 20 and 70 nm were fabricated with self-aligned cobalt and nickel silicide contacts to the source and drain. The silicide contacts are shown to reduce the series resistance, which limits the on-current of the device, thus significantly increasing the effective mobility in the 20-nm island devices. The mobilities of 20-nm cobalt and nickel silicided devices are similar to those with 70-nm islands, 31 versus 33 cm2/V-s, whereas the nonsilicided 20-nm devices have a mobility of only 13 cm2/V-s. The island thickness is shown to influence other device parameters affecting active matrix display driver circuit design, such as threshold voltage, leakage current, and subthreshold swing; all these parameters are improved when the island thickness is decreased  相似文献   

8.
One of the crucial issues that must be faced when using titanium silicide in advanced IC structures is the difficulty encountered in transforming the silicide from its high to its low resistivity phase. As gate dimensions are reduced, there is a reduction in the number of nucleation sites available to initiate transformation on laterally and vertically confined films. In this paper we demonstrate a novel technique, using a pulsed excimer laser, to produce thicker silicides over the gate than over the source and drain regions. This is difficult to achieve using conventional thermal processing. The increased thickness of silicide over the gate region assists in alleviating the phase transformation constraints. In this paper, we demonstrate fabrication of low resistivity salicide on gate lengths as small as 0.07 μm. We also demonstrate, through the use of two-dimensional thermal simulations, the use of amorphization as a method for overcoming the barriers to integration of laser thermal processing in conventional MOSFET fabrication  相似文献   

9.
In this paper, the effects of nitrogen coimplantation with boron into p+-poly gate in PMOSFETs on the agglomeration effects of CoSi2 are studied. The thermal stability of CoSi2/poly-Si stacked layers can be significantly improved by using nitrogen implantation. Samples with 40-nm cobalt silicide (CoSi 2) on 210-nm poly-Si implanted by 2×1015/cm 2 N2+ are thermally stable above 950°C for 30 s in N2 ambient. If the dose of nitrogen is increased up to 6×1015/cm2, the sheet resistance of CoSi2 film is not increased at all, and TEM photographs show that the agglomeration of CoSi2 film is completely suppressed  相似文献   

10.
The leakage mechanism in p+/n shallow junctions fabricated using Co silicidation and shallow trench isolation processes has been investigated using transmission electron microscopy (TEM) combined with selective chemical etching. TEM and TSUPREM-4 simulation results show that dopant profiles bend upward near the edge of the active region. The formation of the abnormal profile is attributed to transient enhanced diffusion induced by source/drain implantation. Based on the TEM and simulation results, it is suggested that the shallower junctions formed near the active edge can serve as a source for leakage current in the silicided p+ /n shallow junctions  相似文献   

11.
A technique for forming shallow junctions with low-resistance silicide contacts developed for the use in VLSI with scaled MOSFETs is discussed. The salicide (self-aligned silicide) MOSFET gate and source-drain features self-aligned refractory metal silicide and are isolated from one another even without any insulating spacer on the gate sides. A critical step in such a MOSFET fabrication process is the ion implantation through metal silicidation technique, which includes As+ ion-beam-induced titanium-silicon interface mixing and infrared rapid heat treatment to form simultaneously the n+-p junction and a high-quality TiN covered TiSi2 contact layer  相似文献   

12.
Polyaniline,ZnO and polyaniline/ZnO nanocomposite thin films are coated on glass substrates using the spray pyrolysis technique.The samples are characterized by the XRD,SEM,EDAX,UV-Vis and I-V characteristics. The XRD analyses confirm that the spray-coated polyaniline and ZnO thin films have orthorhombic and hexagonal structures,respectively,and optical bandgap energy decreases from 3.81 to 3.41 eV with the addition of a Zn atom.SEM analysis of the polyaniline/ZnO nanocomposite thin films shows that there is an agglomeration of ZnO particles with uniform distribution in the polyaniline matrix,and the diode characteristics of the polyaniline /ZnO nanocomposite show weak rectification behavior.Parameters such as the ideality factor,reverse saturation current and barrier height are calculated from the I-V characteristics.  相似文献   

13.
Unguarded Schottky-barrier diodes exhibit excessive leakage current in the reverse-current direction. A portion of this excess current has always been attributed to sharp-edge effects. In this paper, the sharp-edge-related excess reverse current is attributed to the additional barrier lowering that is due to the electric-field enhancement present near the diode edges. Mathematical relationships describing the effect of the edge radius on the I-V characteristics of unguarded diodes are developed. These relationships are then used to model an unguarded Schottky-barrier diode. The correlation between the junction radius and the diode characteristics was found to be strong in the reverse-current direction. In the foward direction, the diode characteristics were not greatly affected, and thus the large diode-quality factors of unguarded diodes cannot be attributed to the sharp-edge effect. A comparison is made between the experimental characteristics of Pd2Si/ nSi and VSi2/nSi diodes and those obtained from modeling.  相似文献   

14.
Open volume defects, clearly distinguishable from the isolated Zn-vacancy are observed in hydrothermally grown ZnO after exposure to deuterium gas at elevated temperatures. From a combination of secondary ion mass spectrometry (SIMS), positron annihilation spectroscopy (PAS) and density functional theory (DFT) calculations it is found that as a result of this treatment vacancy clusters consisting of minimum one Zn- and one O-vacancy are formed, in contrast to introduction of isolated O-vacancies. A scenario for the cluster formation is proposed, where Zn- and O-vacancies originate from the bulk of the sample and the sample surface, respectively. A fraction of the vacancy clusters are decorated by Li and/or H and may therefore be indirectly observed by SIMS. The peak in Li-concentration at about 100 nm below the sample surface, as observed by SIMS is in good correspondence with the PAS-results.  相似文献   

15.
Shallow p+-n junctions on the order of 0.1-µm deep have been fabricated using boron-nitride (BN) solid diffusion sources. The process combines the hydrogen-injection method and rapid thermal processing (RTP). Sheet resistivities, in ranges from 50 to 130 Ω/sq with junction depths from 0.1 to 0.19 µm, are possible in this technique. Diode characteristics of 0.11-µm junctions show low reverse leakage current, of the order of 10 nA/cm2, indicating the possibility of this method to form PMOS source-drain contacts.  相似文献   

16.
Transmission electron microscopy (TEM), secondary ion mass spectroscopy (SIMS), and x-ray photoemission spectroscopy (XPS) have been used to investigate the nucleation, growth, and ripening behavior of nickel-disilicide precipitates formed by Ni implantation in an amorphous-Si layer on (100) Si and followed by a two-step annealing treatment. The TEM and XPS results show that amorphous-disilicide precipitates are formed in a depth of ∼21 nm in the amorphous-Si layer when pre-annealed at 380°C for 30 sec. It is also shown that the second-step annealing at temperatures in the range of 450–600°C causes the amorphous precipitates to transform to randomly oriented crystalline ones embedded in the amorphous-Si layer. Annealing above 550°C is shown to induce the crystallization of amorphous Si by solid-phase epitaxial growth (SPEG). It is further shown that, in a prolonged annealing at high temperatures, the disilicide has dissolved and reprecipitated on the Si surface. Based on the roles of the silicide-mediated crystallization (SMC), the dissolution and reprecipitation of silicides, and SPEG, possible mechanisms are given to explain how the surface-disilicide islands are formed during annealing at temperatures of 550–950°C.  相似文献   

17.
Haond  M. Vu  D.-P. Adès  C. 《Electronics letters》1982,18(16):694-695
An imaging furnace equipped with a 6.5 kW Xe arc lamp has been used to anneal 4 in. arsenic-implanted silicon wafers in a single exposure. Electrical and structural investigations have shown complete activation without appreciable diffusion of the impurities, and the regrown layers are defect free for low implant dose (5×1014/cm2, 100 keV); for high implant dose (1015/cm2, 200 keV), however, dislocation loops are observed.  相似文献   

18.
The first stages of Ni silicides have been studied by laser assisted atom probe tomography. The observations were realized on a Ni alloyed with 5% of Pt film on (1 0 0)Si, at room temperature. Without any heating, it has been observed the formation of two phases with distinct compositions: a layer of relatively constant thickness about 2 nm, with a composition close to NiSi and a cluster of Ni2Si. These observations are in accordance with the nucleation followed by lateral growth model deduced from calorimetric measurement of silicides and intermetallics growth. The redistribution of Pt during the first stage of formation of the silicides has also been measured.  相似文献   

19.
The electrical characteristics of ultra-shallow p+/n junctions formed by implanting a 60 keV Ge+ into a TiSi2 layer have been studied. A very low reverse leakage current density (≅0.4 nA/cm2 at -5 V) and a very good forward ideality factor n (≅1.001) were achieved in these ultra-shallow p +/n junctions. From the secondary ion mass spectrometry (SIMS) analysis, the junction depth was measured to be 600 Å and the surface concentration was about 3 times higher than that of the conventional samples  相似文献   

20.
An investigation is made into the possibility of providing low resistance contacts to shallow junction InP devices which do not require sintering and which do not cause device degradation even when subjected to extended annealing at elevated temperatures. We show that the addition of In to Au contacts in amounts that exceed the solid solubility limit lowers the as-fabricated (unsintered) contact resistivityR c to the 10-5 ohm-cm2 range. If the In content is made to correspond exactly to that required to form the intermediate compound Au9ln4, then the contacts so formed are stable, both electrically and metallurgically, even after extended annealing (12 hr) at 400° C. We next consider the contact system Au/Au2P3 which has been shown to exhibit as-fabricatedR c values in the 10-6 ohm-cm2 range, but which fails quickly when heated. We show that the substitution of a refractory metal (W, Ta) for Au preserves the lowR c values while preventing the destructive reactions that would normally take place in this system at high temperatures. We show, finally, thatR c values in the 10 ohm-cm2 range can be achievedwithout sintering by combining the effects of In or Ga additions to Au contacts with the effects of introducing a thin Au2P3 layer at the metal-InP interface.  相似文献   

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