Effects of heavy ion irradiation on ultra-deep-submicron partially-depleted SOI devices

The effects of the physical damages induced by heavy ion irradiation on the performance of partially-depleted SOI devices are experimentally investigated. After heavy ion exposure, different degradation phenomena are observed due to the random strike of heavy ions. A decrease of the saturation current and transconductance, and an enhanced gate-induced drain leakage current are observed, which are mainly attributed to the displacement damages that may be located in the channel, the depletion region of the drain/body junction or the gate-to-drain overlap region. Further, PDSOI devices with and without body contact are compared, which reveals the differences in the threshold voltage shift, the drain-induced barrier lowing effect, the transconductance and the kink effect. The results may provide a guideline for radiation hardened design.     

CMOS／SIMOX和CMOS／BESOI的γ射线辐照特性比较

用薄膜ＳＩＭＯＸ（ＳｅｐａｒａｔｉｏｎｂｙＩＭｐｌａｎｔａｔｉｏｎｏｆＯＸｙｇｅｎ）、厚膜ＢＥＳＯＩ（ｆｆｅｎｄｉｎｇａｎｄＥｔｃｈ－ｂａｃｋＳｉｌｉｃｏｎＯｎＩｎｓｕｌａｔｏｒ）和体硅材料制备了ＣＭＯＳ倒相器电路，并用６０Ｃｏγ射线进行了总剂量辐照试验。在不同偏置条件下，经不同剂量辐照后，分别测量了ＰＭＯＳ、ＮＭＯＳ的亚阈特性曲线，分析了引起ＭＯＳＦＥＴ阈值电压漂移的两种因素（辐照诱生氧化层电荷和新生界面态电荷）。对ＮＭＯＳ／ＳＩＭＯＸ，由于寄生背沟ＭＯＳ结构的影响，经辐照后背沟漏电很快增大，经３００Ｇｙ（Ｓｉ）辐照后器件已失效。而厚膜ＢＥＳＯＩ器件由于顶层硅膜较厚，基本上没有背沟效应，其辐照特性优于体硅器件。最后讨论了提高薄膜ＳＩＭＯＸ器件抗辐照性能的几种措施。     

The Physics of Failure of MIS Devices Under Radiation

Unlike the solar cell and the NPN transistor, the MOS device does not sustain a degradation as the principal effect of exposure to nuclear radiation. Instead, the MOS device undergoes a change of operating region, the change being in the nature of a parallel shift of the characteristic curve of the device, produced by the trapping of radiation-excited holes within the 2000-? insulator and the consequent buildup of a fixed bulk space charge in the insulator. Less significant changes under radiation are variations in the shape of the characteristic curve and increased leakage current. These are genuine degradation effects and are closely analogous to the strong effects of ionizing radiation in planar-passivated junction devices such as bipolar transistors, SCRs, diodes, etc. In the latter cases, the devices are acting as MIS devices and hole trapping in the oxide is again responsible for their degradation. A consideration of the case of simple MIS devices under radiation is thus found helpful in elucidating some other important types of failure under radiation of silicon junction devices.     

Radiation effects on semiconductor devices

The radiation-induced degradation of semiconductor material parameters is reviewed. These results are related to the degradation of semiconductor-device performance. Design techniques for minimizing the radiation-induced degradation are evaluated. Emphasis is placed on the effects of neutron-produced displacement damage on devices and on the effects of ionizing radiation on MOS structures. Transient ionization effects and circuit latchup are considered. The present degree of understanding of radiation effects in silicon devices is summarized.     

Radiation damage effects on bipolar and MOS devices in X-Ray lithography

Radiation damage effects of bipolar and MOS transistors have been investigated using the vacuum ultraviolet (VUV) storage ring of the national synchrotron light source (NSLS). The devices under investigation were exposed to x-ray radiation and electrical measurements were performed to determine the radiation effects on device parameters. It was found for bipolar devices that the current gain is the parameter that is most sensitive to x-ray irradiation. The current gain decreases as the dose increases and the degradation reaches saturation at 1000 mJ/cm². Upon annealing in forming gas at 400° C for 30 min, the current gain recovered its pre-irradiation value and stress test did not show any reliability problem. Bothn-channel andp-channel MOS devices with polysilicon gates were investigated. Host of the relevant device parameters were measured before and after irradiation and after annealing. Upon irradiation the threshold voltage shows the most obvious shift, which was more negative in both cases. However, thep- channel devices experienced a much larger shift than then-channel ones. The transconductance of the devices also experienced a shift.     

Degradation of refresh time in dynamic MOS RAM by irradiation of alpha particles

Alpha particles with sufficiently high energy cause a degradation of the refresh time as well as soft errors in dynamic MOS RAM. Physical defects induced by the radiation damage of alpha particle irradiation increase the generation current of the storage cell. The increasing rate of the generation current by the irradiation was 8.89 × 10^-5pA/alpha.     

The effect of substrate materials on holding time degradation in MOS dynamic RAM

The effect of substrate materials (bulk silicon, p/p⁺epitaxial silicon, and intrinsic gettering silicon) on the holding time degradation of MOS dynamic RAM cells by excess minority carriers emitted from adjacent MOS devices was studied. It is shown that intrinsic gettering silicon has less susceptibility to holding time degradation than p/p⁺epitaxial silicon, and much less than bulk silicon. The degradation mechanism is discussed in connection with the substrate materials.     

Degradation of CMOS image sensors in deep-submicron technology due to γ-irradiation

In this work, radiation induced damage mechanisms in deep submicron technology is resolved using finger gated-diodes (FGDs) as a radiation sensitive tool. It is found that these structures are simple yet efficient structures to resolve radiation induced damage in advanced CMOS processes. The degradation of the CMOS image sensors in deep-submicron technology due to γ-ray irradiation is studied by developing a model for the spectral response of the sensor and also by the dark-signal degradation as a function of STI (shallow-trench isolation) parameters. It is found that threshold shifts in the gate-oxide/silicon interface as well as minority carrier life-time variations in the silicon bulk are minimal. The top-layer material properties and the photodiode Si–SiO₂ interface quality are degraded due to γ-ray irradiation. Results further suggest that p-well passivated structures are inevitable for radiation-hard designs. It was found that high electrical fields in submicron technologies pose a threat to high quality imaging in harsh environments.     

Effects of ionizing radiation on oxidized silicon surfaces and planar devices

This paper examines in detail the effects of high and low energy electron, X-ray, and ultraviolet radiation on oxidized silicon surfaces and planar devices. Two permanent effects of ionizing radiation on oxidized silicon surfaces are distinguished: 1) The buildup of a positive space charge within the oxide, and 2) The creation of fast surface states at the oxide-silicon interface resulting in increased surface recombination velocity. The dependence of these effects on dose and dose rate, on bias applied during irradiation, and on structural parameters is discussed and a theory is presented which accounts for the observed features of the space-charge buildup. This theory involves trapping of holes which are generated within the oxide by the radiation. It is shown that all details of the experimental observations can be accounted for by assuming a high density of hole traps near the oxide-silicon interface which decays rapidly with distance into the oxide. Radiation-induced changes in the characteristics of MOS and junction field-effect transistors, p-n junction diodes, and p-n-p and n-p-n transistors are reported and examined in terms of the above two effects. It is shown that the charge buildup causes shifts in the operating point of MOS transistors, catastrophic increases in the reverse current of p-n junctions, and variations in their breakdown voltage. The increase in fast surface-state density is responsible for the lowering of the transconductance of MOS transistors and, in combination with the space-charge buildup, for the degradation of the current gain in bipolar transistors. It is shown that junction field-effect transistors are relatively insensitive to both effects of ionizing radiation and therefore offer the most promise for use in ionizing radiation environments.     

Effects of electric fields on annealing of radiation damage in MOSFET's

Radiation damage inp-channel MOS devices by 1.5 MeV electrons has been studied by thermal annealing in conjunction with electric fields between the metallic gate and the substrate. Both positive and negative gate biases retard the process of annealing. Annealing with negative gate bias reveals 1) that during thermal annealing the majority of the electrons that recombine with the positive charge in the oxide originate from the conduction band of the silicon, and 2) that during irradiation a great number of ionized electrons that remain in the oxide do not recombine with the holes, but are trapped in weakly bound states. The effect of positive bias on annealing of radiation damage is obscured by the positive charge induced due to positive bias-temperature treatment alone. No effect of drain-to-source potential on annealing has been observed.     

Radiation induced transconductance overshoot in the 130 nm partially-depleted SOI MOSFETs

This paper presents the total ionizing dose (TID) radiation performances of core and input/output (I/O) MOSFETs from 130 nm partially-depleted silicon-on-insulator (PDSOI). Both the core NMOS and PMOS are totally hardened to 1.5 Mrad(Si), while the I/O devices are still sensitive to TID effect. The worst performance degradation is observed in I/O PMOS which is manifested as significant front gate threshold voltage shift and transconductance decrease. Contrary to PMOS, front gate transconductance overshoot is observed in short channel I/O NMOS after irradiation. A radiation induced localized damage model is proposed to explain this anomalous phenomenon. According to this model, the increments of transconductance depend on the extension distance and trapped charge density of the localized damage region in gate oxide. More trapped charge lead to more transconductance increase. These conclusions are also verified by the TCAD simulations. Furthermore, the model presents a way to extract the trapped charge density in the localized damage region.     

Degradation of electron irradiated MOS capacitors

We have investigated the degradation of MOS structure due to high energy electron irradiation as a function of radiation dose and gate bias applied during the irradiation. Devices have been characterized by current–voltage measurements, in order to study charge accumulation also at the gate interface. Three types of oxide charge have been observed: the unstable positive charge, due to trapped holes induced by the electron irradiation; the negative charge in the oxide bulk, deriving from capture of electrons injected during electrical measurements in radiation generated traps; and border traps, at both oxide interfaces.     

Thermal modeling of single event burnout failure in semiconductor power devices

Experimental investigations of single event burnout (SEB) of power devices due to heavy ion impacts have identified the conditions required to produce device failure. A key feature observed in the data is an anomalistic secondary rise in current occurring shortly after the ion strike. To verify these findings including the thermally induced secondary plateau, simulations have been performed on the model single event burnout. The new models include additional thermally dependent electrical components to capture thermally induced physical effects. Through the inclusion of analytic temperature models coupled with the electrical model, the electrical response is predicted with reasonable accuracy. The simulations provide order-of-magnitude estimates as well as prediction of phenomenological features such as the secondary rise in current. This work represents a first attempt to characterize thermal failure of power devices due to heavy ion impacts by including temperature dependent components that until now have not been modeled. The thermal model in the present work produces qualitative agreement with experiments on SEB that have been previously unexplained.     

Single Event Upset rate determination for 65 nm SRAM bit-cell in LEO radiation environments

The degradation of SRAM bit-cells designed in a 65 nm bulk CMOS technology in a Sun-Synchronous Low Earth Orbit (LEO) ionizing radiation environment is analyzed. We propose an inflight SEU rate estimation approach based on a modeled heavy ion cross section as opposed to the standard experimental characterization. Effects of irradiation with estimated LET spectrum in SRAM bit cell, i.e. the location of sensitive regions, its tendency to cause upset, magnitude and duration of transient current as well as voltage pulses were determined. It was found with SEU map that 65 nm SRAM bit-cell can flip even if high LET particle strikes in close proximity of bit-cell outside the SRAM bit-cell area. The SEU sensitive parameters required to predict SEU rate of on-board target device, i.e., 65 nm SRAM were calculated with typical aluminum spot shielding using fully physical mechanism simulation. In order to characterize the robustness of scaled CMOS devices, state of the art simulation tools such as Visual TCAD/Genius, GSEAT/Visual Particle, runSEU, were utilized whereas LEO radiation environment assessment, upset rate prediction was accomplished with the help of OMERE-TRAD software.     

Plasma-charging effects on submicron MOS devices

Plasma-charging damage on gate dielectrics of MOS devices is an important issue because of shrinking dimension, plasma nonuniformity, and effects on high-k gate dielectrics. A comprehensive study of plasma-charging effects on the electrical properties of MOS devices was investigated in this work. Shunt diodes were used to estimate the charging polarity distribution. For high-frequency application, the 1/f noise was found to be a promising index for assessing plasma-charging damage. Gate oxynitride formed by two-step nitridation was demonstrated to have better electrical reliability as compared to the conventional one-step nitridation, especially accompanied by amorphous silicon gate electrode. This improvement could be attributed to the relaxation of interface stress by amorphous silicon gate electrode and the suppression of hydrogen effects by gate oxynitride using two-step nitridation. Plasma-charging damage on Si₃N₄ and Ta₂O₅ gate dielectrics with high dielectric constant was also investigated. For MOS devices with Si₃N₄ film, the leakier characteristic and shorter time to breakdown reveal its inferior reliability. For MOS devices with Ta₂O₅ gate dielectric, the trap-assisted current mechanism makes a thicker physical thickness of Ta₂O₅ film more susceptible to plasma-charging-induced damage. Smaller physical thickness of Ta₂O₅ film in MOS devices is favorable due to the better reliability and comparable plasma-induced electrical degradation     

Improvement of immunity on MeV electron radiation of MOS structures by means of ultra-shallow fluorine implantation

In this study, we present novel method for improvement of immunity on MeV electron radiation of MOS structures by means of ultra-shallow fluorine implantation from r.f. CF₄ plasma. For the purposes of comparison of electrical behavior, MOS capacitors were manufactured. One MeV electron radiation on fabricated MOS devices, was adopted. Obtained results have shown that fluorination of silicon surface results in significant decrease of leakage current as well as uniform distribution of breakdown voltage values. Moreover, capacitance-voltage measurements of MOS structures after fluorine implantation exhibit no frequency dispersion in comparison to reference structures. Presented results demonstrated feasibility of application of ultra-shallow fluorine implantation from r.f. CF₄ plasma in technology for radiation-hard silicon devices.     

Improving the reverse recovery of power mosfet integral diodes by electron irradiation

This paper demonstrates that controlled electron irradiation of silicon power MOSFET devices can be used significantly improve the reverse recovery characteristics of their integral reverse conducting diodes without adversely affecting the MOSFET characteristics. By using 3 MeV electron irradiation at room temperature it was found that the reverse recovery charge in the integral diode could be continuously reduced in a well controlled manner from over 500 nC to less than 100 nC without any significant increase in the forward voltage drop of the integral diode under typical operating peak currents. The reverse recovery time was also observed to decrease from 3 microseconds to less than 200 nsec when the radiation dose was increased from 0 to 16 Megarads. The damage produced in gate oxide of the MOSFET due to the electron radiation damage was found to cause an undersirable decrease in the gate threshold voltage. This resulted in excessive channel leakage current flow in the MOSFET at zero gate bias. It was found that this channel leakage current was substantially reduced by annealling the devices at 140°C without influencing the integral diode reverse recovery speed. Thus, the electron irradiation technique was found to be effective in controlling the integral diode reverse recovery characteristics without any degradation of the power MOSFET characteristics.     

Radiation damage of Ge-on-Si devices

The radiation damage induced by 2-MeV electrons and 70-MeV protons in p⁺n diodes and p-channel MOS transistors, fabricated in epitaxial Ge-on-Si substrates is reported for the first time. For irradiation above 5×10¹⁵ e/cm², it is noted that both the reverse and forward current increase, and that the forward current is lower after irradiation for a forward voltage larger than about 0.5 V. The reason for this might be an increased resistivity of the Ge-on-Si substrate. For p-MOSFETs, for a 1×10¹⁶ e/cm² dose, a slight negative shift of the threshold voltage and a decrease of the drain current for input and output characteristics have been observed. In addition, g_m decreases after irradiation. The degradation of the transistor performance is thought to be due to irradiation-induced positive charges in the high-κ gate dielectric. The induced lattice defects are also mainly responsible for the leakage current increase of the irradiated diodes.     

GaN HEMT器件中子辐照效应实验研究

建立了GaN HEMT器件(氮化镓高电子迁移率晶体管)中子原位测试技术和辐照效应实验方法,开展了GaN HEMT器件脉冲反应堆中子辐照效应实验研究,重点研究了电离辐射和位移损伤对器件性能退化的影响,获取了GaN HEMT中子位移损伤效应敏感参数和效应规律.结果表明,阈值电压、栅极泄漏电流以及漏极电流是中子辐照损伤的敏感...