纳米CMOS电路的单粒子瞬态影响因素研究

进入纳米尺度后,单粒子瞬态(SET)成为高能粒子入射VLSI产生的重要效应,准确、可靠的SET模拟对评估VLSI的可靠性有着重要的影响。以反相器为例,针对脉冲峰值和半高全宽两个指标,研究了电路模拟中影响SET的因素,主要有电流脉冲幅值、脉冲宽度、负载电容、环境温度及器件尺寸。通过对45和65 nm两种技术节点下的电路的仿真,研究了这些因素对SET的影响,并探讨了可能的原因。结果显示,这些因素对SET的影响趋势和程度有很大的差异,且器件尺寸越小,这些因素对SET的影响越显著。通过设置合适的参数,可以实现电路的抗辐射加固。     

NBTI效应导致SET脉冲在产生与传播过程中的展宽

本文研究了负偏置温度不稳定性(NBTI)对单粒子瞬态(SET)脉冲产生与传播过程的影响.研究结果表明:NBTI能够导致SET脉冲在产生与传播的过程中随时间而不断展宽.本文还基于工艺计算机辅助设计模拟软件(TCAD)进行器件模拟,提出了一种在130nm体硅工艺下,计算SET脉冲宽度的解析模型,并结合NBTI阈值电压退化的...     

Negative bias temperature instability induced single event transient pulse narrowing and broadening

The effect of negative bias temperature instability(NBTI) on a single event transient(SET) has been studied in a 130 nm bulk silicon CMOS process based on 3D TCAD device simulations.The investigation shows that NBTI can result in the pulse width and amplitude of SET narrowing when the heavy ion hits the PMOS in the high-input inverter;but NBTI can result in the pulse width and amplitude of SET broadening when the heavy ion hits the NMOS in the low-input inverter.Based on this study,for the first time we ...     

负偏置温度不稳定性导致单粒子瞬态脉冲的压缩与展宽

摘要：本文基于3D TCAD 器件模拟,研究了130nm体硅工艺下,负偏置温度不稳定性（NBTI）对单粒子瞬态（SET）脉冲的影响。研究结果表明：当粒子轰击高输入反相器的PMOS管时,NBTI能够导致所产生的SET脉冲的宽度和幅度随时间不断压缩,当粒子轰击低输入反相器的NMOS管时,NBTI能够导致所产生的SET脉冲的宽度和幅度随时间不断展宽。基于研究结果,本文首次提出：NBTI对粒子轰击NMOS管所产生的SET脉冲的影响已经十分严重,在进行抗辐照加固设计时必须考虑NBTI所造成的影响。     

SET/RESET properties dependence of phase-change memory cell on thickness of phase-change layer

The thermal properties of a phase-change random access memory (PCRAM) cell are dominated by the phase-change recording material. The SET/RESET resistances, the minimum width of the SET/RESET pulse, the threshold voltage and the maximum temperature of PCRAM cells are impacted by the thickness of the phase-change layer. In this paper, a PCRAM cell with different Ge-Sb-Te phase-change layer thickness are fabricated, and the electrical properties of the PCRAM cells are tested. The SET/RESET properties dependence of PCRAM cells on the thickness of the phase-change layer is investigated and compared for the low-power consumption of PCRAM.     

基于互连线延时的SET脉冲宽度评估模型

研究了互连线延时对单粒子瞬态脉冲效应的影响。研究发现,随着互连线长度的增加,瞬态脉冲首先被展宽,在一定距离后,脉冲宽度衰减为零。基于此研究结果,提出了脉冲宽度随互连线长度变化的数学解析模型。在SMIC 130 nm、90 nm CMOS工艺下,采用Spice软件对应用该数学解析模型的多种器件进行验证。结果表明,该数学解析模型的计算值与仿真值误差最大为6.09%,最小为0.37%。该模型提高了单粒子瞬态脉冲宽度的评估准确度,可应用于单粒子瞬态脉冲效应的硬件加速模拟。     

基于保护门的纳米CMOS电路抗单粒子瞬态加固技术研究

随着器件特征尺寸的缩减,单粒子瞬态效应(SET)成为空间辐射环境中先进集成电路可靠性的主要威胁之一。基于保护门,提出了一种抗SET的加固单元。该加固单元不仅可以过滤组合逻辑电路传播的SET脉冲,而且因逻辑门的电气遮掩效应和电气隔离,可对SET脉冲产生衰减作用,进而减弱到达时序电路的SET脉冲。在45 nm工艺节点下,开展了电路的随机SET故障注入仿真分析。结果表明,与其他加固单元相比,所提出的加固单元的功耗时延积(PDP)尽管平均增加了17.42%,但容忍SET的最大脉冲宽度平均提高了113.65%,且时延平均降低了38.24%。     

Improved on-chip self-triggered single-event transient measurement circuit design and applications

Single-event transient (SET) induced soft errors are becoming more and more a threat to the reliability of electronic systems in space. The SET pulse width is an important parameter characterizing the possibility of an SET being latched by a sequential element such as a flip-flop. This paper improves the widely used on-chip self-triggered SET measurement circuit by changing it from a single SET measurement module to a combination of two modules. One module is responsible for measuring narrow SET pulse widths while the other is responsible for measuring modest and wide SET pulse widths. In this way, the range of measurable SET pulse width is increased. Pulsed laser facility is used to simulate single-event transients induced by single-particles. Experimental results demonstrate that the minimum accurately measured SET pulse width is decreased from 166.5 ps to 33.3 ps after adopting the proposed design when compared with the original one. SET pulse width broadening effect was also observed using the measurement system. The broadening factor was measured to be 0.123–0.143 ps/inverter.     

基于四值脉冲参数模型的单粒子瞬态传播机理与软错误率分析方法

随着工艺尺寸的不断缩小,由单粒子瞬态(Single Event Transient, SET)效应引起的软错误已经成为影响宇航用深亚微米VLSI电路可靠性的主要威胁,而SET脉冲的产生和传播也成为电路软错误研究的热点问题。通过研究SET脉冲在逻辑链路中的传播发现:脉冲上升时间和下降时间的差异能够引起输出脉冲宽度的展宽或衰减;脉冲的宽度和幅度可决定其是否会被门的电气效应所屏蔽。该文提出一种四值脉冲参数模型可准确模拟SET脉冲形状,并采用结合查找表和经验公式的方法来模拟SET脉冲在电路中的传播过程。该文提出的四值脉冲参数模型可模拟SET脉冲在传播过程中的展宽和衰减效应,与单参数脉冲模型相比计算精度提高了2.4%。该文应用基于图的故障传播概率算法模拟SET脉冲传播过程中的逻辑屏蔽,可快速计算电路的软错误率。对ISCAS89及ISCAS85电路进行分析的实验结果表明:该方法与HSPICE仿真方法的平均偏差为4.12%,计算速度提升10000倍。该文方法可对大规模集成电路的软错误率进行快速分析。     

Buffer单元单粒子效应及其若干影响因素研究

基于标准0.13μm工艺使用Sentaurus TCAD软件采用3D器件/电路混合模拟方式仿真了buffer单元的单粒子瞬态脉冲。通过改变重离子的入射条件,得到了一系列单粒子瞬态电流脉冲(SET)。分析了LET值、入射位置、电压偏置等重要因素对SET峰值和脉宽的影响。研究发现,混合模式仿真中的上拉补偿管将导致实际电路中SET脉冲的形状发生明显的变化。     

The impact of Miller and coupling effects on single event transient in logical circuits

With feature size scaling down, Miller feedback effects of gate-to-drain capacitance for transistors and coupling effects between interconnects will dramatically affect single event transient (SET) generation and propagation in combinational logic circuits. Two ways of ICs are arranged: linear and “S” types. For pulse width and delay time, SET propagations in two layouts of digital circuits are compared under considering the coupling effects between interconnects. An analytical model is used to describe the impact of Miller and coupling effects on SET propagation. A criterion for SET occurrence in digital circuits with effects of coupling and Miller feedback is presented. The influence of temperature and technology node on SET generation and propagation is analyzed. The results indicate that (1) the existence of these effects will improve the critical charge for SET generation and also reduce the estimated SER, and (2) the way of “S” type is more immune to SET than the scheme of linear.     

Phase-Change Memory Device Using Si-Sb-Te Film for Low Power Operation and Multibit Storage

The switching characteristics of the electrical phase-change memory device using a SiSbTe film were studied. The SiSbTe film has a wider variation of electrical resistivity (up to 10⁷ times) along with crystallization than that of the conventionally used Ge₂Sb₂Te₅ film, and the SiSbTe film crystallizes predominantly into the hexagonal phase in a manner similar to the Sb₂Te₃ phase. The threshold voltage of the device is 5.87 V. The device was successfully operated with a 100 ns–5.5 V pulse for setting and a 20 ns–3 V pulse for resetting. The RESET current is about 1.37 mA, and the programming energies for resetting and setting are about 110 pJ and 60 pJ, respectively. More than 100 cycles were achieved with a RESET/SET resistance ratio higher than 50. In addition, multiple stable resistance stages can be obtained by adjusting the SET pulse, which makes multibit storage per cell possible.     

双极电压比较器LM311电离总剂量与单粒子瞬态协同效应研究

本文研究了高、低电平输出偏置条件下双极电压比较器LM311的电离总剂量（Total Ionizing Dose,TID）—单粒子瞬态（Single Event Transient,SET）的协同效应.实验结果表明,高电平输出偏置条件下累积总剂量后的LM311的SET会受到明显抑制,主要表现为瞬态脉冲宽度减小,SET幅值变小.低电平输出偏置条件下累积总剂量后的LM311的SET有促进作用,主要表现为瞬态脉冲宽度增大,SET幅值变大.与高电平输出偏置条件相比,LM311在低电平输出偏置条件下对SET不敏感.发现TID诱发的界面态陷阱电荷和氧化物陷阱电荷是TID-SET协同抑制效应出现的根本原因.     

低失调电压双极运放的单粒子瞬态特性研究

在Ne、Fe、Kr、Xe、Ta五种重离子入射条件下获得了运放的SET幅值-宽度分布,发现SET脉冲具有宽、窄两种形态。在SET幅值-宽度特性基础上,采用概率密度方法获得了任意SET阈值下散射截面与LET的关系。考虑入射深度与器件敏感区域的匹配,根据产生的电荷量,可对重离子-激光的SET进行关联,以便获得等效重离子的激光能量。激光与重离子的对比试验表明,选取恰当的激光能量,能够反映重离子产生的SET幅值。研究结果为双极模拟集成电路抗SET选型评估及激光试验条件的选取提供了参考。     

Switching characteristics and maximum repetitive frequency ofInGaAsP/InP bistable injection lasers

Switching characteristics of nonuniformly pumped InGaAsP/InP buried-heterostructure bistable lasers are investigated both experimentally and theoretically. The automatic turn-on phenomenon, which is a random process, was observed. For repetitive operation, turn-on delay time and the necessary duration of the switch-off pulse practically limited the maximum repetitive frequency. For switch-on, triggering the saturable absorption region is more effective. For reducing the minimum switch-off pulse width, either higher doping of reverse biasing at the absorption region is recommended. The tradeoff of OFF pulse width with threshold current, and stable operation are discussed. With some improvements in device parameters, bistable operation at a repetitive frequency over 1 GHz is expected     

Single-Event Effects Analysis of a Pulse Width Modulator IC in a DC/DC Converter

Alpha particles, neutrons and laser-beam test results on an integrated pulse width modulation (PWM) controller operating in a DC/DC converter are presented in this paper. The PWM is fabricated on a 600-nm Bi-CMOS technology. Single-Event Transient (SET) derived from a bandgap circuit was amplified by a filter capacitor in the propagation path. Finally, a constant 6-??s SET pulse was observed on PGOOD pin which is a supervisory signal. This glitch caused system resets. Pulsed laser technology was adopted to locate the origin of the SET. 3D TCAD and circuit simulation tools were used to analyze the root cause. System and circuit level hardening approaches to mitigate the SET are also presented.     

980nm大功率垂直腔底发射激光器

报道980nm大功率底发射垂直腔面发射激光器的结构、研制及器件的阈值电流、输出功率和光谱特性．在室温(24℃)下，5A连续电流工作时，出光孔径400μm的器件激射波长为984．1nm，输出功率达到1．42W，是目前所能见到报道中最高的．研究了出光孔径600μm的器件在连续工作时，激射波长、光谱半高宽随注入电流的变化以及在重复频率100Hz，脉冲宽度50—1000μs条件下的输出功率、效率与注入电流的关系．     

A New Analytical Model of SET Latching Probability for Circuits Experiencing Single- or Multiple-Cycle Single-Event Transients

As technology scales down, more single-event transients (SETs) are expected to occur in combinational circuits and thus contribute to the increase of soft error rate (SER). We propose a systematic analysis method to precisely model the SET latching probability. Due to the decreased critical charge and shortened pipeline stage, the SET duration time is likely to exceed one clock cycle. In previous work, the SET latching probability is modeled as a function of SET pulse width, setup and hold times, and clock period for single-cycle SETs. Our analytical model does not only include new dependent parameters such as SET injection location and starting time, but also precisely categorizes the SET latching probabilities for different parameter ranges. The probability of latching multiple-cycle SETs is specifically analyzed in this work to address the increasing ratio of SET pulse width over clock period. We further propose a method that exploits the boundaries of those dependent parameters to accelerate the SER estimation. Simulation results show that the proposed analysis method achieves up to 97% average accuracy, which is applicable for both single- and multiple-cycle SETs. Our case studies on ISCAS’85 benchmark circuits confirm our analysis on the impact of SET injection location and starting time on the SET latching probability. By exploiting our analytical model, we achieve up to 78% simulation time reduction on the process of SET latching probability and SER estimation, compared with Monte-Carlo simulation.     

脉宽及重频对HgCdTe探测器损伤阈值影响分析

为了研究脉宽及重频对HgCdTe探测器损伤阈值影响,采用有限元法对HgCdTe红外探测器进行2维建模,以及激光辐照探测器温度场的仿真,得到了波段内外脉宽从10ns~1000ns的单脉冲激光损伤阈值。由于采用实验测定所有脉宽激光损伤阈值的办法不现实,故通过仿真计算,给出了从ns~μs量级不同激光脉宽的单脉冲探测器损伤阈值公式。结果表明,波段外单脉冲损伤阈值为9MW/cm2~0.9MW/cm2,波段内为150MW/cm2~15MW/cm2,并且探测器单脉冲损伤阈值与激光脉冲宽度呈负指数关系;当采用重频激光辐照探测器时,在相同的重复频率下,因长脉冲激光比窄脉冲宽激的脉冲间隔小,故长脉冲激光辐照时更容易出现温度积累效应,从而出现大面积损伤。这为进一步研究探测器的热应力场热弹性波和激光防护等提供了重要的理论分析依据。     

Modeling and analysis of single-event transients in charge pumps

It has been shown that charge pumps (CPs) dominate single-event transient (SET) responses of phaselocked loops (PLLs). Using a pulse to represent a single event hit on CPs, the SET analysis model is established and the characteristics of SET generation and propagation in PLLs are revealed. An analysis of single event transients in PLLs demonstrates that the settling time of the voltage-controlled oscillators (VCOs) control voltage after a single event strike is strongly dependent on the peak control voltage deviation, the SET pulse width, and the settling time constant. And the peak control voltage disturbance decreases with the SET strength or the filter resistance. Furthermore, the analysis in the proposed PLL model is confirmed by simulation results using MATLAB and HSPICE,respectively.