A model for rapid thermal processing: achieving uniformity throughlamp control

A first-principles approach to the modeling of a rapid thermal processing (RTP) system to obtain temperature uniformity is described. RTP systems are single wafer and typically have a bank of heating lamps which can be individually controlled. Temperature uniformity across a wafer is difficult to obtain in RTP systems. A temperature gradient exists outward from the center of the wafer due to cooling for a uniform heat flux density on the surface of the wafer from the lamps. Experiments have shown that the nonuniform temperature of a wafer in an RTP system can be counteracted by adjusting the relative power of the individual lamps, which alters the heat flux density at the wafer. The model is composed of two components. The first predicts a wafer's temperature profile given the individual lamp powers. The second determines the relative lamp power necessary to achieve uniform temperature everywhere but at the outermost edge of the wafer (cooling at the edge is always present). The model has been verified experimentally by rapid thermal chemical vapor deposition of polycrystalline silicon with a prototype LEISK RTP system. The wafer temperature profile is inferred from the poly-Si thickness. Results showed a temperature uniformity of ±1%, an average absolute temperature variation of 5.5°C, and a worst-case absolute temperature variation of 6.5°C for several wafers processed at different temperatures     

Nonlinear model reduction strategies for rapid thermal processingsystems

We present a systematic method for developing low order nonlinear models from physically based, large scale finite element models of rapid thermal processing (RTP) systems. These low order models are extracted from transient results of a detailed finite element model using the proper orthogonal decomposition (POD) method. Eigenfunctions obtained from the POD method are then used as basis functions in spectral Galerkin expansions of the governing partial differential equations solved by the finite element model to generate the reduced models. Simulation results with the reduced order models demonstrate good agreement with steady state and transient data generated from the finite element model, with an order of magnitude reduction in execution time     

Dedicated thermal emulator for analysis of thermal coupling in many-core processors

This paper discusses the problem of thermal coupling in many-core processors manufactured in non-planar FinFET technologies. Our work focuses on two research goals. Firstly, the results obtained from the thermal simulations allow the investigation of mutual thermal influence between neighboring cores in such processors, what can be used to develop thermal models of such architectures. Secondly, we describe a test integrated circuit designed specifically to mimic the thermal behavior of microprocessors manufactured in various technologies. In particular, this paper describes its design and presents selected simulation results obtained using Green?s function-based thermal software.     

A dynamically reconfigurable interconnect for array processors

Reconfigurability of processor arrays is important due to two reasons (1) to efficiently execute different algorithms and (2) to isolate faulty processors. An array processor that is reconfigurable by the user any number of times to yield a different topology or to isolate faults is envisaged in this paper. The system has a host or controller that broadcasts a command to the interconnect to configure itself into a particular fashion. The interconnect uses static-RAM programming technology and can be programmed to different configurations by sending a different set of bits to the configuration random access memory (RAM) in the interconnect. We present three designs reconfigurable into array, ring, mesh, or Illiac mesh topologies. The first design provides no redundancy or fault tolerance. The second design is capable of graceful degradation by bypassing faulty elements. The third design is capable of graceful degradation by rerouting. The details of the interconnect and the configuration RAM contents for typical configurations are illustrated. It is seen that reconfigurable interconnect results in a highly reconfigurable or polymorphic computer     

Uniformity optimization techniques for rapid thermal processingsystems

This paper presents two efficient robust methods for uniformity optimization of rapid thermal processes. Both of these methods involve the reuse of empirical response surfaces linking zone powers to measured process data created on a baseline system. The first method uses fossilized gain matrices from the baseline system, while the second method involves customization of the baseline response surface for each system. The approaches use the response surfaces for iterative modification of zone powers to reduce the process nonuniformity on successively processed wafers. These methods are applied to the optimization of rapid thermal oxidation processes on several lamp-heated rapid thermal processing systems. Most of the uniformity improvement is obtained with the first two optimization runs; in some instances, the process is optimized to less than 1% 1-sigma nonuniformity with the use of just two wafers. Because the response surfaces from the baseline system can be reused for all similar systems, considerable savings in time and wafers are realized     

Nitrogen implantations for rapid thermal oxinitride layers

Oxidation of nitrogen implanted substrates results in so called silicon-oxinitride layers (Si_xO_yN_z layers) which are dependent on implantation dose and energy always thinner than pure silicon-oxides (SiO₂) produced under the same oxidation conditions. Elastic recoil detection profiles indicate that the implanted nitrogen diffuses out of the substrate into the silicon-oxide layer what improves the electrical quality of these insulators. The Si_xO_yN_z layers show lower Fowler–Nordheim tunnelling currents as well as lower interface state densities (D_it) than the corresponding SiO₂ layers or N₂O–silicon-oxinitride insulators. NH₃–Si_xO_yN_z layers show the lowest D_it values because of H₂-annealing effects but contain fixed charges.     

A physical thermal noise model for SOI MOSFET

The recent progress in SOI technology necessitates an accurate thermal noise model for wide-band SOI analog IC design. In this paper a physical-based thermal noise model is proposed for floating-body SOI MOSFET operated in strong inversion regime and verified by the experimental data. In the model, both the lattice temperature (unique to SOI due to the buried oxide) and the carrier temperature (significant for short-channel device in saturation region) are considered. The model agrees well with the experimental data     

A newly developed rapid uniform thermal cycle test system for electronic components

Electronic components are difficult to heat or cool uniformly and rapidly because of the low heat conduction properties of the materials used in these components. The present study reports a new rapid thermal fatigue test system that circulates a temperature-controlled air shower around test samples to realize both uniform and rapid temperature control. Since the proposed test system allows multi-unit integration of multiple test chambers, the simultaneous evaluation of several samples under various test conditions can be performed efficiently. Based on the results of the temperature profile measured for a practical electronic circuit board, the proposed system is confirmed to enable the target temperature to be approached rapidly while maintaining a uniform temperature distribution. The proposed system shortens the thermal cycle period from 60 min to 12 min while generating the same degree of crack damage and the same fracture mode of solder joints.     

A case for digit serial VLSI signal processors

Digit serial architectures, which have digit serial data transmission combined with digit serial computation, are uniquely suited for the design of VLSI signal processors. The speed disadvantages of digit serial input are overcome if the input is overlapped with the computation—what we refer to as digit pipelining. Digit pipelining allows us to break up long strings of combinatorial logic and, thus, to increase the clock rate of the system while still preserving much of the circuit structure. In general, for a modest increase in hardware (which in VLSI translates to a modest increase in area) digit serial architectures offer the potential of higher throughput than equivalent word parallel architectures. Several designs for various digit serial adders are presented. Then two filter examples are discussed that use the digit serial adders to achieve digit pipelining.     

多核环境中的高效率调试方法

毫无疑问,多核多线程是未来处理器的发展方向.回首处理器的发展历程,并行技术从指令级的超标量发展到线程级的超线程或者并发多线程,再到今天处理器级的多内核,总的趋势都没有改变.     

Lamp configuration design for rapid thermal processing systems

We have studied lamp configuration design for rapid thermal processing (RTP) systems. We considered a configuration consisting of four concentric circular lamp zones, three of them above the wafer and one circumventing the wafer. We propose a method to determine the geometric parameters, the width, height and radius, of the lamp zones so that the configuration designed has the capacity to achieve a uniform temperature on the wafer. The method is based on a necessary and sufficient condition for uniform temperature tracking and analytic expressions of the view factors. A design example is given in which a least square open-loop control law yields good temperature uniformity     

A novel illuminator design in a rapid thermal processor

The instantaneous insertion of an opaque shutter between the lamp arrays and the wafer in a rapid thermal processor can significantly increase the ramp-down rate from 90 to 400°C/s during the cooling period. This shutter can prevent the residual heating of lamp filament as well as the self-heating from the reflector due to the mirror image of the wafer. To compensate for the weak irradiation intensity close to the edge of the linear lamps, a multiplane reflector design is used to increase the uniformity of irradiation intensity in the direction along the linear lamps. The distance between the reflector plane and the linear lamp is designed to be smaller at the edge, as compared to the center, of the linear lamp. Together with two oblique reflectors at the ends of the linear lamps, a typical three-plane reflector design can increase the uniformity by 60% in a typical lamp configuration     

A thermal model for insulated gate bipolar transistor module

A thermal resistor-capacitor (RC) model is introduced for the power insulated gate bipolar transistor (IGBT) modules used in a three-phase inverter. The parameters of the model are extracted from the experimental data for the transient thermal impedance from-junction-to-case Z/sub jc/ and case-to-ambient Z/sub ca/. The accuracy of the RC model is verified by comparing its predictions with those resulting from the three-dimensional finite element method simulation. The parameter extraction algorithm is easy to adapt to other types of power modules in an industrial application environment.     

A lumped transient thermal model for self-heating in MOSFETs

Both static and dynamic effects related to self-heating in MOSFETs (metal-oxide-silicon field effect transistors) are studied in order to construct an adequate compact thermal model. An available 2D electrical device simulator in addition to a simple 2D finite difference code for the heat equation are used as analysis tools. These tools are used both to justify the proposed model topology as well as to extract model parameters. Both static and dynamic effects predicted by the model are compared with existing experimental results.     

A survey of multicore processors

General-purpose multicore processors are being accepted in all segments of the industry, including signal processing and embedded space, as the need for more performance and general-purpose programmability has grown. Parallel processing increases performance by adding more parallel resources while maintaining manageable power characteristics. The implementations of multicore processors are numerous and diverse. Designs range from conventional multiprocessor machines to designs that consist of a "sea" of programmable arithmetic logic units (ALUs). In this article, we cover some of the attributes common to all multicore processor implementations and illustrate these attributes with current and future commercial multicore designs. The characteristics we focus on are application domain, power/performance, processing elements, memory system, and accelerators/integrated peripherals.     

A new microwave device for rapid thermal fixation of the murine brain.

A microwave applicator was developed to provide rapid thermal fixation of enzymes in the murine brain. Although the power output of the device is only 1.3 kW, whole-brain levels of acetyicholine after microwave fixation are comparable to those observed at a power output of 5 kW, and are markedly higher than those obtained by a conventional method (freezing) of fixation.     

网络处理器并行性能模型及多线程停顿特性

对影响多处理器与多线程的网络处理器性能因素进行分析,提出了网络处理器并行性能模型NP3M,给出了影响其性能的主要原因,并对多线程并行数目与处理单元并行以及网络处理器整体系统性能之间的关系进行了研究与实际测试,对NP3M模型进行了验证,并给出了相关的结论。     

A gas discharge display for compact desk-top word processors

A flat dc-cyclic, gas discharge panel is described that employs a simple three-layer structure with a priming and a display anode in each cell. The priming anodes act in conjunction with phased cathodes to cause sequential breakdown of cells within a group of cell columns and the short-duration, low-current (and, therefore, low-brightness) discharges so formed serve to prime and select which cells will produce longer, high-current (and, therefore, high-brightness) discharges to the display anodes. The design is not limited to the 80-character/line display reported here; it can be extended to longer displays without the duty cycle or brightness being affected.     

Modelling of rapid thermal processing

An overview is given of modelling issues in rapid thermal processing. Firstly, the influence of surface and bulk properties on wafer emissivity is discussed. Secondly, the influence of back-side layers, wafer transparency and back-side roughness on temperature measurement is discussed. Thirdly, several causes of temperature non-uniformity are mentioned.