高速高清CCD自适应相关双采样技术

相关双采样技术被广泛地应用于CCD 视频采集,能够有效地消除复位噪声,白噪声等CCD输出噪声。但是当CCD 工作在高帧频状态下,需要高速的输出数据,由于像素时钟较快会出现采样位置不稳的情况。文中采用自适应相关双采样技术,可以自适应地调整采样脉冲的相位,使相关双采样的两个采样脉位于合理的采样位置,能够正确地采集像素信息。采用自适应调整CCD 相关双采样位置的技术,能使高清高速CCD 在像素频率很高的情况下,也能稳定地工作,输出高质量的图像。     

线阵CCD输出信号相关双取样处理技术探讨

用通用运算放大器构成的用于线阵 CCD 输出信号处理的相关双σ取样电路,其取样速率可达250kHz。电路简单实用。本文着重讨论了有关元器件参数的选取原则,这对于设计高速双σ采样/保持电路有一定参考价值。     

CCD类成像器件的噪声研究

CCD图像传感器的输出信号是空间采样的离散模拟信号,其中夹杂着各种噪声和干扰。对CCD信号进行处理的目的就是在不损失图像细节的前提下,尽可能地消除噪声和干扰,以提高信噪比,获取高质量的图像。为此,必须对CCD的噪声种类和特性有所了解,并针对各种噪声进行相应的去噪处理。所以对CCD成像器件噪声部分的研究,有利于提高CCD成像器件的分辨率,也能提高探测微弱光的能力。     

CCD降噪技术的研究

在简要介绍回顾CCD噪声产生的基础上，总结了几种常用的CCD抑制噪声的方法，并对这些方法的特点，应用场合进行了较为详尽地说明，最后分别给出了各种方法的原理电路以及时序波形。     

几种相关双采样拓扑电路分析

相关双采样法在ＣＣＤ视频信号处理领域中被广泛使用,它不仅能有效地消除ＫＴＣ噪声,而且能够抑制低频噪声和宽带白噪声。文章对双δ法、四δ采样法（ＦＤＡ）、微分平均法、四δ法（ＦＧＡ）、双微分平均法五种相关双采样拓扑结构的电路进行研究,其中重点对双δ法的传输函数和抑制噪声能力进行了计算和分析。     

CCD噪声分析及处理技术

为了提高CCD的工作性能,根据CCD器件的工作原理,对CCD图像的噪声组成进行了较完整的分析,给出了其噪声的详细分类。根据各噪声的特点,提出了相应的噪声处理技术,并针对输出噪声,给出了双相关采样法、双斜积分法、钳住采样法三种相关双采样电路处理方式,使器件的信噪比得以提高。     

基于FPGA大面阵数字CCD相机驱动电路的设计

介绍了大面阵CCD相机的工作时钟产生电路的设计,利用大规模集成电路FPGA实现了该工作时钟驱动电路,采用了VHDL语言对工作时钟驱动电路进行了硬件描述,并利用Modelsim软件对所设计的工作时钟驱动电路进行了仿真,最后进行了硬件电路调试,实现了整个CCD相机的控制.采用SONY公司的ICX285AL作为传感器.     

基于行间转移CCD场输出模式下的成像系统设计

采用SONY行间转移型面阵CCD ICX415AL作为传感器件,设计了一种新型的CCD成像系统.成像系统采用CCD信号专用芯片CXA1310AQ进行信号处理,使输出信号满足模拟信号PAL/CCIR标准,可以采用电视机或者配有视频卡的计算机作为显示终端.针对 ICX415AL的结构和特点,设计了系统的时序电路和驱动电路.CCD工作模式为场输出模式,可以理解为垂直方向的Binning技术.采用相关双采样(CDS)技术滤除了视频信号中的相关噪声,提高了系统的信噪比.整个系统采用现场可编程门阵列作为核心器件,通过自上而下的模块设计完成了CCD驱动时序、数据采集时序控制和视频信号简单处理.     

提高线性CCD测量水平的分析研究

为了提高线性CCD测量系统的测量精度,从影响系统的几个主要方面进行了分析研究,并提出相关的改善措施。除了详细论述了线性CCD传感器、光源成像系统、A/D转换器等器件系统外,还分析研究了信息采集、驱动电路设计方法和图像处理的软件算法。对CCD图像的噪声组成进行了较完整的分析,给出了其噪声的详细分类;根据各噪声的特点,提出了相应的噪声处理技术。     

CCD成像传感器的降噪技术

系统地介绍了CCD成像传感器降噪技术的研究进展.重点介绍和分析了CCD复位噪声降噪技术和非均匀性校正技术的研究进展.特别介绍了用于克服CCD复位噪声的数字域加权双斜积分技术、基于场景的非均匀性校正技术以及多CCD成像系统的非均匀性校正技术.最后展望并讨论了CCD成像传感器降噪技术的发展趋势.     

Parallel correlated double sampling technique for pipelined analogue-to-digital converters

A new correlated double sampling technique that avoids the additional thermal noise penalty is presented. The new technique employs a low- gain two-stage opamp with the second stage made up of multiple gain stages in parallel. The superior noise performance of the proposed technique to correlated double sampling is shown.     

Correlated double sampling technique for continuous-time filters

A correlated double sampling technique, applicable to continuous-time active-RC filters, is proposed. It provides suppression of DC offset and 1/f noise, and performs gain boosting and level shifting for the opamps used. A biquad lowpass filter is described to demonstrate the application of the technique.     

Area-efficient correlated double sampling scheme with single sampling capacitor for CMOS image sensors

An area-efficient correlated double sampling (CDS) circuit is proposed. In conventional designs, most of the area of CDS circuits is occupied by two large on-chip sampling capacitors. A new CDS scheme is devised using only one sampling capacitor. The proposed CDS circuit has been successfully realised in a small two column pitch of 7.2 /spl mu/m in a test chip fabricated using 0.18 /spl mu/m CMOS process and has demonstrated fixed pattern noise less than 0.46%.     

基于非局部均值的自适应采样

提出一种基于非局部均值(NL-Means)的自适应采样方法,在使用非局部均值对图像进行去噪时,使用双缓冲区来存储图像,消除滤波系数和噪声之间的相关性。利用两个缓冲区之间的差值构建出一个权值地图,作为自适应采样的依据,从而使得合成图像时能够有针对性的进行采样,最终优化直接光照的绘制效果,提高其绘制效率。实验结果表明,该方法优于香农熵等经典方法。     

Drift reduction in ion-sensitive FETs using correlated double sampling

A discrete-time technique, correlated double sampling (CDS), as a method to reduce drift during ion-sensitive field effect transistor (ISFET) operation is presented. The CDS technique exploits switched capacitors to resolve low-frequency signal errors such as drift and 1/f noise, which are generated by an ISFET and its readout. In conjunction with post-processing, experimental results confirm drift reduction using this technique.     

Cyclostationarity-based model for noise analysis of charge amplification with correlated double sampling

A lossless floating inductance has been simulated using two differential voltage current conveyors, two resistors and one grounded capacitor. The proposed floating inductance needs not component matching condition. Base on the proposed floating inductance as building block, a new voltage-mode universal biquadratic filter with one input and five outputs can be obtained. The proposed universal biquad uses two differential voltage current conveyors, three resistors and two grounded capacitors. All standard filter functions; highpass, bandpass, lowpass, notch and allpass can be obtained, simultaneously, without changing the passive elements. The proposed universal biquad has the features of using only grounded capacitors and orthogonal controllable of resonance angular frequency and quality factor.     

基于线阵CCD 的高速光刻检焦技术

随着光学投影光刻分辨力的提高,投影物镜的焦深在逐渐缩短。为充分利用物镜有限的焦深,一般采用调焦技术来调整硅片位置。作为调焦的关键,检焦技术的研究尤为热门。现有的检焦方法多采用四象限探测器或者面阵CCD采集携带有硅片离焦量信息的光强信号,并在计算机上进行图像处理完成检焦。该方法处理速度慢,难以满足实时调焦的要求。鉴于此,提出了一种用线阵CCD采集图像,以FPGA为处理器的检焦方法。该方法利用线阵CCD的高速性和FPGA的并行性,结合多项式插值的亚像素边缘检测算法,能够高速实时检测硅片离焦量;同时, FPGA通过驱动电机控制工件台运动对离焦量进行补偿,形成一个实时闭环的调焦系统,减少了原有的计算机环节,具有高速度、高分辨率、低功耗、低成本的特点。     

大幅度CCD输出信号降噪的相关双取样电路

电荷耦合器件(CCD)的输出信号构成复杂,包含有典型的KTC、1/f等类型的噪声,需要进行专门处理后才能获得与入射光信号相对应的高信噪比信号。文章针对具有较大幅度的CCD输出信号,采用宽电压工作的独立运放满足幅度较大的信号处理要求;通过在同一个运算放大器上实现噪声保持及信号采样的形式,消除了不同通道增益差异对信号的影响,获得了较高线性度的信号处理效果;同时结合CCD驱动器的设计,获取相关双取样技术所需的采样及保持脉冲信号,增强了采样与CCD输出信号间的关联程度,从而进一步提高了相关双取样技术消除CCD噪声的效果。采用这种信号处理电路后,将原来噪声处理的水平从约22 mV提高到了约1 mV,并且在一种精密的位移测量系统中得到应用,最后就具体电路设计的难点及注意事项进行了阐述。     

Adaptive sampling for compressed sensing based image compression

The compressed sensing (CS) theory has been successfully applied to image compression in the past few years as most image signals are sparse in a certain domain. In this paper, we focus on how to improve the sampling efficiency for CS-based image compression by using our proposed adaptive sampling mechanism on the block-based CS (BCS), especially the reweighted one. To achieve this goal, two solutions are developed at the sampling side and reconstruction side, respectively. The proposed sampling mechanism allocates the CS-measurements to image blocks according to the statistical information of each block so as to sample the image more efficiently. A generic allocation algorithm is developed to help assign CS-measurements and several allocation factors derived in the transform domain are used to control the overall allocation in both solutions. Experimental results demonstrate that our adaptive sampling scheme offers a very significant quality improvement as compared with traditional non-adaptive ones.