12-kV p-Channel IGBTs With Low On-Resistance in 4H-SiC

SiC bipolar devices are favored over SiC unipolar devices for applications requiring breakdown voltage in excess of 10 kV. We have designed and fabricated p-channel insulated-gate bipolar transistors (IGBTs) in 4H-SiC with 12-kV blocking voltage for high-power applications. A differential on-resistance of 18.6 $hbox{m}Omegacdothbox{cm}^{2}$ was achieved with a gate bias of 16 V, corresponding to a forward voltage drop of 5.3 V at 100 $ hbox{A/cm}^{2}$, indicating strong conductivity modulation in the p-type drift region. A moderately doped current enhancement layer grown on the lightly doped drift layer effectively reduces the JFET resistance while maintaining a high carrier lifetime for conductivity modulation. The p-channel IGBT (p-IGBT) exhibits a transconductance that is $hbox{3}times$ higher than that of the 12-kV n-channel SiC IGBTs. An inductive switching test was done at 1.5 kV and 0.55 A $(sim !!hbox{140} hbox{A/cm}^{2})$ for the p-IGBTs, and a turn-on time of 40 ns and a turn-off time of $sim !!hbox{2.8} muhbox{s}$ were measured.      

Fabrication of 2700-V 12-$hbox{m}Omega cdot hbox{cm}^{2}$ Non Ion-Implanted 4H-SiC BJTs With Common-Emitter Current Gain of 50

High-voltage blocking (2.7-kV) implantation-free SiC bipolar junction transistors with low ON-state resistance (12 mOmegaldrcm²) and high common-emitter current gain of 50 have been fabricated. A graded-base doping was implemented to provide a low-resistive ohmic contact to the epitaxial base. This design features a fully depleted base layer close to the breakdown voltage providing an efficient epitaxial JTE without ion implantation. Eliminating all ion implantation steps in this approach is beneficial for avoiding high-temperature dopant activation annealing and for avoiding generation of lifetime-killing defects that reduce the current gain.     

High temperature SiC trench gate p-IGBTs

Various design issues pertaining to SiC-based IGBTs are described. A trench gate, p-channel IGBT was considered the most appropriate structure for fabrication in SiC. The fabrication and characterization of high temperature SiC IGBTs with high current levels are presented. Using optimized emitter processing, 6H-SiC p-IGBTs show a higher current capability than 4H-SiC p-IGBTs because of their lower emitter contact resistance and higher MOS channel mobility. Since IGBTs rely on minority carrier injection, the low bulk mobility parallel to the c-axis in 6H-SiC was not found to severely affect the current carrying capability as compared with 4H-SiC IGBTs in the present design. Measured results of these devices are described from room temperature to the 350-400/spl deg/C temperature range. For both polytypes, the current capability was found to be much larger when their MOS gates were fabricated in the 112~0 crystal direction compared with the 1100 crystal direction. The emitter (p-type) contact anneal was also found to significantly affect the performance of SiC IGBTs. 4H-SiC IGBTs showed a -85 V blocking capability (room temperature) and on-current of 100 mA at 350/spl deg/C. 6H-SiC IGBTs were demonstrated with -400 V blocking capability (at 25/spl deg/C) and 2 A at 400/spl deg/C.     

Fabrication of 4H-SiC n-channel IGBTs with ultra high blocking voltage

Owing to the conductivity modulation of silicon carbide (SiC) bipolar devices,n-channel insulated gate bipolar transistors (n-IGBTs) have a significant advantage over metal oxide semiconductor field effect transistors (MOSFETs) in ultra high voltage (UHV) applications.In this paper,backside grinding and laser annealing process were carried out to fabricate 4H-SiC n-IGBTs.The thickness of a drift layer was 120 μm,which was designed for a blocking voltage of 13 kV.The n-IGBTs carried a collector current density of 24 A/cm2 at a power dissipation of 300 W/cm2 when the gate voltage was 20 V,with a differential specific on-resistance of 140 mΩ·cm2.     

High-Voltage n-Channel IGBTs on Free-Standing 4H-SiC Epilayers

In this paper, we describe a process for fabricating high-voltage n-channel double-diffused metal–oxide–semiconductor insulated gate bipolar transistors (IGBTs) on free-standing 4H silicon carbide (SiC) epilayers. In this process, all critical layers are epitaxially grown in a continuous sequence. The substrate is then removed, and device fabrication takes place on the carbon face of a free-standing epilayer having a total thickness of about 180 $muhbox{m}$. For a drift layer with doping and thickness values capable of blocking 20 kV, the n-channel IGBT carries 27.3- $hbox{A/cm}^{2}$ current at a power dissipation of 300 $ hbox{W/cm}^{2}$, with a differential on-resistance of 177 $hbox{m}Omegacdot hbox{cm}^{2}$. To our knowledge, this is the first detailed report of device fabrication on free-standing SiC epilayers.      

碳化硅功率器件高密度互连技术研究进展

相比于硅,SiC材料因具有宽禁带、高导热率、高击穿电压、高电子饱和漂移速率等优点而在耐高温、耐高压、耐大电流的高频大功率器件中得到了广泛应用。传统的引线键合是功率器件最常用的互连形式之一。然而,引线键合固有的寄生电感和散热问题严重限制了SiC功率器件的性能。文章首先介绍了硅功率器件的低寄生电感和高效冷却互连技术,然后对SiC功率器件互连技术的研究进行了综述。最后,总结了SiC功率器件互连技术面临的挑战。     

Characterization, Modeling, and Application of 10-kV SiC MOSFET

Ten-kilovolt SiC MOSFETs are currently under development by a number of organizations in the United States, with the aim of enabling their applications in high-voltage high-frequency power conversions. The aim of this paper is to obtain the key device characteristics of SiC MOSFETs so that their realistic application prospect can be provided. In particular, the emphasis is on obtaining their losses in various operation conditions from the extensive characterization study and a proposed behavioral SPICE model. Using the validated MOSFET SPICE model, a 20-kHz 370-W dc/dc boost converter based on a 10-kV 4H-SiC DMOSFET and diodes is designed and experimentally demonstrated. In the steady state of the boost converter, the total power loss in the 15.45- $hbox{mm}^{2}$ SiC MOSFET is 23.6 W for the input power of 428 W. The characterization study of the experimental SiC MOSFET and the experiment of the SiC MOSFET-based boost converter indicate that the turn-on losses of SiC MOSFETs are the dominant factors in determining their maximum operation frequency in hard-switched circuits with conventional thermal management. Replacing a 10-kV SiC PiN diode with a 10-kV SiC JBS diode as a boost diode and using a small external gate resistor, the turn-on loss of the SiC MOSFET can be reduced, and the 10-kV 5-A SiC MOSFET-based boost converter is predicted to be capable of a 20-kHz operation with a 5-kV dc output voltage and a 1.25-kW output power by the PSpice simulation with the MOSFET model. The low losses and fast switching speed of 10-kV SiC MOSFETs shown in the characterization study and the preliminary demonstration of the boost converter make them attractive in high-frequency high-voltage power-conversion applications.      

Operation of 4H-SiC high voltage normally-OFF V-JFET in radiation hard conditions: Simulations and experiment

Operation of high-voltage 4H-SiC vertical-JFET in radiation hard environment was investigated by simulation and experiment. Commercial 1700 V normally-OFF SiC JFETs in TO-247 package were irradiated with fast neutrons to fluences of 4.0 × 10¹⁴ cm^− 2 (1 MeV Si equivalent) and the effect of radiation on their characteristics was then thoroughly analyzed. Four degradation mechanisms were identified, of which the most important is the increase of JFETs ON-state resistance due to the mobility degradation and removal of carriers from transistor's light doped channel and drift regions. As a result, the JFET ON-state losses grow and, at fluences higher than 4 × 10¹⁴ cm^− 2, the low doped n-regions are fully compensated and transistor loses its functionality. On the contrary, irradiation slightly improves JFET's switching characteristics. The effect of neutron irradiation on operation of SiC V-JFET in a real application was then investigated on the step-UP 15 V/60 V DC-DC converter where the SiC JFET was used as an active switch. Converter characteristics were analyzed by means of the mixed-mode simulation using the developed 2D model of the neutron irradiated transistor. Results showed that the duty cycle of the PWM regulator is growing due to the increase in the voltage drop on the switching JFET. This effect, which is caused by the abovementioned increase the JFET's ON-state resistance, increases power dissipation and deteriorates converter efficiency. Finally, the effect of neutron irradiation on operation SiC V-JFET in the 850 V/24 V auxiliary flyback switching mode power supply was analyzed. We showed that the growth of the ON-state resistance increases transistor's conduction losses and decreases converter efficiency. Exceeding the fluence of 3.3 × 10¹⁴ cm^− 2 neutrons then causes JFET overheating and subsequent destruction.     

Optimization of on-State and Switching Performances for 15–20-kV 4H-SiC IGBTs

The 4H-SiC p-channel IGBTs designed to block 15 and 20 kV are optimized for minimum loss ( on-state plus switching power) by adjusting the parameters of the $hbox{p}$ JFET region, $ hbox{p}-$ drift layer, and $hbox{p}+$ buffer layer, using 2-D MEDICI simulations. Switching loss exhibits a strong dependence on buffer layer thickness, doping, and lifetime due to their influence on the current tail. In contrast, drift layer lifetime has little effect on the crossover frequency at which the MOSFET and IGBT have equal loss.      

Characterization and Comparison of High Blocking Voltage IGBTs and IEGTs Under Hard- and Soft-Switching Conditions

The market of converters connected to transmission lines continues to require insulated gate bipolar transistors (IGBTs) with higher blocking voltages to reduce the number of IGBTs connected in series in high-voltage converters. To cope with these demands, semiconductor manufactures have developed several technologies. Nowadays, IGBTs up to 6.5-kV blocking voltage and IEGTs up to 4.5-kV blocking voltage are on the market. However, these IGBTs and injection-enhanced gate transistors (IEGTs) still have very high switching losses compared to low-voltage devices, leading to a realistic switching frequency of up to 1 kHz. To reduce switching losses in high-power applications, the auxiliary resonant commutated pole inverter (ARCPI) is a possible alternative. In this paper, switching losses and on-state voltages of NPT-IGBT (3.3 kV-1200 A), FS-IGBT (6.5 kV-600 A), SPT-IGBT (2.5 kV-1200 A, 3.3 kV-1200 A and 6.5 kV-600 A) and IEGT (3.3 kV-1200 A) are measured under hard-switching and zero-voltage switching (ZVS) conditions. The aim of this selection is to evaluate the impact of ZVS on various devices of the same voltage ranges. In addition, the difference in ZVS effects among the devices with various blocking voltage levels is evaluated.     

大功率肖特基SiC二极管热特性研究

基于小电流下肖特基结正向压降的温度特性,建立了温升测量系统。利用该系统对肖特基SiC二极管的瞬态温升进行了测量,结果显示瞬态温升曲线呈阶梯状变化。利用结构函数的方法对瞬态温升曲线进行处理,分析了肖特基SiC二极管在热流传输路径上的热阻构成。研究了三引脚封装的肖特基SiC二极管在相同大功率的条件下,两正极引脚单独使用和并联使用时的热阻特性,结果显示,在两正极引脚并联使用时,其热阻比单独作用时减少一半,这表明三引脚封装的肖特基SiC二极管的两个正极是并联的,并共用一个负极和散热片。     

Silicon carbide high-power devices

In recent years, silicon carbide has received increased attention because of its potential for high-power devices. The unique material properties of SiC, high electric breakdown field, high saturated electron drift velocity, and high thermal conductivity are what give this material its tremendous potential in the power device arena. 4H-SiC Schottky barrier diodes (1400 V) with forward current densities over 700 A/cm² at 2 V have been demonstrated. Packaged SITs have produced 57 W of output power at 500 MHz, SiC UMOSFETs (1200 V) are projected to have 15 times the current density of Si IGBTs (1200 V). Submicron gate length 4H-SiC MESFETs have achieved f_max=32 GHz, f_T=14.0 GHz, and power density=2.8 W/mm @ 1.8 GHz. The performances of a wide variety of SiC devices are compared to that of similar Si and GaAs devices and to theoretically expected results     

Modeling buffer layer IGBTs for circuit simulation

The dynamic behavior of commercially available buffer layer IGBTs is described. It is shown that buffer layer IGBTs become much faster at high voltages than nonbuffer layer IGBTs with similar low voltage characteristics. Because the fall times specified in manufacturers' data sheets do not reflect the voltage dependence of switching speed, a new method of selecting devices for different circuit applications is suggested. A buffer layer IGBT model is developed and implemented into the Saber circuit simulator, and a procedure is developed to extract the model parameters for buffer layer IGBTs. It is shown that the new buffer layer IGBT model can be used to describe the dynamic behavior and power dissipation of buffer layer IGBTs in user-defined application circuits. The results of the buffer layer IGBT model are verified using commercially available IGBTs     

SiC JFET功率特性的仿真与优化

建立了常关型SiC结型场效应晶体管(JFET)功率特性的数值模型,研究了不同的结构和材料参数对器件功率特性的影响。仿真结果显示,沟道层、漂移层等各层的厚度及掺杂浓度对器件的开态电阻和击穿电压都有明显的影响;采用电流增强层可以明显提高器件的功率特性。研究结果表明,对SiC JFET的结构参数进行优化,可以有效提高器件的优值(FOM)。     

1.88-$hbox{m}Omegacdothbox{cm}^{2}$ 1650-V Normally on 4H-SiC TI-VJFET

The SiC trenched-and-implanted vertical junction field-effect transistor (TI-VJFET) is an excellent device for power switching applications, but its on-resistance needs to be further reduced to suppress on-state power loss. In this paper, we used small cell pitch size and high channel/drift layer doping concentration to achieve low on-resistance. Advanced fabrication processes, such as Bosch process trench etching, self-aligned Ni silicide, and self-aligned gate overlay were implemented to support such an aggressive design. Normally on 4H-SiC TI-VJFETs of various channel-opening dimensions have been designed and fabricated based on a 12 $muhbox{m}$, $hbox{1.8}times hbox{10}^{16} hbox{cm}^{-3}$ doped drift layer. Record high performance TI-VJFETs have been achieved and will be reported. Other SiC VJFET structures under active research are reviewed and compared to TI-VJFET. Without the need for epi-regrowth or stringent lithography alignment, TI-VJFET has the advantage of a less demanding fabrication process. In addition, its high current density, adjustable channel width and low gate resistance make TI-VJFET an excellent device for fast power switching applications.      

An experimental and numerical study on the forward biased SOA ofIGBTs

Thermal and electrical destructions of n-ch 600 V punchthrough type IGBTs in F.B.SOA are investigated by experiments and simulations, The cause of the thermal destruction is the thermal disappearance of built-in potential of p-n junction between the n⁺ emitter and the p base of the IGBT integral DMOSFET occurring at the critical temperature of ~650 K. Experiment and simulation results for the critical temperature show a good agreement. The cause of the electrical destruction is impact ionization at the n^- drift/n⁺ buffer junction in addition to the n^- drift/p base junctions. That triggers a positive feedback mechanism of increasing IGBT integral pnp transistor current which causes the device to lose gate controllability. The experimentally obtained critical power dissipation is ~2000 kW/cm². This value is ten times greater than BJTs. It was also found that emitter ballast resistance (EBR) plays an important role in describing the F.B.SOA of IGBTs     

SiC电力电子器件研究现状及新进展

由于硅材料本身的限制,传统硅电力电子器件性能已经接近其极限,碳化硅(SiC)器件的高功率、高效率、耐高温、抗辐照等优势逐渐突显,成为电力电子器件一个新的发展方向.综述了SiC材料、SiC电力电子器件、SiC模块及关键工艺的研究现状,重点从材料、器件结构、制备工艺等方面阐述了SiC二极管、金属氧化物半导体场效应晶体管(MOSFET)、结晶型场效应晶体管(JFET)、双极结型晶体管(BJT)、绝缘栅双极晶体管(IGBT)及模块的研究进展.概述了SiC材料、SiC电力电子器件及模块的商品化情况,最后对SiC材料及器件的发展趋势进行了展望.     

Advanced High-Voltage 4H-SiC Schottky Rectifiers

This paper presents advanced 4H-SiC high-voltage Schottky rectifiers with improved performance when compared to conventional 4H-SiC Schottky rectifiers. Two types of 4H-SiC junction barrier Schottky (JBS) rectifiers have been explored. These rectifiers offer Schottky-like ON-state and fast switching characteristics, while their OFF-state characteristics have a low leakage current similar to that of the PiN junction rectifier. Planar 4H-SiC JBS rectifiers, with more than 1-kV blocking capability and orders of magnitude lower reverse leakage current than that of conventional SiC Schottky rectifiers, have been demonstrated. In addition, a novel device structure, called lateral channel JBS rectifier, was designed and experimentally demonstrated in 4H-SiC with up to 1.5-kV blocking capability and pinlike reverse characteristics.      

Development of 3-D Stack Package Using Silicon Interposer for High-Power Application

Stacking of many functional chips in a 3-D stack package leads to high heat dissipation. Therefore, a new platform technology is required to assemble chips vertically and remove the heat effectively. A 3-D stacked package with silicon interposers was developed to integrate one ASIC and two memory chips in a package. Electrical connections in the silicon interposer were formed by through silicon via. Silicon interposer has much high thermal conductivity than organic interposer, therefore the package thermal resistance is lower. Thermal performances of the 3-D package were analyzed and thermal enhancements like thermal via, thermal bridging were evaluated. The designed package showed 5 times lesser thermal resistance compared to a similar package with organic substrate. An additional silicon heat spreader was designed and attached to the package for high power application. Thermal analysis was performed to optimize package thermal performances and experimental validation was carried out. The designed 3-D stack package is suitable for 20 W application.     

Suitability and optimization of high-voltage IGBTs for series connection with active voltage clamping

The successful series combination of 5.2-kV high-voltage integrated gate bipolar transistors (HV IGBTs) is reported in this paper. The tail current cut-off encountered in punchthrough type HV IGBTs can represent a particularly severe handicap for the full control of the inductive voltage overshoot when connecting two devices in series. Advanced voltage clamping techniques are demonstrated, which can also limit the second voltage spike originating from the tail current cut off. It is shown in this paper, that IGBTs with a carrier lifetime profile localized at the anode side are particularly well suited for this application; the shorter the tail current interval, the lower the turn-off losses can be kept. The discussion focuses on the optimum on-state plasma distribution in punchthrough-type HV IGBTs with respect to series connection of these devices. The most recent trends in the development of HV IGBTs seem to be in line with the conclusions drawn in the discussion. Advanced future HV IGBT concepts may substantially ease the difficulties encountered in the series connection of first generation HV IGBTs as used experimentally in this paper.