Thermally aware performance analysis of single-walled carbon nanotube bundle as VLSI interconnects

A comparative performance analysis in terms of delay, power dissipation, power delay product (PDP), and crosstalk noise between SWCNT bundle interconnects with resistance estimated using conventionally (temperature independent model), and thermally aware model is investigated. The results are also compared with those of currently used copper interconnects at 22 nm technology node. It is observed that, with rise in temperature from 300 to 500 K, SWCNT bundles have a lower delay than that of copper interconnect at different lengths from 100 to \(1000\,\upmu \hbox {m}\) whereas reverse is true for power dissipation. The SPICE simulation results further reveal that for temperature variations ranging from 300 to 500 K, compared to conventional metal (copper) conductors, crosstalk noise voltage levels (positive peaks) in capacitively coupled SWCNT bundle, at the far end of victim line, are significantly low. Moreover, a relative average improvement in delay, power, and PDP using a thermally aware model in comparison with a temperature independent model is about 22.44, 7.59 and 31.96 %, respectively, with length variations from 100 to \(1000\,\upmu \hbox {m}\), whereas for varied tube diameter is about 16.6, 5.6 and 19.72 %, respectively. The average relative improvement in the time duration reduction of victim output, for varied tube diameters, is about 21.7 % by using a thermally-aware model instead of a temperature-independent model of an SWCNT bundle resistance.     

Performance and stability analysis of monolayer single‐walled carbon nanotube interconnects

In this paper, the monolayer single‐walled carbon nanotube (SWCNT) interconnects are modeled and investigated comprehensively. On the basis of the ratio of the resistance–capacitance values between Cu and SWCNT interconnects, it is demonstrated that the monolayer SWCNT interconnect can provide comparable and even better performance than Cu wire at the 19 nm technology node and beyond. Furthermore, the relative stability analysis is carried out for the monolayer SWCNT interconnects by investigating the relative position of the Nyquist diagram with respect to the critical point (−1, 0). It is shown that the relative stability can be improved by increasing the length and decreasing the SWCNT diameter. Meanwhile, the relative stability also can be improved with the technology advancement. Finally, the crosstalk effects are studied on the basis of the tri‐interconnect architecture. As the monolayer SWCNT interconnects possess much smaller capacitance, the signal integrity can be improved, with the peak noise voltage suppressed greatly. Copyright © 2014 John Wiley & Sons, Ltd.     

Temperature dependant crosstalk analysis in coupled single‐walled carbon nanotube (SWCNT) bundle interconnects

The temperature‐dependent, crosstalk‐induced, noise voltage waveform and its frequency spectrum, in capacitive coupled single‐walled carbon nanotube (SWCNT) bundle interconnects, at the far end of victim line, have been analyzed at 22‐nm technology node. A similar analysis is performed for copper interconnects and a comparison is made between the results of these two analyses. The SPICE simulation results reveal that at temperature variations ranging from 300 to 500 K, compared with conventional metal (copper) conductors, crosstalk noise voltage levels in CNT, at the far end of victim line, are significantly low. Simulated results further reveal that, with rise in interconnect temperatures, compared with copper interconnects, coupled interconnects of SWCNT bundle filter more noise frequency components. Based on these comparative results, an improved model for extracting inter‐bundle, real life, coupling capacitances between SWCNT bundles has been proposed. Copyright © 2014 John Wiley & Sons, Ltd.     

Study of minimum fretting for connectors used in automotive applications

For automotive applications, the mechanical behaviour of the contact area under vibration is one of the key factors for connector reliability. Such vibrations on the bulk contact device are typically in the range of 10–2,000 Hz and result in displacements of only a few microns at the contact interface. In the present study, a bench test has been developed to control motions down to 1  $\upmu $ m. The objective is to determine the minimum amplitude for fretting-corrosion degradation based on the evolution of contact resistance and to study the effects of the material, the contact force, the coating, for these low displacement amplitudes. To obtain the limit of the appearance of fretting, a sub-micrometer incrementing displacement amplitude methodology was applied on a high stiffness bench test including a double piezoelectric actuator. It was found that the fretting degradation starts to occur from 2 to 6  $\upmu $ m when the contact force is from 0.5 to 2.5 N with a tin-coated terminal. Moreover, pure copper, tin and nickel have similar amplitude fretting limits while noble metals confirm the absence of fretting up to 10  $\upmu $ m amplitude and for a large number of operations (10 $^{6 }$ cycles). Best fitting of the obtained minimum fretting amplitude data to the Mindlin equation is discussed and improved by a correction factor.     

High‐frequency transmission through metallic single‐walled carbon nanotube interconnects

In this paper, high‐frequency transmission behavior of metallic single‐walled carbon nanotube (SWCNT) interconnects is investigated. The SWCNT is assumed to be lying over a doped Si substrate, in a transmission line configuration. A hybrid approach, combining quantum theory with classical distributed‐element model is utilized to predict dynamical performance of the metallic SWCNT as a nano transmission line. Several aspects of high‐frequency performance of such interconnect, including the effect of SWCNT length and substrate doping level, is studied. A novel modification is proposed to take damping mechanisms effect caused by the imperfect conductance of substrate into account. The results show that the impact of limited conductivity of the substrate determines the dynamical behavior of short SWCNTs; whereas in case of long nanotubes, damping effects that arise from scattering mechanisms are dominant. Copyright © 2009 John Wiley & Sons, Ltd.     

Crosstalk analysis in CNT bundle interconnects for VLSI application

Crosstalk noise voltage levels have been estimated at the far end of a victim line in capacitive coupled single‐walled carbon nanotube (SWCNT) bundle interconnects under the influence of interconnect dimensions. The reported work on crosstalk analysis in SWCNT bundle interconnects to date have assumed the value of coupling capacitance as equivalent to the coupling effect between metal interconnects of same dimensions. In this paper, we propose an improved model to extract inter‐bundle real‐life coupling capacitances to fill that gap. A similar analysis is performed for a copper‐based interconnect, and comparison is made with result obtained for CNT‐based interconnect at 22‐nm technology. SPICE simulation results reveal that the crosstalk noise voltage level at the far end of the victim line in CNT bundles is significantly lower than that in conventional metal (copper) conductors in three different cases, keeping the pitch fixed but varying the value of interconnect spacing and width. © 2014 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Performance analysis of multilayer graphene nanoribbon (MLGNR) interconnects

This paper addresses the impact of interlayer resistance due to c-axis resistivity and contact resistance on performance in terms of delay, power dissipation and power delay product (PDP) of Multi-layer graphene nanoribbon (MLGNR) interconnect. The impact of model parameter i.e. Fermi energy \((\hbox {E}_\mathrm{F})\) on performance of MLGNR is also discussed. A similar analysis is performed for copper interconnect and results are compared with MLGNR at 22 nm technology node. The impact of interlayer resistance on equivalent resistance of MLGNR is critically analyzed. Inductive and capacitive coupling between the adjacent layers are included in this analysis. It is found that the MLGNR with interlayer resistance, compared to copper, gives better performance in terms of delay, power dissipation and PDP with higher value of Fermi energy for semi global to global lengths of interconnect (300–1000 \(\upmu \hbox {m})\) whereas reverse is true for local lengths 100–200 \((\upmu \hbox {m})\). In addition, performance gap between MLGNR with and without interlayer resistance decreases with increase in Fermi energy.     

Modeling of single-wall carbon nanotube interconnects for different process, temperature, and voltage conditions and investigating timing delay

The performance of Single-Wall Carbon Nanotube (SWCNT) based interconnect is investigated in this paper. CNT has become the most promising replacement for Cu based interconnects in future VLSI technologies in the nanometer regime. The process, temperature, and voltage (PTV) dependent equivalent circuit model for CNT based interconnect is developed. The performances of Cu and CNT based interconnects are compared for different ITRS technology nodes. The timing delay is analyzed in CNT based interconnect under different PTV conditions for 32?nm and 16?nm technology nodes. Process variation is modeled by considering the variations in CNT diameter, spacing, and metallic fraction. The delay variation is more than 100?% with process variation whereas with voltage and temperature the delay variations are ±20?% and ±50–60?% from the nominal voltage and room temperature, respectively. The diameter variation of CNT has almost no effect on the timing of SWCNT bundle based interconnects.     

Influence of distance between adjacent tubes on SWCNT bundle interconnect delay and power dissipation

Influence of separation between adjacent tubes of various lengths and tube diameters, on delay and power dissipation in single walled carbon nanotube (SWCNT) bundle interconnect has been analyzed. The results are compared with those of currently used copper interconnects at 22nm technology node. SPICE simulation results reveal that delay increases with an increase in the separation between adjacent tubes for the entire range of length values and tube diameters whereas the reverse is true for power dissipation.     

Demystifying SWCNT-bundle-interconnects inductive behavior through novel modeling

Single Wall Carbon NanoTube (SWCNT) bundles have been recognized as a high promising substitution for current unsuitable interconnects. SWCNT bundle is a good conductor that plays heat piping role, as well. Nevertheless, some issues still exist in electrical modeling of the bundles. In this paper, we have demystified SWCNT bundle inductive behavior, by deriving the analytical and accurate closed-form magnetic inductance model of bundles, for the first time. The new model is suitable for the working frequencies of up to at least 10 GHz. Subsequently, two more fast and still highly accurate models of “Approximate” and “Fast Approximate” are developed through the introduction of the novel discrete rectangle GMD concept. Simulations and inspection through these modeling steps, show that the magnetic inductances of a bundle and of a Cu solid wire are almost equal and do not require new modeling. Finally, a notable fact will be underlined. That is in today’s and near-future’s working frequency and interconnect dimensions, the bundle interconnects will not exhibit inductive behavior, although both kinetic and magnetic inductance type effects are being considered.     

Asymmetric dual-k spacer trigate FinFET for enhanced analog/RF performance

In this paper, we aim to explore the potential benefits of using source side only dual-k spacer (Dual-kS) trigate FinFET structure to improve the analog/RF figure of merit (FOM) for low power operation at 20 nm gate length. It has been observed from the results that Dual-kS (inner spacer high-k) FinFET structure improves the coupling of the gate fringe field to the underlap region towards the source side and results into improvement in transconductance \((g_{m})\) and output conductance \((g_{ds})\). It was also found that drain side only dual-k spacer (Dual-kD) improves the coupling of the gate fringe field to the underlap region towards the drain side which helps to shift away the drain field from gate edge and results into improvement in output conductance \((g_{ds})\) only at the cost of increase in Miller capacitance. A comparative simulation study has been performed on four different device structures namely both side low-k spacers (conventional), both side dual-k spacer (Dual-kB), Dual-kD and Dual-kS structures. From the simulation study, it was found that that Dual-kS structure has potential to improve \(g_{m}\) by \(\sim \)8.7 %, \(g_{ds}\) by \(\sim \)32.24 %, intrinsic gain \((A_{V0})\) by \(\sim \)11.44 %, early voltage \((V_{EA})\) by \(\sim \)47.59 %, maximum oscillation frequency (\(f_{MAX}\)) by \(\sim \)1.7 % and the ratio of gate-source capacitance and gate-drain capacitance \((C_{gs}/C_{gd})\) by \(\sim \)15.27 % with a slight reduction in the value of unity gain cut-off frequency (\(f_{T}\)) by \(\sim \)0.58 % in comparison to the conventional structure at drain current \((I_{ds})\) of \(10\,\upmu \)A/\(\upmu \)m. Furthermore, to reduce the drain field influence on the channel region, we also studied the effect of asymmetric drain extension length on Dual-kS FinFET structure.     

Oxygen permeability, stability and electrochemical behavior of \Pr _{2} {\text{NiO}}_{{4 + \delta }} -based materials

The high-temperature electronic and ionic transport properties, thermal expansion and stability of dense $ \Pr _{2} {\text{NiO}}_{{4 + \delta }} ,\Pr _{2} {\text{Ni}}_{{0.9}} {\text{Fe}}_{{0.1}} {\text{O}}_{{4 + \delta }} $ and $ \Pr _{2} {\text{Ni}}_{{0.8}} {\text{Cu}}_{{0.2}} {\text{O}}_{{4 + \delta }} $ ceramics have been appraised in comparison with K₂NiF₄-type lanthanum nickelate. Under oxidizing conditions, the extensive oxygen uptake at temperatures below 1073–1223 K leads to reversible decomposition of Pr₂NiO₄-based solid solutions into Ruddlesden–Popper type Pr₄Ni₃O₁₀ and praseodymium oxide phases. The substitution of nickel with copper decreases the oxygen content and phase transition temperature, whilst the incorporation of iron cations has opposite effects. Both types of doping tend to decrease stability in reducing atmospheres as estimated from the oxygen partial pressure dependencies of total conductivity and Seebeck coefficient. The steady-state oxygen permeability of $ \Pr _{2} {\text{NiO}}_{{4 + \delta }} $ ceramics at 1173–1223 K, limited by both surface-exchange kinetics and bulk ionic conduction, is similar to that of $ {\text{La}}_{2} {\text{NiO}}_{{4 + \delta }} $ . The phase transformation on cooling results in considerably higher electronic conductivity and oxygen permeation, but is associated also with significant volume changes revealed by dilatometry. At 973–1073 K, porous $ \Pr _{2} {\text{Ni}}_{{0.8}} {\text{Cu}}_{{0.2}} {\text{O}}_{{4 + \delta }} $ electrodes deposited onto lanthanum gallate-based solid electrolyte exhibit lower anodic overpotentials compared to $ {\text{La}}_{2} {\text{Ni}}_{{0.8}} {\text{Cu}}_{{0.2}} {\text{O}}_{{4 + \delta }} $ , whilst cathodic reduction decreases their performance.     

Static and dynamic characteristics of dual gate organic TFT based NAND and NOR circuits

This research paper analyzes the static and dynamic behavior of dual-gate organic thin film transistors (DG-OTFTs) based universal logic gates using the Atlas 2-D numerical device simulator. The electrical characteristics and performance parameters of pentacene based DG-OTFT is evaluated and verified with respect to the reported experimental results. The NAND and NOR logic gate circuits are realized using \(p\) -type designs in diode-load logic (DLL) and zero- \(V_{gs}\) -load logic (ZVLL). The results show that the logic functions in ZVLL configuration outperforms the DLL ones mainly in terms of noise margin, gain and voltage swing; however, there is a trade-off in terms of speed. The ZVLL NAND gate demonstrates an increment of 16 and 32 % in voltage swing and noise margin, respectively in comparison to the DLL one. Besides this, the gain also increases by 1.5 times in ZVLL mode. On the contrary, the DLL configuration demonstrates a significant reduction of 64 % in the propagation delay in comparison to the ZVLL. Similarly, NOR gate shows an increment of 24 and 30 % in voltage swing and noise margin, respectively under ZVLL configuration. However, the propagation delay for DLL NOR configuration is one-fourth of that of its ZVLL counterpart.     

An impact of bias and structure dependent L_\mathrm{SD} variation on the performance of GaN HEMTs based biosensor

In this paper, we discussed the effect of different bias and structures in relation to S-D distance variation on the device electrical and expected biosensing performance. Devices with source to drain length ( \(L_{SD})\) variations from 3.5, 5.0, 8.0, 14.0, 26.0 to \(52~\upmu \) m were simulated at low and high bias voltages. Different structures having gate recess and finger variations were investigated for the complete range of \(L_{SD}\) variations. Small and very large \(L_{SD}\) variations in non-recessed structure showed good values of drain current \((I_{ds})\) and transconductances \((g_{m})\) at different low and high bias voltages respectively. Therefore expected response time and sensitivity could be improved by choosing a proper bias condition for different biosensing \(L_{SD}\) lengths. A gate recess structure showed better \(g_{m}\) values at low bias conditions for all \(L_{SD}\) lengths. However, \(I_{ds}\) degraded for these structures and hence the expected response time. The non-recessed structure variations in terms of number of fingers and gate width did not change the effective trends in \(L_{SD}\) variation.     

Synthesis and properties of SDC powders and ceramics for low temperature SOFC by stearic acid process

Ce_0.8Sm_0.2O_1.9 (SDC) powders were prepared by a novel solution combustion process using molten stearic acid as dispersive medium and reducing agent. The powders prepared with the molar ratio of $ {\text{NO}}^{ - }_{{\text{3}}} $ to stearic acid at 1:1.5 exhibited a narrower distribution in sizes and the average agglomerate size is about 157 nm. The non-agglomerated particles are in the range 10–40 nm. The as-combusted powders prepared by the present method were pure oxides powder with low crystallinity, which exhibited excellent sintering properties, easily achieving high dense SDC ceramics with lager grains (0.85 μm).     

Analysis of a temperature-dependent delay optimization model for GNR interconnects using a wire sizing method

A temperature-dependent delay optimization model for a multilayered graphene nanoribbon (MLGNR) with top contact (TC-GNR), side contact (SC-GNR), and Cu-based nano-interconnects using a wire sizing method was applied to determine the delay for different interconnects widths (11 nm, 16 nm, and 22 nm) and lengths (10 μm, 50 μm, and 100 μm), being the first such model for TC-GNR, SC-GNR, and Cu interconnects applied at three different chip operating temperatures (233 K, 300 K, and 378 K). The results reveal that the SC-GNR requires ~ 3–6× and ~ 2–3× fewer repeaters w.r.t. the TC-GNR or Cu interconnect, and that the SC-GNR and Cu interconnects can achieve ~ 4–5× and ~ 2–2.5× reduction in repeater dimension compared with the TC-GNR interconnect. Meanwhile, the SC-GNR interconnect can achieve 73× less propagation delay w.r.t. the TC-GNR interconnect for interconnect width of 22 nm, interconnect length of 10 μm, and two different chip operating temperatures of 233 K and 300 K. Similarly, the Cu interconnect can achieve 6× less propagation delay w.r.t. the TC-GNR interconnect at interconnect width of 22 nm and 16 nm, interconnect length of 10 μm, and 300 K.     

A novel SOI MESFET by \uppi -shaped gate for improving the driving current

This paper introduces a novel silicon-on-insulator (SOI) metal–semiconductor field-effect transistor (MESFET) with \(\uppi \) -shaped gate with triple workfunction ( \(\uppi \) -SOI MESFET) to improve the DC and radio frequency characteristics. The DC and radio frequency characteristics of the proposed structure are analyzed by 2-D ATLAS international simulator and compared with a conventional SOI MESFET (C-SOI MESFET). The simulated results show that the proposed SOI MESFET has excellent effect on the breakdown voltage and the driving current. The breakdown voltage of the \(\uppi \) -SOI MESFET structure gets 54 % enhancement compared with that of the C-SOI MESFET structure and also the driving current of the \(\uppi \) -SOI MESFET structure gets 66.66 % enhancement compared with that of the C-SOI MESFET structure. Other main characteristics such as maximum output power density, maximum oscillation frequency and maximum available gain have been evaluated and improved in the proposed structure.     

Frequency-temperature compensation mechanism for bismuth based dielectric/PTFE microwave composites

The dielectric property and thermal expansion property of Bi₂O₃-ZnO-Nb₂O₃-based (BZN) ceramics filler reinforced composites have been investigated as a function of temperature range from ?50 to 175 °C. The composites with adjustable temperature coefficient of frequency (τ _f ) and dielectric temperature coefficient ( $ \alpha _{\varepsilon } $ ) are achieved by filling the ceramic filler with different $ \alpha _{\varepsilon } $ into polymer matrix. A series of polytetrafluoroethylene (PTFE) based composites blended with different amount of ceramic filler with different $ \alpha _{\varepsilon } $ have been studied in this paper. The results indicated that with the amount of ceramic filler increasing, both of the relative permittivity and dissipation factor of composites increased. Composite filled with positive $ \alpha _{\varepsilon } $ (245 ppm/°C) BZN ceramic filler (40 vol.%) has low $ \alpha _{\varepsilon } $ (22 ppm/°C), while filled with near-zero $ \alpha _{\varepsilon } $ (10 ppm/°C) BZN ceramic filler (40 vol.%) have low τ _f (?5 ppm/°C).     

Thermoelectric,electronic and structural properties of CuNMn3 cubic antiperovskite

Using first-principles calculations, in this work we report the structural, electronic and, for the first time, thermoelectric properties of CuNMn3 cubic antiperovskite. The structural properties are explored using GGA and \(\hbox {GGA}{+}\hbox {U}\) approximations. Structural optimization shows that the compound is stable in the ferrimagnetic phase, and the electronic properties confirm the metallicity of this compound. At room temperature, high values of the Seebeck coefficient are obtained between \(-\) 0.8 and 0.5 \(\upmu (\hbox {eV})\) chemical potential, whereas outside this region the Seebeck coefficient diminishes. Also, thermal conductivities are minimal in this region of chemical potential; therefore, the material can be used to achieve thermocouples. Thermal conductivity is high for 900 K. The maximum electrical conductivity is obtained at 0.38 \(\upmu (\hbox {eV})\) chemical potential, with a value of \(4.15\times 10^{20}(\Omega ~\hbox {ms})^{-1}\). The figure of merit ZT values obtained are still low, so for thermoelectric applications of the material, it is necessary to improve the figure of merit coefficient by doping the material with a suitable element.     

Effects of the gas flow rate on the ionic conductivity of {\text{CaZr}}_{0.95} {\text{In}}_{0.05} {\text{O}}_{3 - \delta } ceramics

With coarse CaCO₃, nano ZrO₂ and In₂O₃ as raw materials, fine ${\text{CaZr}}_{0.95} {\text{In}}_{0.05} {\text{O}}_{3 - \delta } $ powders were synthesized at 1000°C by an optimized solid-state method. With the powders, ceramics with relative density as high as 98% were successfully fabricated at the temperature as low as 1400°C. The effects of gas flow rate on the conductivity of the ${\text{CaZr}}_{0.95} {\text{In}}_{0.05} {\text{O}}_{3 - \delta } $ ceramics under wet air conditions were first studied. The results showed that with the increase of temperature, the effects became more and more significant. In order to gain insight into the ion transfer mechanism of the electrolyte, the absorption and diffusion processes were analyzed. It was suggested that at lower temperature, the diffusion step was the rate-determining step. However, with the increase of the temperature, the adsorption process became the rate-determining step at lower flow rates.