改进的CMOS电荷灵敏前放噪声优化设计方法

CMOS专用集成电荷灵敏前放的噪声性能对于辐射探测非常关键.提出了一种改进的CMOS电荷灵敏前放低噪声设计方法,通过实例计算得到的噪声结果比现有方法都有不同程度的提高.     

新型低噪声电荷灵敏前置放大器设计

为满足Topmetal-S芯片研制需求,设计了一种低噪声电荷灵敏前置放大器。该电荷灵敏前置放大器在0.35 μm商业标准工艺上完成设计,采用单端折叠共源共栅结构,其等效输入电荷噪声约为56.47 e,电荷转换增益为223.40 mV/fC,上升时间为633.30 ns;开环增益为75.07 dB,线性度在3.70%以内的输入电荷范围为0～6.50 fC。     

一种低噪声快电荷灵敏前置放大器的研制

简要介绍了新型低噪声快电荷灵敏前置放大器。这种电荷灵敏前置放大器采用新的设计方法案，该前放主要采用低噪声场效应晶体管和集成运算放大器构成，其等效输入噪声≤2．2keV。该前放具有电路结构简单、体积小、输出信号上升时间快、噪声低、稳定性好等特点。     

低噪声电荷灵敏前置放大器

本文介绍一种低噪声电荷灵敏前置放大器,零外接电容噪声1.49keV,电容噪声斜率为15eV/pF,外接电容1000pF时上升时间12ns,输出动态范围±10V。     

用于CZT探测器信号读出的低噪声电荷灵敏前放A250

本文测量和分析了电荷灵敏前放A250的电子学噪声对CZT探测器能谱展宽的影响.在成形时间下1 μs下A250的零电容噪声为104.8 e,噪声电容斜率为4.18 e/pF.测得241Am 59.5 kev全能峰能量分辨率为4.08%.     

小型化电荷灵敏前置放大器

为了缩小核辐射悬移质输沙率计的探头尺寸和探测球体范围,使之能测到临近河底的参量,必须采用小型探测器和与之相配合的前置放大器。我们利用高阻抗运算放大器SF357和FC61等制成了小型电荷灵敏放大器,通过长电缆(≤100m)把信号送到二次仪表。此电荷灵敏放大器适于在高计数率下工作,噪声低,稳定性好,体积小,结构简单。     

用于MICROMEGAS的电荷灵敏前放芯片研究

介绍了一种用于MICROMEGAS气体探测器的电荷灵敏前放ASIC设计,重点介绍了电路结构,详细分析了电荷灵敏前放的噪声.针对探测器的应用,实现了一种新型电荷灵敏前置放大芯片MMCSA的设计.MMCSA芯片采用Chartered 0.35μm工艺制作,测得的输入电荷范围为2～ 350 fC,噪声为小于1000 e-.     

四通道低噪声GEM探测器前端读出ASIC设计

介绍了一种用于多层GEM探测器的低噪声前端读出ASIC芯片.针对CEM探测器输出信号特点,设计了电荷灵敏放大器、极零相消电路和准高斯成形电路,并对其噪声指标、成形时间等设计指标等参数进行分析.     

低噪声电荷灵敏前置放大器的噪声分析

本文从基本的噪声模型出发,对自制前置放大器进行定量的噪声分析,并与Pspice仿真和实际测量的结果进行比较.给出等效输出噪声谱、等效噪声电荷、噪声斜率计算的实用公式,供电荷灵敏前置放大器的设计和改进使用.     

基于示波器和数字滤波的电荷灵敏前放噪声测量

本文提出了一种新的电荷灵敏前放的噪声测试方法,利用数字示波器和数字滤波对信号进行采样处理.与传统模拟测量系统相比,该方法具有参数可调,方便高效的优点.试验结果与传统测试结果基本吻合.     

A low noise charge sensitive preamplifier with switch control feedback resistance

In this paper, the design and analysis of a new low noise charge sensitive preamplifier for silicon strip, Si（Li）, CdZnTe and CsI detectors etc. with switch control feedback resistance were described, the entire system to be built using the CMOS transistors. The circuit configuration of the CSP proposed in this paper can be adopted to develop CMOS-based Application Specific Integrated Circuit further for Front End Electronics of read-out system of nuclear physics, particle physics and astrophysics research, etc. This work is an implemented design that we succeed after a simulation to obtain a rise time less than 3ns, the output resistance less than 94Ω and the linearity almost good.     

Design and simulation of charge sensitive preamplifier with CMOS FET implemented as feedback capacitor Cfp

In this paper,to design a new preamplifier for optimum performances with charged-particle or heavy-ion detectors,the CMOS FET is implemented as a feedback capacitor Cfp.so that the entire system should be built only with MOSFET.This work is a revolution design because to realize an ASIC for a preamplifier circuit,the capacitor will also be included.We succeed after a simulation to maintain a rise time less than 3 ns,the output resistance less than 94 Ω and the linearity almost good.     

带增益的气体探测器读出ASIC的研制

设计了用于带增益的气体探测器比如GEM、RPC等读出的ASIC,实现对探测器信号的放大、成形和对后续实时采样ADC的驱动电路.电荷增益和成形时间可调,有利于探测器不同增益下性能的研究,也扩展了芯片的应用范围.由于成形电路引入的噪声变得显著,在低电荷增益下,ENC会随增益下降而增加.芯片采用Chartered 0.35μm2P4M CMOS工艺,论文介绍了芯片的详细设计和仿真结果.     

Application of CMOS charge-sensitive preamplifier in triple-GEM detector

1 Introduction With novel materials and advanced technique of printed circuit board (PCB) and micro-electronics be- ing used in MPGD, over the past two decades, great progress has been made in MPGD[1], and as a new type of MPGD, the GEM[2] detector was developed during the late 1990s. Standard GEM from CERN is a thin, two-side copper-coated Kapton foil, perforated with a high density of holes etched using a photolitho- graphic process. The diameter of these holes is about 70 μm (ext…     

Design and simulation of Gaussian shaping amplifier made only with CMOS FET for FEE of particle detector

The objective of this paper is to design and simulate a shaping amplifier circuit for silicon strip,Si(Li),CdZnTe and CsI detectors,etc.,which can be further integrated the whole system and adopted to develop CMOS-based application,specific integrated circuit for Front End Electronics(FEE) of read-out system of nuclear physics,particle physics and astrophysics research,etc.It's why we used only CMOS transistor to develop the entire system.A Pseudo-Gaussian shaping amplifier made by fourth-order integration stage and a differentiation stage give a result same as a true CR-RC4 filter,we perform shaping time in the range,465 ns to 2.76μs with a low output resistance and the linearity almost good.     

PMT信号前端读出ASIC设计

主要介绍了针对PMT信号模拟前端读出ASIC的设计.设计采用了Chartered 0.35μm2P4MCOMS工艺,整个芯片集成了5个通道,每个通道包括电压前置放大器和快、慢成形(RC-CR -RC)电路,分别实现慢成形模拟波形输出和快成形后trigger输出.设计主要针对空间暗物质探测实验(HEGARD)[1],前放...