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《Microelectronics Reliability》2014,54(6-7):1299-1306
Advances in nano-electronics VLSI manufacturing technology and the rapid downscaling of the size of logic circuits have made them more prone to errors. This has led to the need for fast circuit reliability evaluation of large logic circuits. In this paper a new method for reliability analysis of VLSI logic circuits based on a modified form of Mason’s rule is proposed. Utilizing matrix sparsity significantly increases the speed and reduces the required memory of the proposed approach. In addition, an approach is introduced to mitigate the effect of reconvergent paths. Simulation results indicate that the proposed method is scalable and runs 4× faster than previously proposed schemes.  相似文献   

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This paper proposes a unified control strategy of position and force. The authors' technique is based on impedance control with fuzzy logic and realizes the smooth shift from position control to force control and vice versa. At first, a robust impedance controller based on a disturbance observer is shown, and the method to unify the position and the force control through one controller is described. Next, an algorithm to estimate the dynamic characteristics of the environment is shown, and a force tracking control using the estimated parameters is proposed. Finally, the unified control algorithm of position and force based on fuzzy logic is established. The validity of this method is confirmed by several experimental results  相似文献   

5.
Two coupled-mode theories based on individual waveguide modes and compound system modes, respectively, are briefly reviewed with proper modification and new comments. The relation between these two theories is built and it is found that one theory is actually an efficient approximation of the other. Also, the reason why the results obtained with the first more accurate than those obtained with the second is found. The constraint on both approaches is shown  相似文献   

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A generalized approach for the steady-state analysis of resonant converters is presented. Different resonant converter tank circuit configurations are combined into a single tank circuit referred to as a generalized tank circuit. The load presented to this tank circuit is represented by an AC equivalent resistance, and simple complex circuit analysis is used to analyze such a generalized tank circuit. This type of unified approach simplifies the method of analysis for different configurations and eliminates the need for analysis of different schemes separately. In addition, in a computer program, the results for a particular scheme can be obtained by opening or shorting the nonrequired tank circuit components of the generalized scheme. The effect of high-frequency transformers and other parasitics can be taken into account in the analysis. A design example is presented to illustrate the method of designing a converter, and experimental results are presented to verify the analysis  相似文献   

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A unified approach for the coupled-mode analysis of nonlinear optical couplers is proposed. This approach is basically an extension of the work of [Haus, vol. 5, p. 16, 1987] to include optical nonlinearity. After the nonlinear coupled-mode theory is established, various basis functions are used as trial fields to derive coupled-mode equations. It is found that two published coupled-mode theories can in fact be deduced from the proposed one with individual linear or nonlinear waveguide modes serving as trial fields, thus making the coupled-mode equations from variational principle and reciprocity theorem equivalent. Coupled-mode equations based on system modes are also presented. Furthermore, analytical and/or numerical methods for solving coupled-mode equations are included. More research and discussion can be conducted based on the knowledge addressed in this paper  相似文献   

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A scenario-based reliability analysis approach for component-based software   总被引:1,自引:0,他引:1  
This paper introduces a reliability model, and a reliability analysis technique for component-based software. The technique is named Scenario-Based Reliability Analysis (SBRA). Using scenarios of component interactions, we construct a probabilistic model named Component-Dependency Graph (CDG). Based on CDG, a reliability analysis algorithm is developed to analyze the reliability of the system as a function of reliabilities of its architectural constituents. An extension of the proposed model and algorithm is also developed for distributed software systems. The proposed approach has the following benefits: 1) It is used to analyze the impact of variations and uncertainties in the reliability of individual components, subsystems, and links between components on the overall reliability estimate of the software system. This is particularly useful when the system is built partially or fully from existing off-the-shelf components; 2) It is suitable for analyzing the reliability of distributed software systems because it incorporates link and delivery channel reliabilities; 3) The technique is used to identify critical components, interfaces, and subsystems; and to investigate the sensitivity of the application reliability to these elements; 4) The approach is applicable early in the development lifecycle, at the architecture level. Early detection of critical architecture elements, those that affect the overall reliability of the system the most, is useful in delegating resources in later development phases.  相似文献   

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A novel method is presented for the exact reliability analysis of combinational logic circuits. A model is developed that allows the logic circuit to be presented by a circuit equivalent graph (CEG). The reliability is analyzed by a systematic searching of certain subgraphs from the CEG. A computer algorithm and an example are given. The method gives the exact solution to the combinational logic circuit reliability-analysis problem. This is achieved by proper gate/circuit modeling, which allows the enumeration of all redundant fault vectors in a given circuit. Due to the concept of dominance among fault vectors, the number of necessary enumerations is appreciably reduced, and thus circuits with a few tens of gates can be efficiently analyzed  相似文献   

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A deeper insight into the problem of reliability analysis for combinational logic circuits is presented. Reliability is defined as the probability that the logic circuit correctly processes a given set of inputs. While the straightforward approach to this evaluation requires a formidable amount of computations, the presented approach is fast, easy to implement, memory efficient and applicable to circuits of any size and complexity. This is due to a new concept for logic circuit modelling, which allows the covering of all possible faults in a circuit by a relatively small number of sets of logically equivalent faults.For modelling purposes the excitations of inputs and the states of terminals in logic gates are presented in the form of a state vector. The logically equivalent state vectors are merged to form highest-order cubes which are mapped onto a gate equivalent graph (GEG). According to the connections among gates in the logic circuit this graphical model is extended to the circuit equivalent graph (CEG), which comprises the highest-order cubes for a circuit in the form of appropriate subgraphs, the so called state graphs (SGs).  相似文献   

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A unified approach to short-time Fourier analysis and synthesis   总被引:3,自引:0,他引:3  
Two distinct methods for synthesizing a signal from its short-time Fourier transform have previously been proposed. We call these methods the filter-bank summation (FBS) method and the overlap add (OLA) method. Each of these synthesis techniques has unique advantages and disadvantages in various applications due to the way in which the signal is reconstructed. In this paper we unify the ideas behind the two synthesis techniques and discuss the similarities and differences between these methods. In particular, we explicitly show the effects of modifications made to the short-time transform (both fixed and time-varying modifications are considered) on the resulting signal and discuss applications where each of the techniques would be most useful The interesting case of nonlinear modifications (possibly signal dependent) to the short-time Fourier transform is also discussed. Finally it is shown that a formal duality exists between the two synthesis methods based on the properties of the window used for obtaining the short-time Fourier transform.  相似文献   

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We demonstrate here for the first time that it is possible by a bottom-up approach to build transistor- and gate-level models with enough accuracy to allow direct comparison with experimental degradations at system-level. This work opens new ways to optimize high level digital systems with respect to aging with great accuracy.  相似文献   

13.
We discuss unified performance and reliability analysis of a system which operates in a critical environment, in the sense that a catastrophic condition is reached when the accumulated down time exceeds a given threshold. Assuming that the system must process a task with a specified work requirement, we evaluate the probability that the task will be completed at a given time before the system reaches the catastrophic state.We show that several other important measures (like the distribution of the lifetime, the distribution of the interval availability, and the instantaneous availability) can be derived from the knowledge of the distribution of the completion time. A numerical example, based on the use of Phase (PH) type distributed random variables, concludes the paper.  相似文献   

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The primary trade-off in a large computer-communication network (CCN) is the balance between computation processing capability and communication capability. Essentially, a CCN model should utilize operational optimization (rather than mathematical optimization) allowing the user (mostly a non-programme network expert) to call upon his experience and insight in dealing with real-life networks to decide upon proper direction for modifications. We propose, in this paper, a unified approach which will hopefully allow an on-line user to make real-time modifications to CCNs to obtain operationally optimal system trade-offs in such areas as network overall reliability, communication response, computation response, and optimum channel capacities etc.  相似文献   

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Probabilistic reliability analysis is a common approach in logic circuit reliability analysis. Existing methods suffer from accuracy or scalability problems for large circuits because of combinatorial explosion. In this work we show how the use of conditional probabilities can overcome scalability problems while maintaining accurate reliability estimation. The source of accuracy and scalability problems in these approaches is the presence of reconverging signals. An efficient use of conditional probabilities used to decorrelate signals allows for fast and accurate reliability analysis.  相似文献   

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A unified approach to coupled-mode phenomena   总被引:1,自引:0,他引:1  
A unified approach is presented for the treatment of various coupled-mode phenomena in two parallel waveguides. This approach is summarized in a set of four coupled equations, which is derived directly from Maxwell's equations. The equations are further simplified when applied to special cases such as evanescent coupling and grating-assisted coupling between parallel waveguides [e.g., reduced to a set of two equations]. In particular, for evanescently coupled waveguides, the equations reduce to the familiar vectorial coupled-mode equations. For grating-assisted waveguides the equations agree with earlier treatments, although, in some cases, may include extra terms which were omitted previously. Considering the special case of perturbations in a single waveguide, the equations in the examples coincide with those given elsewhere in earlier works. The reduction to scalar equations or extension to multiwaveguide systems is straightforward  相似文献   

17.
Estimation of the mobile speed, or equivalently, the maximum Doppler frequency, is of importance in a variety of applications in wireless mobile communications. In this paper, a unified framework for the performance analysis of several major speed estimation techniques is presented, which allows a fair comparison between all the methods, analytically. Interestingly, it is proved that all these methods are equivalent, asymptotically, i.e., for large observation intervals. In addition, we have derived closed-from expressions for the bias and variance of a recently proposed covariance-based method. We have also introduced a new estimator which relies on the average number of maxima of the inphase component, and have calculated its variance, analytically. Our extensive performance analysis, supported by Monte Carlo simulations, have revealed that depending on the channel condition and the observation interval, one needs to use a crossing- or a covariance-based technique, to achieve the desired estimation accuracy over a large range of mobile speeds.  相似文献   

18.
In a distributed computer system, a group of processors is connected by communication links into a network. Each processor (node) of the network has an identity (a unique integer value) that is not related to its position in the network (its address). A processor's identity is known only to the processor. In the problem of leader election, exactly one processor among a network of processors has to be distinguished as the leader. Previously, many efficient election protocols have been proposed for networks with a sense of direction. In particular, the sequential search is used for election in a reliable complete network, and a multi-token search method is used in a faulty complete network. However, election protocols on a faulty ChRgN (chordal ring network) have not been investigated by other researchers. This paper addresses this issue by: studying the problem of leader election in an asynchronous ChRgN with a sense of direction and with the presence of undetectable fail-stop processor failures; proposing a new election protocol which (a) combines the concept of sequential search and multi-token search techniques, and (b) uses an efficient routing algorithm to reduce the total number of messages used; presenting a protocol for a ChRgN of n processors with I chords/processor and at most f fail-stop faulty processors, with message complexity O(n+(n/l)log(n)+k·f), where k is the number of processors starting the election process spontaneously and at most f相似文献   

19.
CDMA分组网络性能主要受限于信道中同时传输的其它分组的干扰.与时隙CDMA分组网络相比,非时隙CDMA分组网络所受到的干扰情况更加复杂.本文提出了一种非时隙CDMA分组网络的干扰分析模型,并采用递归方式建立了网络吞吐量性能分析的统一方法.在此基础上,分析了网络节点突发固定长度分组和突发可变长度分组两种情况下的网络吞吐量性能,并讨论了扩频增益和分组传输方式对网络性能的影响,给出了相应的数值结果.文章最后进一步讨论了吞吐量的上下界问题.与前人提出的马尔可夫模型相比,采用本文提出的方法可以得到更为准确的吞吐量性能.  相似文献   

20.
The basis of the concept of reliability is that a given component has a certain stress-resisting capacity; if the stress induced by the operating conditions exceeds this capacity, failure results. Most of the published results in this area are based upon analytical modelling of stress and strength, using various probability distributions, and then trying to find an exact expression for system reliability, which can be very difficult to obtain sometimes. The approach used in this paper is very simple and uses simulation techniques to repeatedly generate stress and strength of a system by the computer, using a random number generator and methods such as the inverse transformation technique. The advantage of this approach is that it can be used for any stress-strength distribution functions. Finally, numerical results obtained from using this approach are compared with results obtained using the analytical methods for various strength-stress distribution functions, such as exponential, normal, log normal, gamma and Weibull. Results show the viability of the simulation approach.  相似文献   

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