Structural stability of low temperature grown InGaAs/GaAs heterostructure

InGaAs/GaAs superlattice was grown by molecular beam epitaxy (MBE) on GaAs (100) substrate at low substrate temperature (250°C). The as-grown superlattice sample was then annealed at various temperatures for 10 min. The as-grown superlattice was pseudomorphic and stable up to 800°C annealing. Annealing at 850°C or higher temperatures, however, caused strain relaxation accompanying with dislocation generation at the As precipitate. Dislocation generation at the As precipitate was influenced by two factors. The one is lattice mismatch between GaAs and As precipitate, and the other is elastic interaction force acting on the As precipitate.     

The effects of oxygen,nitrogen, and hydrogen annealing on Mg acceptors in GaN as monitored by electron paramagnetic resonance spectroscopy

Electron paramagnetic resonance (EPR) spectroscopy is used to study the unpassivated Mg-related acceptor in GaN films. As expected, the trends observed before and after O₂, N₂, or forming-gas anneals at temperatures <800°C are similar to those typically reported for electrical measurements. However, annealing at temperatures >850°C in O₂ or N₂ permanently removes the signal, contrary to the results of conductivity measurements. Approximately 10¹⁹ cm⁻³ Mg acceptors were detected in some GaN films grown by chemical vapor deposition (CVD) before acceptor activation, suggesting that it is possible to have electrically active Mg in as-grown CVD material.     

Anomalies in annealed LT-GaAs samples

The annealing behavior of low temperature (LT)-GaAs layers was investigated using transmission electron microscopy, x-ray rocking curves, and H⁺ ion channeling. These data were compared to the Hall-effect and conductivity data obtained earlier on the same samples. An expansion of the lattice parameter above those observed for as-grown LT-GaAs layers was observed for the layers annealed at 300 and 350°C. No precipitation was observed in transmission electron micrographs for these annealing temperatures. Based on ion-channeling results, the As atoms (split interstitials) appear to be in the same position as found for the as-grown layers. A special arrangement of As split interstitials or out-annealing of gallium vacancies would be consistent with a decrease of the dominant acceptor in these layers and an increase in the lattice parameter. For annealing above 400°C, the lattice parameter decreased and in fact was found to achieve the substrate value at annealing temperatures of 500°C and above. The decrease in the lattice parameter above 400°C is related to the decrease of excess As antisite defects and As split interstitials in the formation of As precipitates.     

Photoluminescence study of ZnO varistor stability

Photoluminescence (PL) measurements were carried out on commercial ZnO varistor samples that were electrically stressed and/or annealed at different temperatures. Changes in the intensity of green and yellow luminescence centers were studied as a function of annealing treatment. It was found that the ZnO luminescence (green and yellow) decrease with increase in annealing temperature, reach a minimum at 700°C, and increase again beyond 800°C. Furthermore, these green and yellow luminescence bands observed in the PL spectra are quenched in the ZnO varistor samples, compared to pure ZnO. In an electrically stressed ZnO varistor sample, the luminescence intensity was found to be higher compared to the as-sintered varistor sample. Annealing of the stressed varistor sample resulted in a decrease of the luminescence intensity. These PL observations are consistent with previous deep level transient spectroscopy and doppler positron annihilation spectroscopy results. All of the experimental results are consistent with the ion migration model of degradation and can be explained using a grain boundary defect model.     

Reduction of Inclusions in (CdZn)Te and CdTe:In Single Crystals by Post-Growth Annealing

(CdZn)Te with the composition of 3% Zn and In-doped CdTe single crystals were annealed at various annealing temperatures and under various Cd or Te pressures with the aim of eliminating Te or Cd inclusions. Te inclusions were reduced by Cd-saturated annealing at temperatures above 660°C. Only small (<1 μm) residual dark spots, located at the original position of as-grown inclusions, were observed after annealing. The size of Cd inclusions was reduced by Te-rich annealing at temperatures higher than 700°C. A specific cooling regime was used to eliminate new small Te precipitates (∼1 μm) concurrently formed on dislocations during Te-rich annealing. Poor infrared transmittance of samples with Cd inclusions was detected after Te-rich annealing; therefore, Cd-saturated re-annealing of annealed samples was used for increasing infrared transmittance to a value above 60%. Alternative models explaining the formation of star-shaped corona-surrounding inclusions are discussed.     

Terahertz time-domain-spectroscopy system using a 1 micron wavelength laser and photoconductive components made from low-temperature-grown GaAs

A terahertz time-domain spectroscopy (TDS) system based on a femtosecond Yb:KGW laser, photoconductive emitters and detectors made from as-grown and from annealed at moderate temperatures (~400°C) low-temperature-grown GaAs (LTG GaAs) layers was demonstrated. The measured photoconductivity of these layers increased linearly with the optical power, showing that transitions from the defect band to the conduction band are dominant. The largest amplitude THz pulse with a useful signal bandwidth reaching 3 THz and its signal-to-noise ratio exceeding 50 dB was emitted by the device made from the LTG GaAs layer annealed at 420°C temperature. The detector made from this material was by an order of magnitude less sensitive than conventional GaBiAs detectors.     

Optical and electrical properties of 4H-SiC irradiated with Xe ions

Structures with aluminum-ion-implanted p ⁺-n junctions formed in 26-μm-thick chemicalvapor-deposited-epitaxial 4H-SiC layers with an uncompensated donor concentration N _d ?N _a = (1–3) × 10¹⁵ cm^?3 are irradiated with 167-MeV Xe ions at fluences of 4 × 10⁹ to 1 × 10¹¹ cm^?2 and temperatures of 25 and 500°C. Then as-grown and irradiated structures are thermally annealed at a temperature of 500°C for 30 min. The as-grown, irradiated, and annealed samples are analyzed by means of cathodoluminescence, including the cross-sectional local cathodoluminescence technique, and electrical methods. According to the experimental data, radiation defects penetrate to a depth in excess of several tens of times the range of Xe ions. Irradiation of the structures at 500°C is accompanied by “dynamic annealing” of some low-temperature radiation defects, which increases the radiation resource of 4H-SiC devices operating at elevated temperatures.     

Microstructure evolution of amorphous silicon thin films upon annealing studied by positron annihilation

Amorphous silicon (a-Si) thin films were prepared on glass substrates by plasma enhanced chemical vapor deposition (PECVD). Influence of annealing temperature on the microstructure, surface morphology, and defects evolution of the films were studied by X-ray diffraction (XRD), atomic force microscope (AFM) and positron annihilation Doppler broadening spectroscopy (DBS) based on a slow positron beam, respectively. The S parameter of the as-deposited a-Si thin film is high, indicative of amorphous state of Si film with many defects. The a-Si gradually grows into polycrystalline silicon with increasing temperature to 650 °C. For the films annealed below ~450 °C, positron diffusion lengths are rather small because most positrons are trapped in the defects of the a-Si films and annihilated there. With further rising the temperature to 600 °C, the diffusion length of positrons increases significantly due to the removal of vacancy-type defects upon annealing at a high temperature. The results indicate that the coalescence of small vacancy-type defects in a-Si thin film and the crystallization of a-Si occur around 450 °C and 650 °C, respectively.     

Implant temperature dependence of transient-enhanced diffusion in silicon (1 0 0) implanted with low-energy arsenic ions

The diffusion of arsenic implanted into silicon at low ion energies (2.5 keV) has been studied with medium-energy ion scattering, secondary ion mass spectrometry and four-point probe measurements. The dopant redistribution together with the corresponding damage recovery and electrical activation produced by high-temperature (550–975°C) rapid thermal anneals has been investigated for a range of substrate temperatures (+25, +300 and −120°C) during implant. Initial results show an implant temperature dependence of the damage structure and arsenic lattice position prior to anneal. Solid-phase epitaxial regrowth was observed following 550°C, 10 s anneals for all implant temperatures and resulted in approximately 60% of the implanted arsenic moving to substitutional positions. Annealing at 875°C resulted in similar arsenic redistribution for all implant temperatures. Following annealing at 925°C, transient-enhanced diffusion was observed in all samples with more rapid diffusion in the +25°C samples than either the −120 or +300°C implants, which had similar dopant profiles. In the 975°C anneal range, similar rates of implant redistribution were observed for the +300 and +25°C implants, while diffusion in the −120°C sample was reduced. These observations are discussed qualitatively in terms of the nature and density of the complex defects existing in the as-implanted samples.     

Boron diffusion in silicon

Well-defined control of high-and low-temperature anneals of boron implanted in silicon is important in the calculation of shallow p-n junction profiles used in MOSFET's. Here, a sample matrix of boron implanted into silicon over a range of fluences and annealing temperatures is considered. The matrix of samples was measured by SIMS (secondary ion mass spectrometry). The measured profiles were compared with simulations from an annealing/diffusion model. Calculations of the annealed profiles were found to be in agreement with the SIMS data at temperatures greater than 1000°C. At lower temperatures, the profiles exhibit effects due to implantation damage which are not included in the diffusion model.     

Defect state assisted tunneling in intermediate temperature molecular beam epitaxy grown GaAs

Current transport in molecular beam epitaxy (MBE) GaAs grown at low and intermediate growth temperatures is strongly affected by defects. A model is developed here that shows that tunneling assisted by defect states can dominate, at some bias ranges, current transport in Schottky contacts to unannealed GaAs material grown at the intermediate temperature range of about 400°C. The deep defect states are modeled by quantum wells which trap electrons emitted from the cathode before re-emission to semiconductor. Comparison of theory with experimental data shows defect states of energies about 0.5 eVbelow conduction band to provide the best fit to data. This suggests that arsenic interstitials are likely to mediate this conduction. Comparison is also made between as-grown material and GaAs grown at the same temperature but annealed at 600°C. It is suggested that reduction of these defects by thermal annealing can explain lower current conduction at high biases in the annealed device as well as higher current conduction at low biases due to higher lifetime. Quenching of current by light in the as-grown material can also be explained based on occupancy of trap states. Identification of this mechanism can lead to its utilization in making ohmic contacts, or its elimination by growing tunneling barrier layers.     

Rapid thermal annealing of ion implanted 6H-SiC by microwave processing

Rapid thermal processing utilizing microwave energy has been used to anneal N, P, and Al ion-implanted 6H-SiC. The microwaves raise the temperature of the sample at a rate of 200°C/min vs 10°C/min for conventional ceramic furnace annealing. Samples were annealed in the temperature range of 1400-1700°C for 2-10 min. The implanted/annealed samples were characterized using van der Pauw Hall, Rutherford backscattering, and secondary ion mass spectrometry. For a given annealing temperature, the characteristics of the microwave-annealed material are similar to those of conventional furnace anneals despite the difference in cycle time.     

Influence of Cd-rich Annealing on Defects in Te-rich CdZnTe Materials

The influence of Cd-rich annealing at temperatures of 440–900 °C on the defect properties of Te-rich CdZnTe materials was studied. Cd-rich annealing at temperatures above the melting point of Te was confirmed to effectively reduce the size of Te-rich inclusions in the materials. However, dislocation multiplication occurred in the regions near Te-rich inclusions. Etch pit clusters were observed on the surfaces of annealed materials etched with Everson etchant. The etch pit clusters were much larger than the as-grown Te-rich inclusions. The dependence of the cluster size on that of the Te-rich inclusions and the annealing conditions was investigated. The density of etch pits in the normal region increased when the annealing temperature exceeded 750 °C. The mechanisms of the evolution of the Te-rich inclusions and the formation of new defects during the Cd-rich annealing are discussed.     

Influence of Oxygen Post-Growth Annealing on Optical and Electrical Properties of PbSe Thin Films

PbSe thin films grown on (111)-oriented Si substrates by molecular-beam epitaxy were annealed under an oxygen atmosphere with a variety of temperatures and times. The photoluminescence intensity from the sample annealed at 350°C for 2 h was increased by 400-fold with frontside pumping and increased by 40-fold with backside pumping, respectively, in comparison with the as-grown sample. Furthermore, the mobility was increased twofold after annealing. Such large photoluminescence increases and mobility improvements could be attributed to the surface passivation and the dislocation and defect passivation caused by oxygen diffusion and reaction with the PbSe film.     

The properties of annealed AlN films deposited by pulsed laser deposition

AlN films deposited on SiC or sapphire substrates by pulsed laser deposition were annealed at 1200°C, 1400°C, and 1600°C for 30 min in an inert atmosphere to examine how their structure, surface morphology, and substrate-film interface are altered during high temperature thermal processing. Shifts in the x-ray rocking curve peaks suggest that annealing increases the film density or relaxes the films and reduces the c-axis Poisson compression. Scanning electron micrographs show that the AlN begins to noticeably evaporate at 1600°C, and the evaporation rate is higher for the films grown on sapphire because the as-deposited film contained more pinholes. Rutherford backscattering spectroscopy shows that the interface between the film and substrate improves with annealing temperature for SiC substrates, but the interface quality for the 1600°C anneal is poorer than it is for the 1400°C anneal when the substrate is sapphire. Transmission electron micrographs show that the as-deposited films on SiC contain many stacking faults, while those annealed at 1600°C have a columnar structure with slightly misoriented grains. The as-deposited films on sapphire have an incoherent interface, and voids are formed at the interface when the samples are annealed at 1600°C. Auger electron spectroscopy shows that virtually no intermixing occurs across the interface, and that the annealed films contain less oxygen than the as-grown films.     

Degradation of silicon dioxide during selective silicon epitaxy in a dichlorosilane environment

The electrical degradation of dry thermal SiO₂ upon exposure to selective silicon epitaxy using dichlorosilane has been investigated. Capacitors were fabricated with thermal gate oxides (120 to 440A thick) grown on p-type silicon (100) substrates. Prior to the gate electrode formation, the oxides were exposed to hydrogen and dichlorosilane + hydrogen anneals. Leakage current and electric field breakdowns were measured to evaluate the effects of these anneals on the SiO₂ degradation. The SiO₂ degradation occurring because of dichlorosilane exposure was studied as a function of the temperature and time. While dichlorosilane exposure at temperatures above 850°C was found to cause high leakage current and breakdowns at low electric fields for silicon dioxide films thinner than 440Å, little effect was observed as a result of hydrogen and chlorine exposures. The degradation mechanism was attributed to pinhole etching via volatile SiO formation along defects present in the as-grown SiO₂.     

A comparison of graphite and AlN caps used for annealing ion-implanted SiC

The SiC wafers implanted with Al were capped with AlN, C, or AlN and C and were annealed at temperatures as high as 1700°C to examine their ability to act as annealing caps. As shown previously, the AlN film was effective up to 1600°C, as it protected the SiC surface, did not react with it, and could be removed selectively by a KOH etch. However, it evaporated too rapidly at the higher temperatures. Although the C did not evaporate, it was not a more effective cap because it did not prevent the out-diffusion of Si and crystallized at 1700°C. The crystalline film had to be ion milled off, as it could not be removed in a plasma asher, as the C films annealed at the lower temperatures were. A combined AlN/C cap also was not an effective cap for the 1700°C anneal as the N or Al vapor blew holes in it, and the SiC surface was rougher after the dual cap was removed than it was after annealing at the lower temperatures.     

Electron traps created by high temperature annealing in MBE n-GaAs

An electron trap with a thermal activation energy of 0.83 eV from the conduction band is common in the deep level transient spectroscopy (DLTS) spectra of vapor phase epitaxial (VPE) n-GaAs, but is not observed in the DLTS spectra of as-grown molecular beam epitaxial (MBE) n-GaAs. We show here that this trap is created during high temperature annealing of MBE samples with a Si₃N₄, encapsulant. The trap concentration is correlated with the annealing temperature and time, suggesting the outdiffusion of a constituent atom resulting in the formation of a vacancy or vacancy-complex. Other electron traps observed in the DLTS spectra of asgrown MBE n-GaAs are annealed out for temperatures at or above 800° C.     

A new high temperature stable bipolar VLSI metallization

High performance bipolar analog/digital circuits require metallization capable of with-standing several hour anneals in the temperature range of 400–500° C without causing any device degradation. A new VSi₂/Ti: W/Pd/Rh/Au metallization scheme for use in bipolar circuits is described. This metallization scheme (which evolved from Pd₂Si/Ti:W/ Pd/Au metallization) offers high electrical conductivity, high electromigration and corrosion resistances and is capable of withstanding long anneals at temperatures up to 500° C without degradation of minority carrier devices. The metallization integrity and majority carrier devices are not affected up to 600° C.     

Surface roughening in ion implanted 4H-silicon carbide

Silicon carbide (SiC) devices have the potential to yield new components with functional capabilities that far exceed components based on silicon devices. Selective doping of SiC by ion implantation is an important fabrication technology that must be completely understood if SiC devices are to achieve their potential. One major problem with ion implantation into SiC is the surface roughening that results from annealing SiC at the high temperatures which are needed to activate implanted acceptor ions, boron or aluminum. This paper examines the causes and possible solutions to surface roughening of implanted and annealed 4H-SiC. Samples consisting of n-type epilayers (5 × 10¹⁵ cm⁻³, 4 μm thick) on 4H-SiC substrates were implanted with B or Al to a total dose of 4 × 10¹⁴ cm⁻² or 2 × 10¹⁵ cm⁻², respectively. Roughness measurements were made using atomic force microscopy. From the variation of root mean square (rms) roughness with annealing temperature, apparent activation energies for roughening following implantation with Al and B were 1.1 and 2.2 eV, respectively, when annealed in argon. Time-dependent activation and surface morphology analyses show a sublinear dependence of implant activation on time; activation percentages after a 5 min anneal following boron implantation are about a factor of two less than after a 40 min anneal. The rms surface roughness remained relatively constant with time for anneals in argon at 1750°C. Roughness values at this temperature were approximately 8.0 nm. Annealing experiments performed in different ambients demonstrated the benefits of using silane to maintain good surface morphology. Roughnesses were 1.0 nm (rms) when boron or aluminum implants were annealed in silane at 1700°C, but were about 8 and 11 nm for B and Al, respectively, when annealed in argon at the same temperature.