一种采用有源电感的可调增益小面积超宽带低噪声放大器

设计了一款采用可调谐有源电感（TAI）的可调增益的小面积超宽带低噪声放大器(LNA),输入级采用共基极结构,输出级采用射随器结构,分别实现了宽带输入和输出匹配;放大级采用带有反馈电阻的共射共基结构以取得宽的带宽,并采用TAI作负载,通过调节TAI的多个外部偏压使LNA的增益可调。结果表明,该LNA在2~9GHz的频带内,通过组合调节有源电感调节端口的偏压可实现S21在16.5~21.1dB的连续可调;S11小于-14.7dB;S22小于-19.3dB;NF小于4.9dB;芯片面积仅为0.049mm2。     

基于有源电感的全集成超宽带低噪声放大器

利用有源电感来实现超宽带低噪声放大器(UWB LNA),不但可以减小芯片面积、改善增益平坦度,而且可通过外部调节偏置电压来调谐有源电感的电感值,进而调整设计中没有考虑到的由工艺变化及封装寄生带来的增益退化.采用TSMC 0.35 μm SiGe BiCMOS工艺,利用Cadence设计工具完成了放大器电路及版图的设计.在3.1～10.6 GHz工作频率范围内,通过外部调节电压来调谐有源电感,可使LNA的增益S21在16～19 dB范围内变化,输入输出回波损耗S11,S22均小于-10 dB,噪声为2.4～3.7 dB,输入3阶截点IIP3为-4 dBm.整个电路芯片面积仅为0.11 mm2.     

采用可调谐有源电感的多频段低噪声放大器

设计了一种采用可调谐有源电感(TAI)的多频段低噪声放大器(MBLNA).在放大级中,由电感值及Q值可多重调谐的TAI与电容值可调谐的变容二极管构成选频网络,并结合共射-共基放大电路,实现对不同频段信号进行选择放大.输入级采用带有输入串联电感与发射极电感负反馈的共射放大电路,实现了 MBLNA输入阻抗的宽带匹配.输出级...     

一个采用0.18μm CMOS工艺的3－5GHz超宽带平坦增益低噪声放大器

本论文设计并实现了一个用于UWB脉冲体制的3-5GHz超宽带平坦增益的全差分低噪声放大器。在电路设计上,采用了一种增益平坦化技术,并且利用了串连建峰与并联建峰技术,分别实现了宽带的输入匹配与整个电路大的增益带宽积。同时,利用反馈技术,进一步拓展带宽和削减带内增益波动。此LNA才用SMIC 0.18um CMOS射频工艺流片验证。测试结果表面电路3dB带宽为2.4~5.5GHz,最高增益可达13.2dB,在3－5GHz的带内增益波动仅为＋/- 0.45dB,最低噪声系数为3.2dB．输入匹配性能良好,在2.9~5.4GHz范围内S11<-13dB,电路的输入P1dB为－11.7dBm@5GHz,电路采样1.8v供电,整个差分电路消耗电流9.6mA.     

一款高增益宽带低噪声放大器的设计

采用0.5μm GaAs E-PHEMT工艺设计了一款0.5～5 GHz高增益宽带低噪声放大器芯片.该放大器采用三级共源结构,运用负反馈技术有效地进行了输入输出阻抗匹配,针对高频增益不足问题,在共栅晶体管的栅极到地之间增加栅极电容,提高了高频增益,改善了增益平坦度,拓展了带宽.同时,放大器前两级应用电流复用技术,大大降...     

5~22GHz平坦高增益单片低噪声放大器

使用0.25μm G aA s PHEM T工艺技术,设计和制造了性能优良的5-22 GH z两级并联反馈单片低噪声放大器。在工作频率5-22 GH z内,测得增益G≥18 dB,带内增益波动ΔG≤±0.35 dB,噪声系数N F≤3.2 dB,输入输出驻波V SW R≤1.7,最小分贝压缩点输出功率P1dB≥10.5 dBm,电流增益效率达2.77 mA/dB。测试结果验证了设计的正确性。     

采用有源电感的小面积宽可调范围VCO

为了实现电感-电容压控振荡器(LC VCO)的全集成和小面积,同时使其振荡频率具有较宽的可调范围和较低的相位噪声,采用差分有源电感和Q值增强共源共栅电路结构,对LC VCO进行设计。采用差分有源电感代替螺旋电感,减小了芯片面积,并利用有源电感的可调性,增大了振荡频率的可调范围。采用Q值增强共源共栅电路结构,增加了LC VCO的输出功率和Q值,进而减小了相位噪声。基于TSMC 0.18 μm RF CMOS工艺,采用Cadence仿真工具对LC VCO进行仿真验证。结果表明,LC VCO振荡频率的可调范围高达129%,在偏离最大振荡频率1 MHz处,最低相位噪声为-121.4 dBc/Hz,直流功耗为11 mW,优值FOMT(考虑到调谐范围)为-193.6 dBc/Hz。     

一种新型的高增益超宽带低噪声放大器

文中提出了一种采用增益提高技术的超宽带低噪声放大器(LNA)。为了通过提高电路的输出阻抗,进而实现改善电路增益的目的,该LNA包含了两级共射共基放大器电路,并在共基晶体管基极引入电感。基于0.13μm SiGe BiCMOS工艺对其进行设计,实现了超宽的31GHz~42GHz的工作频率,增益为20.1dB~30.7dB,噪声系数为1.19dB~1.31dB,并且在1.8V单电源电压供电情况下,消耗的功耗为13.2mW。     

一款3～6.3 GHz增益可调的低噪声放大器设计

针对无线接收机在对不同信号进行放大时,噪声恶化严重的问题,文中在驱动放大级采用电流复用技术,可以降低系统功耗,同时,在增益变化过程中保证了输入级增益对后级电路噪声的抑制作用,使得增益变化过程中,噪声始终低于1 dB。输入级和输出级阻抗匹配良好,在3 GHz～6.3 GHz的工作频段上可实现系统增益的连续可调范围约30 dB(19.6 dB～49.6 dB),同时通过采用两个控制电压分别控制两级放大电路,在增益变化过程中系统获得了良好的增益平坦度,版图尺寸为0.95×1.53 mm²。在常规工作状态下,系统噪声为0.56±0.02 dB,增益为49.6±0.47 dB,功耗97 mW。在4.5 GHz频率处,系统的OP1dB为10.3 dBm, OIP3达到29 dBm,具有良好的线性度。     

一种采用SiGe HBT的新型超宽带有源可调衰减器

提出一种以SiGe HBT为有源器件的超宽带有源可调衰减器。在超宽频带内实现了宽增益调节范围和高线性度。详细分析了有源衰减器的最小插入损耗及最大衰减量,基于Jazz 0.35μm SiGe HBT工艺,通过选择合适的SiGe HBT有源器件,完成了超宽带有源可调衰减器的设计。利用安捷伦公司的ADS仿真软件,对设计的有源可调衰减器进行仿真验证。结果表明,在3.1～10.6GHz的超宽带内,当电压在0.4～1.8V的范围内变化时,该有源可调衰减器的增益动态范围大于50dB,S11在整个电压变化范围内均低于-10dB,且输入3阶交调点(IIP3)为13dBm。     

运用级间并联电感的级联CMOS低噪声放大器的优化设计

本文介绍了一种运用级间并联电感优化CMOS低噪声放大器的设计方法。传统的级联低噪声放大器可以从两级级联放大器的角度出发,视为共源级和共栅级的级联,由于共栅极的极好的隔离性,两级放大器可以分别设计。理论分析表明：在共源极和共栅极间引入级间匹配网络,即并联一个电感加强两极间的耦合,可以有效的改善低噪放的功率增益和噪声性能。文章最后用一个工作于5GHz的低噪放的设计实例,验证了理论分析的正确性。     

A low power tunable inductor based on active capacitor with negative resistance

A method to provide a low power tunable inductor is presented in which the inductance and its equivalent series resistance can be independently tuned. This equivalent series resistance can be also set to negative or zero value that is corresponding to inductor with ideal quality factor. In this method, a varactor is placed in parallel with a passive inductor and then, an active capacitor is placed in series with them. To this end, a low power Tunable Active Capacitor (TAC) is proposed which is capable of generating tunable capacitor and large negative resistance to compensate the loss of tunable inductor circuit. Also, the power consumption is low because of using a diode-connected transistor. A prototype of the proposed circuit is designed and simulated at 4 GHz. The electromagnetic simulation results show the inductance tuning range of 0.48–2.3nH with zero or even negative equivalent series resistance is obtained while the power dissipation is less than 3 mW. Moreover, noise analysis shows that higher inductance translates to lower noise while there is a weak correlation between noise and quality factor of the obtained inductances.     

A CMOS low noise amplifier with integrated front-side micromachined inductor

The paper presents the design and characterization of a low noise amplifier (LNA) in a 0.18 μm CMOS process with a novel micromachined integrated stacked inductor. The inductor is released from the silicon substrate by a low-cost CMOS compatible dry front-side micromachining process that enables higher inductor quality factor and self-resonance frequency. The post-processed micromachined inductor is used in the matching network of a single stage cascode 4 GHz LNA to improve its RF performance. This study compares performance of the fabricated LNA prior to and after post-processing of the inductor. The measurement results show a 0.5 dB improvement in the minimum noise figure and a 1 dB increase in gain, while good input matching is maintained. These results show that the novel low-cost CMOS compatible front-side dry micromachining process reported here significantly improves performance and is very promising for System-On-Chip (SOC) applications.     

Wide tuning-range CMOS VCO based on a tunable active inductor

In this paper, a wide tuning-range CMOS voltage-controlled oscillator (VCO) with high output power using an active inductor circuit is presented. In this VCO design, the coarse frequency is achieved by tuning the integrated active inductor. The circuit has been simulated using a 0.18-µm CMOS fabrication process and presents output frequency range from 100 MHz to 2.5 GHz, resulting in a tuning range of 96%. The phase noise is –85 dBc/Hz at a 1 MHz frequency offset. The output power is from –3 dBm at 2.55 GHz to +14 dBm at 167 MHz. The active inductor power dissipation is 6.5 mW and the total power consumption is 16.27 mW when operating on a 1.8 V supply voltage. By comparing this active inductor architecture VCO with general VCO topology, the result shows that this topology, which employs the proposed active inductor, produces a better performance.     

A low flicker noise direct conversion receiver for IEEE 802.11g wireless LAN using differential active inductor

In this paper, a low flicker-noise, 2.4 GHz direct onversion receiver (DCR) has been designed. A dynamic current injection (DCI) technique has been utilized in addition with a tuning inductor in the mixing stage. The tuning inductor has been replaced by a differential active inductor circuit, which gives the same inductance, with less chip size and high quality factor. The DCR has been designed in a TSMC 0.18 μm 1P6M CMOS process for wireless LAN 802.11g applications. The proposed DCR achieves 6.7 dB SSB-NF, 34 dB conversion gain, −13.5 dBm IIP3, and flicker noise (1/f) corner frequency of 30 kHz with 137.5 mW power consumption from 1.8 V supply voltage.     

具有平坦增益的X波段GaN单片功率放大器

A flat gain two-stage MMIC power amplifier with a 2.8 GHz bandwidth is successfully developed for X band frequency application based on a fully integrated micro-strip Al Ga N/Ga N HEMT technology on a semiinsulating Si C substrate. Designed with a binary-cluster matching structure integrated with RC networks and LRC networks, the developed power MMIC gets a very flat small signal gain of 15 d B with a gain ripple of 0.35 d B over 9.1–11.9 GHz at the drain bias of 20 V. These RC networks are very easy to improve the stability of used Ga N HEMTs with tolerance to the MMIC technology. Inside the frequency range of 9–11.2 GHz where the measurement system calibrated, the amplifier delivers a pulsed output power of 39 d Bm and an associated power added efficiency of about 20% at 28 V without saturation, as the available RF power is limited.     

程控增益低噪声宽带直流放大器的设计

介绍了程控增益低噪声宽带直流放大器的设计原理及流程。采用低噪声增益可程控集成运算放大器AD603和高频三极管2N2219和2N2905等器件设计了程控增益低噪声宽带直流放大器,实现了输入电压有效值小于10mV,输出信号有效值最大可达10V,通频带为0～8MHz,增益可在0～50dB之间5dB的步进进行控制,最高增益达到53dB,且宽带内增益起伏远小于1dB的两级宽带直流低噪声放大器的设计。     

An active inductor employing a new four terminal floating nullor transconductance amplifier (FTFNTA)

ABSTRACT

In this scientific study, a new analog active building block named as four terminal floating nullor transconductance amplifier (FTFNTA) is implemented. The FTFNTA design offers a combined essence of both traditional four terminal floating nullor (FTFN) and an operational transconductance amplifier (OTA). The FTFNTA design is extended for the design of a lossless floating and grounded inductor simulator with few passive components. In addition, the performance and usefulness of the proposed inductor topology are also expanded for active filter applications: higher-order Butterworth high-pass filter and current mode multifunction filter. The functionality of the CMOS-based FTFNTA is integrated with a 0.18 µm Taiwan Semiconductor Manufacturing Company (TSMC) CMOS technology. Moreover, the FTFNTA is also realised using the current feedback operational amplifier (CFOA/AD844) and OTA (OTA/CA3080) of a commercially available IC to test the viability of the proposed inductor design. Finally, an application based on the inductor topology and its impedance characteristics are well analysed via PSPICE simulation.     

使用可调谐LD激光作探针测量泛频HF化学激光器小信号增益

发展了一种使用可调谐ＬＤ激光为探针直接测量ＨＦ激光器小信号增益的方法。以计算机程控步进电机驱动ＬＤ激光器波长扫描,测量进入ＨＦ激光反应室和从反应室出射的探针光功率,并依此计算ＨＦ激光器小信号增益系数。实测ＨＦ激光器小信号增益系数最大值约５×１０－ ３ｃｍ －１ ,增益－ 波长半宽度约１－５ｎｍ ,增益时间半宽度０－５ｓ。对测量方法结果进行了讨论。