一款采用有源电感的增益可调且平坦的超宽带低噪声放大器

采用有源电感,设计了一款增益可调且平坦的超宽带低噪声放大器(FTG UWB-LNA)。在输入级,采用具有新型偏置电路和RLC反馈的共基-共射放大器来实现良好的宽带输入阻抗匹配;在放大级,采用由新型有源电感与达林顿结构构成的组合电路,来实现增益的可调性、平坦化和幅度提升。在输出级,采用电阻并联和电流镜偏置的共集放大器,来实现良好的输出阻抗匹配。基于WIN 0.2μm GaAs HBT工艺库,对FTG UWB-LNA进行验证,结果表明：在1-6GHz频带内,增益(S21)可以在21.16dB-23.9dB之间调谐,最佳增益平坦度达到±0.65dB;输入回波损耗(S11)小于-10dB;输出回波损耗(S22)小于-12dB;噪声系数(NF)小于4.08dB;在4V的工作电压下,静态功耗小于33mW。     

基于有源电感的全集成超宽带低噪声放大器

利用有源电感来实现超宽带低噪声放大器(UWB LNA),不但可以减小芯片面积、改善增益平坦度,而且可通过外部调节偏置电压来调谐有源电感的电感值,进而调整设计中没有考虑到的由工艺变化及封装寄生带来的增益退化.采用TSMC 0.35 μm SiGe BiCMOS工艺,利用Cadence设计工具完成了放大器电路及版图的设计.在3.1～10.6 GHz工作频率范围内,通过外部调节电压来调谐有源电感,可使LNA的增益S21在16～19 dB范围内变化,输入输出回波损耗S11,S22均小于-10 dB,噪声为2.4～3.7 dB,输入3阶截点IIP3为-4 dBm.整个电路芯片面积仅为0.11 mm2.     

一种利用衰减器实现的超宽带可变增益放大器

提出了一种基于有源可调衰减器的超宽带可变增益放大器,以有源可调衰减器作为可变增益放大器的核心,并与高增益放大器级联,在3.1～10.6 GHz超宽频带内实现了宽动态增益调节范围.基于Jazz 0.35 μm SiGe HBT工艺,完成了超宽带可变增益放大器的设计,利用安捷伦公司的ADS仿真软件进行仿真验证.结果表明,在3.1～10.6 GHz的超宽频带内,当电压在0.7～2.0V的范围内变化时,该放大器的动态增益变化范围大于60 dB,3dB带宽大于7 GHz,在整个电压变化范围内,S11和S22均低于-10 dB,在最大增益处,噪声系数小于5dB.     

高增益超宽带低噪声放大器设计研究

设计了一种适用于3.1～ 5 GHz的超宽带(UWB)低噪声放大器(LNA).该LNA具有平展高增益特性.设计采用两级结构,每一级采用不同的谐振负载,第一级谐振频率为3.1 GHz,第二级为5 GHz,进而产生平展高增益.设计中,采用前馈技术消除输入MOS管的沟道热噪声.电路采用65 nm CMOS工艺实现.测试结果表明,该LNA增益高达21.3 dB,功耗仅为8 mW.     

一种低噪声可变增益放大器

文中介绍了以AD603为核心构成的低噪声可变增益放大器的实用电路,通过模式选择、引脚编程,可选择不同的带宽,以及得到不同的增益.通过对增益控制方式的选择,可得到最佳的信噪比.     

3.1～10.6 GHz CMOS超宽带低噪声放大器设计

本文给出了一个低电压、低功耗增益连续可调CMOS超宽带低噪声放大器(Ultra-wideband Low Noise Amplifier,UWB LNA)设计。在0.85V工作电压下放大器的直流功耗约为10mW。在3.1～10.6GHz的超宽带频段内,增益S21为14±0.4dB,且随控制电压VC连续可调。输入、输出阻抗匹配S11、S22均低于-10dB,噪声系数(NF)最小值为3.3dB。设计采用TSMC 0.18μm RF CMOS工艺完成。     

一种用于超宽带接收机的低功耗高增益低噪声放大器

本文提出一种工作在3-5GHz的高增益低功耗的差分超宽带低噪声放大器.输入级采用共栅结构以获取宽带输入匹配,同时采用了电容交叉耦合和电流复用技术,从而可以在低功耗条件下获取高增益.采用0.18-um cmos工艺制作出来的样品的测试显示该低噪声放大器在4.4mA电流,1.8V电源功耗下的峰值功率增益为17.5dB,3dB带宽为2.8-5GHz,在4.5mW的功耗下的峰值增益为14dB(1.5V电源下3mA电流).该差分低噪声放大器的芯片面积包括测试pad在内为1.01平方毫米.     

一种低噪声,高增益放大器的设计

适合于不同应用场合的放大器种类很多,设计的侧重点不同。本文针对通信系统、信号检测中广泛应用的低噪声、高增益放大器,扼要地阐述这类放大器的设计方法,并给出设计实例。     

3.1～5.2GHz超宽带可变增益低噪声放大器设计

低噪声放大器是超宽带接收机系统中最重要的模块之一,设计了一种可应用于3.1～5.2GHz频段超宽带可变增益低噪声放大器。电路输入级采用共栅结构实现超宽带输入匹配,并引入电流舵结构实现了放大器的可变增益。仿真基于TSMC 0.18μm RF CMOS工艺。结果表明,在全频段电路的最大功率增益为10.5dB,增益平坦度小于0.5dB,噪声系数小于5dB,输入反射系数低于-15dB,在1.8V电源电压下,功耗为9mW。因此,该电路能够在低功耗超宽带射频接收机系统中应用。     

采用有源电感的小面积宽可调范围VCO

为了实现电感-电容压控振荡器(LC VCO)的全集成和小面积,同时使其振荡频率具有较宽的可调范围和较低的相位噪声,采用差分有源电感和Q值增强共源共栅电路结构,对LC VCO进行设计。采用差分有源电感代替螺旋电感,减小了芯片面积,并利用有源电感的可调性,增大了振荡频率的可调范围。采用Q值增强共源共栅电路结构,增加了LC VCO的输出功率和Q值,进而减小了相位噪声。基于TSMC 0.18 μm RF CMOS工艺,采用Cadence仿真工具对LC VCO进行仿真验证。结果表明,LC VCO振荡频率的可调范围高达129%,在偏离最大振荡频率1 MHz处,最低相位噪声为-121.4 dBc/Hz,直流功耗为11 mW,优值FOMT(考虑到调谐范围)为-193.6 dBc/Hz。     

运用级间并联电感的级联CMOS低噪声放大器的优化设计

本文介绍了一种运用级间并联电感优化CMOS低噪声放大器的设计方法。传统的级联低噪声放大器可以从两级级联放大器的角度出发,视为共源级和共栅级的级联,由于共栅极的极好的隔离性,两级放大器可以分别设计。理论分析表明：在共源极和共栅极间引入级间匹配网络,即并联一个电感加强两极间的耦合,可以有效的改善低噪放的功率增益和噪声性能。文章最后用一个工作于5GHz的低噪放的设计实例,验证了理论分析的正确性。     

A CMOS low noise amplifier with integrated front-side micromachined inductor

The paper presents the design and characterization of a low noise amplifier (LNA) in a 0.18 μm CMOS process with a novel micromachined integrated stacked inductor. The inductor is released from the silicon substrate by a low-cost CMOS compatible dry front-side micromachining process that enables higher inductor quality factor and self-resonance frequency. The post-processed micromachined inductor is used in the matching network of a single stage cascode 4 GHz LNA to improve its RF performance. This study compares performance of the fabricated LNA prior to and after post-processing of the inductor. The measurement results show a 0.5 dB improvement in the minimum noise figure and a 1 dB increase in gain, while good input matching is maintained. These results show that the novel low-cost CMOS compatible front-side dry micromachining process reported here significantly improves performance and is very promising for System-On-Chip (SOC) applications.     

A low power tunable inductor based on active capacitor with negative resistance

A method to provide a low power tunable inductor is presented in which the inductance and its equivalent series resistance can be independently tuned. This equivalent series resistance can be also set to negative or zero value that is corresponding to inductor with ideal quality factor. In this method, a varactor is placed in parallel with a passive inductor and then, an active capacitor is placed in series with them. To this end, a low power Tunable Active Capacitor (TAC) is proposed which is capable of generating tunable capacitor and large negative resistance to compensate the loss of tunable inductor circuit. Also, the power consumption is low because of using a diode-connected transistor. A prototype of the proposed circuit is designed and simulated at 4 GHz. The electromagnetic simulation results show the inductance tuning range of 0.48–2.3nH with zero or even negative equivalent series resistance is obtained while the power dissipation is less than 3 mW. Moreover, noise analysis shows that higher inductance translates to lower noise while there is a weak correlation between noise and quality factor of the obtained inductances.     

可重构双频段低噪声放大器的设计和实现

A reconfigurable dual-band LNA is presented. The LNA employs switching capacitors and circuit in to realize the dual-band operation. These methodologies are used to design and implement a reconfigurable LNA for IMT-A and UWB application. The LNA is implemented using TSMC-0.13 μm CMOS technology. Measured performance shows an input matching of better than -13.5 dB, a voltage gain of 18-22.8 dB, with an NF of 4.3-4.7 dB in the band of 3.4-3.6 GHz, and an input matching of better than -9.7 dB, a voltage gain of 14.7-22.4 dB, and with an NF of 3.7-4.9 dB in the band of 4.2-4.8 GHz. According to the measure results, the proposed LNA achieves dual-band operation, and it proves the feasibility of the proposed topology.     

使用可调谐LD激光作探针测量泛频HF化学激光器小信号增益

发展了一种使用可调谐ＬＤ激光为探针直接测量ＨＦ激光器小信号增益的方法。以计算机程控步进电机驱动ＬＤ激光器波长扫描,测量进入ＨＦ激光反应室和从反应室出射的探针光功率,并依此计算ＨＦ激光器小信号增益系数。实测ＨＦ激光器小信号增益系数最大值约５×１０－ ３ｃｍ －１ ,增益－ 波长半宽度约１－５ｎｍ ,增益时间半宽度０－５ｓ。对测量方法结果进行了讨论。     

A linear ultra wide band low noise amplifier using pre-distortion technique

This paper presents an Ultra Wide-Band (UWB) high linear low noise amplifier. The linearity of Common Gate (CG) structure is improved based on pre-distortion technique. An auxiliary transistor is used at the input to sink the nonlinear terms of source current, resulting linearity improvement. Furthermore, an inductor is used in the gate of the main amplifying transistor, which efficiently improves gain, input matching and noise performance at higher frequencies. Detailed mathematical analysis show the effectiveness of both linearity improvement and bandwidth extension techniques. Post-layout simulation results of the proposed LNA in TSMC 0.18 µm RF-CMOS process show a gain of 13.7 dB with −3 dB bandwidth of 0.8–10.4 GHz and minimum noise figure (NF) of 3 dB. Input Third Intercept Point (IIP3) of 10.3–13 dBm is achieved which shows 8 dB improvement compared to conventional common gate structure. The core circuit occupies an area of 0.19 mm² including bond pads, while consuming 4 mA from a 1.8-V supply.     

Wide tuning-range CMOS VCO based on a tunable active inductor

In this paper, a wide tuning-range CMOS voltage-controlled oscillator (VCO) with high output power using an active inductor circuit is presented. In this VCO design, the coarse frequency is achieved by tuning the integrated active inductor. The circuit has been simulated using a 0.18-µm CMOS fabrication process and presents output frequency range from 100 MHz to 2.5 GHz, resulting in a tuning range of 96%. The phase noise is –85 dBc/Hz at a 1 MHz frequency offset. The output power is from –3 dBm at 2.55 GHz to +14 dBm at 167 MHz. The active inductor power dissipation is 6.5 mW and the total power consumption is 16.27 mW when operating on a 1.8 V supply voltage. By comparing this active inductor architecture VCO with general VCO topology, the result shows that this topology, which employs the proposed active inductor, produces a better performance.     

A low flicker noise direct conversion receiver for IEEE 802.11g wireless LAN using differential active inductor

In this paper, a low flicker-noise, 2.4 GHz direct onversion receiver (DCR) has been designed. A dynamic current injection (DCI) technique has been utilized in addition with a tuning inductor in the mixing stage. The tuning inductor has been replaced by a differential active inductor circuit, which gives the same inductance, with less chip size and high quality factor. The DCR has been designed in a TSMC 0.18 μm 1P6M CMOS process for wireless LAN 802.11g applications. The proposed DCR achieves 6.7 dB SSB-NF, 34 dB conversion gain, −13.5 dBm IIP3, and flicker noise (1/f) corner frequency of 30 kHz with 137.5 mW power consumption from 1.8 V supply voltage.     

基于噪声抵消技术的低功耗C频段差分低噪声放大器

设计了一款"基于噪声抵消技术的低功耗C频段的差分低噪声放大器。该放大器由输入级、放大级以及输出缓冲级3个模块构成,其中输入级采用电容交叉耦合的差分对与直接交叉耦合结构差分对级联,实现输入匹配及噪声抵消;放大级采用具有电阻-电感并联反馈的电流复用结构来获得高的增益、良好的增益平坦性及低的功耗;输出缓冲级采用源跟随器结构,实现良好的输出匹配。基于TSMC 0.18μm CMOS工艺库,验证表明在C频段,放大器的增益为20.4设计了一款??基于噪声抵消技术的低功耗C频段的差分低噪声放大器。该放大器由输入级、放大级以及输出缓冲级3个模块构成,其中输入级采用电容交叉耦合的差分对与直接交叉耦合结构差分对级联,实现输入匹配及噪声抵消;放大级采用具有电阻-电感并联反馈的电流复用结构来获得高的增益、良好的增益平坦性及低的功耗;输出缓冲级采用源跟随器结构,实现良好的输出匹配。基于TSMC 0.18 μm CMOS工艺库,验证表明在C频段,放大器的增益为20.4??0.5 dB,噪声系数介于2.3~2.4 dB之间,输入和输出的回波损耗均优于-11 dB,稳定因子恒大于1,在6.5 GHz下,1 dB压缩点为-16.6 dBm,IIP3为-7 dBm,在2.5 V电压下,电路功耗仅为6.75 mW。