Study of GaN thin layers subjected to high-temperature rapid thermal annealing

A detailed study of the effect of rapid thermal annealing in a N₂ or Ar atmosphere on the properties of thin GaN layers grown by molecular-beam epitaxy on sapphire substrates was performed. After rapid thermal annealing, an enhancement of the crystal quality of such films was observed. Low-temperature photoluminescence measurements revealed a substantial increase in impurity recombination near the fundamental absorption edge after a rapid high-temperature anneal in a nitrogen atmosphere. A significant decrease in the impurity photoluminescence of the GaN films with protective SiO₂ coatings was observed following the anneals. Fiz. Tekh. Poluprovodn. 32, 1175–1180 (October 1998)     

Effects of rapid thermal annealing on ohmic contact of AlGaN/GaN HEMTs

工艺制作源漏电极为Ti/Al/Ti/Au,并在氮气气氛中对其进行快速退火,研究不同退火条件对欧姆接触的影响。具体实验过程如下：将溅射好源漏电极的外延片分为5部分,其中3片分别在700℃,750℃和800℃下快速退火30s,并相互对比得出最佳退火温度,实验结果发现750℃条件下欧姆接触最好;其余2片在750℃下分别退火25s和40s,并与前边实验750℃ 30s情况下欧姆接触比较,得出最佳退火时间为30s。我们使用传输线模式计算出电极与外延片的欧姆接触电阻率,在750℃ 30s的快速退火条件下得到最低欧姆接触电阻率为0.54 Ω mm,与其余条件下结果比较具有较好的表面形貌和边缘。从实验中我们也得到随着退火温度和退火时间的提高,欧姆接触电阻率先降低到达最低点然后开始升高的现象,为寻找GaN HEMT欧姆接触最佳条件提供了一定依据。     

Effects of rapid thermal annealing on ohmic contact of AIGaN/GaN HEMTs

Ohmic contacts with Ti/Al/Ti/Au source and drain electrodes on A1GaN/GaN high electron mobility transistors （HEMTs） were fabricated and subjected to rapid thermal annealing （RTA） in flowing N2. The wafer was divided into 5 parts and three of them were annealed for 30 s at 700, 750, and 800 ℃, respectively, the others were annealed at 750 ℃ for 25 and 40 s. Due to the RTA, a change from Schottky contact to Ohmic contact has been obtained between the electrode layer and the A1GaN/GaN heterojunction layer. We have achieved a low specific contact resistance of 7.41 × 10-6Ω cm2 and contact resistance of 0.54 Ω.mm measured by transmission line mode （TLM）, and good surface morphology and edge acuity are also desirable by annealing at 750 ℃ for 30 s. The experiments also indicate that the performance of ohmic contact is first improved, then it reaches a peak, finally degrading with annealing temperature or annealing time rising.     

Effect of rapid thermal annealing on deep level defects in the Si-doped GaN

Rapid thermal annealing effects on deep level defects in the n-type GaN layer grown by metalorganic chemical vapor deposition (MOCVD) have been characterized using deep level transient spectroscopy (DLTS) technique. The samples were first characterized by current-voltage (I-V) and capacitance-voltage (C-V) measurements. The measurements showed that the barrier height of the as-grown sample to be 0.74 eV (I-V) and 0.95 eV (C-V) respectively. However, the Schottky barrier height of the sample annealed at 800 °C increased to 0.84 eV (I-V) and 0.99 eV (C-V) respectively in nitrogen atmosphere for 1 min. Further, it was observed that the Schottky barrier height slightly decreased after annealing at 900 °C. DLTS results showed that the two deep levels are identified in as-grown sample (E1 and E3), which have activation energies of 0.19 ± 0.01 eV and 0.80 ± 0.01 eV with capture cross-sections 2.06 × 10⁻¹⁷ cm² and 7.68 × 10⁻¹⁸ cm², which can be related to point defects. After annealing at 700 °C, the appearance of one new peak (E2) at activation energy of 0.49 ± 0.02 eV with capture-cross section σ_n = 5.43 × 10⁻¹⁷ cm², suggest that E2 level is most probably associated with the nitrogen antisites. Thermal annealing at 800 °C caused the E1 and E3 levels to be annealed out, which suggest that they are most probably associated with the point defects. After annealing at 900 °C the same (E1 and E3) deep levels are identified, which were identified in as-grown n-GaN layer.     

The behavior of Ni/Au contacts under rapid thermal annealing in GaN device structures

The effect of rapid thermal annealing (RTA) on Ni/Au contacts on P-type GaN was investigated in terms of surface morphology and diffusion depth of metallic species. Ni/Au contacts were evaporated on the P-type 0.5 μm thick top layer of a GaN P/N homojunction. Optical micrographs revealed that the contact morphology degrades when annealed above 800°C for 1 min. At the same time, both Ni and Au atoms strongly diffuse in the P-type layer and even can reach the junction for a 1 min long annealing at 900°C, therefore making the junction structure unoperable. This behavior was evidenced using the Auger voltage contrast (AVC) technique.     

Silicon-to-steel bonding using rapid thermal annealing

This paper presents the rapid, low-temperature bonding between silicon and steel using the rapid thermal annealing process. Three different thin-film adhesion layer systems including silver, gold, and nickel were utilized as the intermediate bonding material to assist the eutectic Pb/Sn bonding between silicon and steel. The bonding temperature was set at 220/spl deg/C for 20 s, with a 20-s ramp-up time. Five experiments were conducted to determine the strength of the bond, including static tensile and compressive four-point bend tests, axial extension tests, tensile bending fatigue tests, and corrosion resistance tests. The test results have shown that the gold adhesion layer is the most robust, demonstrating minimal creep during fatigue tests, no delamination during the tensile or compressive four-point bend tests, and acceptable strength during the axial extension tests. Additionally, all adhesion layers have withstood four months of submersion in various high-temperature solutions and lubricants without failure. Simulations of the axial stresses and strains that developed during the four-point bend and axial extension tests were performed and showed that the presence of the silicon die provides a local reinforcement of the bond as observed in the experimental tests.     

Effect of radiation shield angle on temperature and stress profilesduring rapid thermal annealing

The effects of radiation shield angle and oven-temperature ramping rates on the temperature and thermal stress profiles in a gallium arsenide wafer undergoing rapid thermal annealing are studied. The numerical model of the heat transfer in a cylindrical oven considers conduction in the wafer radiative heat transfer from all oven and shield surfaces to the wafer. All simulations show that at some location in the wafer the induced thermal stress exceeds the critical stress. These results indicate that at high temperatures (T>750°C) it is very difficult to maintain a sufficiently flat temperature profile such that the induced thermal stress is maintained below the critical stress throughout the wafer. Possible ways to minimize the induced thermal stress during the annealing process using a radiation shield and specific oven-temperature ramping rates are discussed     

Phosphorus-overpressure rapid thermal annealing of indium phosphide

A rapid thermal annealing technique for InP is described in which a controllable phosphorus overpressure, generated by heating red phosphorus, suppresses the dissociation of InP at required annealing temperatures. Two annealing configurations were used to independently study the effects of phosphorus overpressures, anneal temperatures and gas flow rates on the post-anneal electrical and morphological properties of low dose Si-implanted InP:Fe. The advantage of phosphorus overpressure annealing over close-contact annealing is shown, and comparison is made with Si₃N₄ encapsulated annealing. Gas flow velocities close to the sample are found to significantly affect the surface morphology, and a static layer immediately above the sample is found to be beneficial.     

Influence of rapid thermal annealing temperature on structure and electrical properties of high permittivity HfTiO thin film used in MOSFET

HfTiO thin films were prepared by r.f. magnetron co-sputtering on Si substrate. To improve the electrical properties, HfTiO thin films were post heated by rapid thermal annealing (RTA) at 400 °C, 500 °C, 600 °C and 700 °C in nitrogen. It was found that the film is amorphous below 700 °C and at 700 °C monoclinic phase HfO₂ has occurred. With the increase of the annealing temperature, the film becomes denser and the refractive index increases. By electrical measurements, we found at 500 °C annealed condition, the film has the best electrical property with the largest dielectric constant of 44.0 and the lowest leakage current of 1.81 × 10⁻⁷ A/cm², which mainly corresponds to the improved microstructure of HfTiO thin film. Using the film annealed at 500 °C as the replacement of SiO₂ dielectric layer in MOSFET, combining with TiAlN metal electrode, a 10 μm gate-length MOSFET fabricated by three-step photolithography processes. From the transfer (I_DS–V_G) and output (I_DS–V_DS) characteristics, it shows a good transistor performance with a threshold voltage (V_th) of 1.6 V, a maximum drain current (I_ds) of 9 × 10⁻⁴ A, and a maximum transconductance (G_m) of 2.2 × 10⁻⁵ S.     

Indium out-diffusion from silicon during rapid thermal annealing

The out-diffusion of indium (In) from In-implanted silicon (Si) samples that includes bare Si, samples with an oxide-cap layer, nitride-cap layer, and nitride/oxide/Si sandwiched samples, is investigated. The dose loss of In with respect to different implant energies, doses, and soak times during rapid thermal annealing (RTA) is quantified. Experimental results of bare Si samples show that over 90% of In out-diffusion happens within 1 sec of soak time in the RTA process. In the capped samples, In rapidly diffuses through the oxide layer and stops at the nitride/oxide interface. In gets piled up at the interface of Si/oxide and oxide/nitride, and nitride very efficiently prevents In out-diffusion from the oxide layer out to the nitride layer. In addition, In gets more segregated in the Si surface in the presence of boron.     

Influence of optical properties of the SOI structure on the wafer temperature during rapid thermal annealing

Optical characteristics are compared theoretically, and temperature differences of the Si wafer with the B-doped SOI structure and substrate wafer are evaluated during rapid thermal annealing. It is shown that under identical annealing conditions and temperatures above 800 K, the difference in their temperatures can reach ∼30 K. We studied the dependence of the total emissivity and temperature of the wafer with the SOI structure on the concentration of the doping impurity in the Si layer. The method of the quantitative analysis of variations of the wafer temperature under invariable annealing conditions depending on the variations of emissivity of its surfaces is suggested.     

Effect of rapid thermal annealing on pentacene-based thin-film transistors

The bottom contact pentacene-based thin-film transistor is fabricated, and it is treated by rapid thermal annealing (RTA) with the annealed temperature up to 240 °C for 2 min in the vacuum of 1.3 × 10⁻² torr. The morphology and structure for the pentacene films of OTFTs were examined by scanning electron microscopy and X-ray diffraction technique. The thin-film phase and a very small fraction of single-crystal phase were found in the as-deposited pentacene films. While the annealing temperature increases to 60 °C, the pentacene molecular ordering was significantly improved though the grain size only slightly increased. The device annealed at temperature of 120 °C has optimal electrical properties, being consistent with the experimental results of XRD. The post-annealing treatment results in the enhancement of field-effect mobility in pentacene-based thin-film transistors. The field-effect mobility increases from 0.243 cm²/V s to 0.62 cm²/V s. Besides, the threshold voltage of device shifts from −7 V to −3.88 V and the on/off current ratio increases from 4.0 × 10³ to 8.7 × 10³.     

Study of the effects of rapid thermal annealing in generation–recombination noise in MBE grown GaN thin films

Low-frequency excess noise was measured from GaN thin films deposited by plasma assisted molecular beam epitaxy (MBE). The noise power spectra is dominated by 1/f noise at low frequency and by Lorentzians at frequencies beyond 3 kHz. The temperature dependencies of the Lorentzians were examined from room temperature to about 90 K. From the Arrhenius plot of the time constants, the thermal activation energy of the fluctuation time constant was found to be around 30 meV. From the temperature dependencies of voltage noise power spectra, we estimated the magnitudes of the capture and emission activation energies. Based on the results, we have formulated a model, which stipulates that the generation–recombination (G–R) noise arises from the capture and emission of carriers by localized states in the bulk of the film. The process leads to fluctuations in the carrier mobility due to the modulation of the Coulombic scattering rate. We next conducted a systematic investigation on the effects of rapid thermal annealing on G–R noise in GaN thin films. Experimental results showed that annealing at 900°C resulted in the minimum FWHM in the rocking curve. Furthermore, we observed a substantial reduction in the noise level, indicating that rapid thermal annealing can be used as an effective means for noise reduction in GaN based devices.     

Properties of GaN(SiC)-(Ti,Zr)B x contacts subjected to rapid thermal annealing

Semiconductors - The effect of rapid thermal annealing on the structural and physical properties of Au-(Ti, Zr)B x -GaN(SiC) contacts and diode structures on their basis is investigated. The...     

Low temperature thermal annealing of arsenic implanted silicon

The annealing of heavily arsenic implanted (100) silicon using low temperature furnace techniques to obtain metastable concentrations of the dopant is described and the activations obtained are compared with those found after laser and electron beam annealing.     

High-sensitivity porous silicon photodetectors fabricated throughrapid thermal oxidation and rapid thermal annealing

The sensitivity of a porous silicon Schottky barrier photodetector is much improved through rapid thermal oxidation and rapid thermal annealing processes. Under our optimum preparation conditions, photocurrent can reach about 21 mA (under 22.4 mW/cm² tungsten lamp illumination) and dark current is about 5.4 μA (at reverse bias of 10 V). The quantum efficiencies are about 90% at wavelengths shorter than 750 nm and 80%-70% in the wavelength range 750-1050 nm     

Direct silicidation of Co on Si by rapid thermal annealing

Rapid thermal annealing is used to form cobalt silicide directly on unimplanted as well as B-, As-, and P-implanted wafers. The films are characterized by sheet resistance, X-ray diffraction, SEM, TEM, SIMS, and contact resistance measurements. The direct silicidation of Co on Si by rapid thermal annealing yields smooth low-resistivity films with minimal dopant redistribution.     

Electrical characteristics of Be-implanted GaAs activated by rapid thermal annealing

Be-implanted GaAs are annealed by rapid thermal annealing (RTA) using halogen lamps. Electrical properties of the annealed GaAs are investigated, emphasizing those at 77K for application to the p+-layer of Be-implanted WSix-gate self-aligned two-dimensional hole gas (2- DHG) FET. An electrical activation of 90 percent (for 2.0 × 10¹³cm^-2) or 80 percent (for 2.2 × 10¹⁴cm^-2) is obtained. An annealing temperature dependence of carrier freezing at 77K is observed for higher dose samples. The phenomenon is attributed to the redistribution of impurity atoms near the high-concentration peak.     

Capless rapid thermal annealing of GaAs using a graphite susceptor

The results of experiments performed to evaluate the use of a commercially available rapid thermal annealer (RTA) with a graphite susceptor for capless rapid thermal annealing to activate implants in GaAs are reported. The interior of the susceptor was easily charged with As by annealing a sacrificial GaAs wafer. Wafers annealed face up in the charged susceptor showed no evidence of surface degradation (due to preferential loss of As) and no decrease in implant activation (peak doping) when compared to dielectric (SiO₂) capped anneals. Over 50 wafers have been annealed without recharging the susceptor. In addition, slip on 3-in wafers was almost completely eliminated due to the reduction of radial temperature gradients. It is concluded that capless RTA in a commercially available graphite susceptor appears to be a viable annealing technique for activating implants in GaAs and related III-V materials and is suitable for a production environment     

氮化镓研制中的退火技术

总结了 Ga N薄膜生长和器件制备中退火技术的应用情况 ,其中涉及退火工艺过程、作用机理以及由此产生的影响。