A 28-GHz monolithic integrated quadrature oscillator in SiGe bipolar technology

This paper presents a 28-GHz monolithic quadrature voltage-controlled oscillator (QVCO) realized in a preproduction 0.4-/spl mu/m SiGe bipolar technology with 85-GHz transit frequency. QVCOs efficiently drive quadrature modulators and demodulators in receivers or transmitters. At 28.9 GHz, the circuit provides -14.7 dBm of output power and phase noise of -84.2 dBc/Hz at a 1-MHz offset. The two output signals are in quadrature with phase error of about 5/spl deg/. Tuning of the QVCO may be done in the frequency range from 24.8 to 28.9 GHz with nearly constant output power. The circuit consumes 25.8 mA from the 5 V voltage supply.     

A Low Voltage Divide-by-4 Injection Locked Frequency Divider With Quadrature Outputs

This letter presents a low voltage quadrature divide-by-4 (divide4) injection-locked frequency divider (QILFD). The QILFD consists of a 1.8-GHz quadrature voltage controlled oscillator (QVCO) and two NMOS switches, which are inserted into the quadrature outputs of the QVCO for signal injection. The low-voltage CMOS divide4 QILFD has been implemented with the TSMC 0.18-mum 1P6 M CMOS technology and the core power consumption is 3.12mW at the supply voltage of 1.2V. The free-running frequency of the QILFD is tunable from 1.73 to 1.99GHz, the measured phase noise of QILFD is -118dBc/Hz at 1-MHz offset from the free running frequency of 1.82GHz. At the input power of 0dBm, the total locking range is from 6.86 to 8.02GHz as the tuning voltage is varied from 0 to 1.2V. The phase noise of the locked output spectrum is lower than that of free running ring oscillator by 11dBc/Hz. The phase deviation of quadrature output is about 0.8deg     

4.9-GHz low-phase-noise transformer-based superharmonic-coupled GaInP/GaAs HBT QVCO

The low-phase-noise GaInP/GaAs heterojunction bipolar transistor (HBT) quadrature voltage controlled oscillator (QVCO) using transformer-based superharmonic coupling topology is demonstrated for the first time. The fully integrated QVCO at 4.87GHz has phase noise of -131dBc/Hz at 1-MHz offset frequency, output power of -4dBm and the figure of merit (FOM) -198dBc/Hz. The state-of-the-art phase noise FOM is attributed to the superior GaInP/GaAs HBT low-frequency device noise and the high quality transformer formed on the GaAs semi-insulating substrate.     

A fully integrated 1.5-V 5.5-GHz CMOS phase-locked loop

A 1.5-V 5.5-GHz fully integrated phase-locked loop (PLL) has been implemented in a 0.25-μm foundry digital CMOS process. From a 5.5-GHz carrier, the in-band phase noise can be as low as -88 dBc/Hz at a 40-kHz offset, while the phase noise for the free-running VCO is -116 dBc/Hz at an 1-MHz offset. The VCO core current is 4.6 mA. The prescaler is implemented using a variation of the source-coupled logic (SCL) structure to reduce the switching noise, and thus to reduce the PLL side-band spurs. At -18 dBm signal power measured off chip, the switching noise coupled through substrate and metal interconnect generates spurs with power levels less than -99 dBm when the loop is open. A new charge-pump circuit is developed to reduce the current glitch at the output node. By incorporating a voltage doubler, the voltage dynamic range at the charge-pump output and thus the VCO control voltage range is increased from 1.3 to 2.6 V with immeasurable phase noise and spurious level degradation to the PLL. When the loop is closed, the power levels of side-band spurs at the offset frequency equal to the ~43-MHz reference frequency are < -69 dBc. The total power consumption of the PLL including that for the output buffers is ~23 mW     

Voltage-controlled oscillators up to 98 GHz in SiGe bipolar technology

In this paper, two fully integrated voltage-controlled oscillators (VCOs) in a 200-GHz f/sub T/ SiGe bipolar technology are presented. The oscillators use on-chip transmission lines at the output for impedance transformation. One oscillator operates up to 98 GHz and achieves a phase noise of -85dBc/Hz at an offset frequency of 1 MHz. It can be tuned from 95.2 to 98.4 GHz and it consumes 12 mA from a single -5-V supply. The second oscillator operates from 80.5 GHz up to 84.8 GHz with a phase noise of -87dBc/Hz at 1-MHz offset frequency. The output power of both circuits is about -6dBm.     

A Q-band low phase noise monolithic AlGaN/GaN HEMT VCO

A Q-band 40-GHz GaN monolithic microwave integrated circuit voltage controlled oscillator (VCO) based on AlGaN/GaN high electron mobility transistor technology has been demonstrated. The GaN VCO delivered an output power of +25dBm with phase noise of -92dBc/Hz at 100-KHz offset, and -120dBc/Hz at 1-MHz offset. To the best of our knowledge, this represents the state-of-the-art for GaN VCOs in terms of frequency, output power, and phase noise performance. This work demonstrates the potential for the use of GaN technology for high frequency, high power, and low phase noise frequency sources for military and commercial applications.     

A 21-GHz 8-Modulus Prescaler and a 20-GHz Phase-Locked Loop Fabricated in 130-nm CMOS

A 1.5-V 256-263 8-modulus prescaler and a 1.5-V integer-N phase-locked loop (PLL) with eight different output frequencies have been implemented in a 0.13-mum foundry CMOS process. The synchronous divide-by-4/5 circuit uses current mode logic (CML) D-flip-flops with resistive loads to achieve 21-GHz maximum operating frequency at input power of 0 dBm. The divider is used to implement an 8-modulus prescaler consuming 6-mA current and 9-mW power. This extremely low power consumption is achieved by radically decreasing the sizes of transistors in the divider. Utilizing the prescaler, a charge-pump integer-N PLL has been demonstrated with 20-GHz output frequency. The in-band phase noise of the PLL at 60-kHz offset and out-of-band phase noise at 10-MHz offset are ~-80 dBc/Hz and -116.1 dBc/Hz, respectively. The locking range is from 20.05 to 21 GHz. The PLL consumes 15-mA current and 22.5-mW power from a 1.5-V power supply.     

A 15/30-GHz Dual-Band Multiphase Voltage-Controlled Oscillator in 0.18- μm CMOS

A multiphase oscillator suitable for 15/30-GHz dual-band applications is presented. In the circuit implementation, the 15-GHz half-quadrature voltage-controlled oscillator (VCO) is realized by a rotary traveling-wave oscillator, while frequency doublers are adopted to generate the quadrature output signals at the 30-GHz frequency band. The proposed circuit is fabricated in a standard 0.18-mum CMOS process with a chip area of 1.1times1.0 mm². Operated at a 2-V supply voltage, the VCO core consumes a dc power of 52 mW. With a frequency tuning range of 250 MHz, the 15-GHz half-quadrature VCO exhibits an output power of -8 dBm and a phase noise of -112 dBc/Hz at 1-MHz offset frequency. The measured power level and phase noise of the 30-GHz quadrature outputs are -16 dBm and -104 dBc/Hz, respectively     

A 5-GHZ Low-Power Series-Coupled BiCMOS Quadrature VCO With Wide Tuning Range

This letter presents a novel quadrature voltage controlled oscillator (QVCO) implemented in a 47-GHz SiGe BiCMOS technology. The QVCO is a serially coupled LC VCO that utilizes SiGe heterojunction bipolar transistors for oscillation and metal oxide semiconductor field effect transistors for coupling. The SiGe BiCMOS QVCO prototype achieves about 14.6% tuning range from 4.3 to 5GHz. The phase noise of the QVCO is measured as -114.3 dBc/Hz at 2-MHz offset. The 5-GHz QVCO core consumes 6-mA current from a 3.3-V power supply and occupies 0.88mm² area     

A low-phase-noise voltage-controlled oscillator for 17-GHz applications

A silicon bipolar voltage-controlled oscillator (VCO) for 17-GHz applications is presented. The VCO is composed of a core oscillating at 9GHz followed by a frequency doubler. It adopts a transformer-based topology to obtain both wide tuning range and low noise performance. The VCO exhibits a tuning range of 4.1GHz from 16.4 to 20.5GHz and a phase noise as low as -109dBc/Hz at a 1-MHz frequency offset from a carrier of 18.5GHz.     

A 25-GHz ultra-low phase noise InGaP/GaAs HBT VCO

A 25-GHz monolithic voltage controlled oscillator (VCO) has been designed and fabricated in a commercial InGaP/GaAs heterojunction bipolar transistor (HBT) process. This balanced VCO has a novel topology using a feedback /spl pi/-network and a common-emitter transistor configuration. Ultra-low phase noise is achieved: -106 dBc/Hz and -130 dBc/Hz at 100kHz and 1-MHz offset frequency, respectively. To the authors' knowledge, this is the lowest phase noise achieved in a monolithic microwave integrated circuit (MMIC) VCO at such high frequency. The single-ended output power is -1 dBm. It can be tuned between 25.33GHz and 25.75GHz using the base-collector junction capacitor of the HBT as a varactor. The dc power consumption is 90mW for a 9-V supply. An excellent figure-of-merit of -195 dBc/Hz is obtained.     

47.8 GHz InP HBT quadrature VCO with 22% tuning range

A 38-47.8 GHz quadrature voltage controlled oscillator (QVCO) in InP HBT technology is presented. The measured output power is -15 dBm. The simulated phase noise ranges from -84 to -86 dBc/Hz at 1 MHz offset. It is believed that this is the first millimetre-wave QVCO implemented in InP HBT technology as well as the highest measured oscillation frequency for any QVCO     

A 10-GHz CMOS quadrature LC-VCO for multirate optical applications

A 10-GHz quadrature LC-VCO (QVCO) fabricated in a 0.13-/spl mu/m CMOS process for 10-Gb/s multirate optical applications is described. Bimodal oscillation behavior (or phase ambiguity) inherent to quadrature LC-VCOs is analyzed theoretically and a cascode-based coupling method is proposed which effectively eliminates bimodal oscillation. Digitally controlled capacitor arrays are used in this design to extend the tuning range of the QVCO to cover multirate operations. The QVCO achieves a jitter generation of only 32 mUI/sub pp/ at 10 GHz and a phase noise of -95 dBc/Hz at 1-MHz frequency offset with only 8 mA of current consumption in the QVCO core.     

A 1-V 3.8 - 5.7-GHz wide-band VCO with differentially tuned accumulation MOS varactors for common-mode noise rejection in CMOS SOI technology

In this paper, a 1-V 3.8 - 5.7-GHz wide-band voltage-controlled oscillator (VCO) in a 0.13-/spl mu/m silicon-on-insulator (SOI) CMOS process is presented. This VCO features differentially tuned accumulation MOS varactors that: 1) provide 40% frequency tuning when biased between 0 - 1 V and 2) diminish the adverse effect of high varactor sensitivity through rejection of common-mode noise. This paper shows that, for differential LC VCOs, all low-frequency noise such as flicker noise can be considered to be common-mode noise, and differentially tuned varactors can be used to suppress common-mode noise from being upconverted to the carrier frequency. The noise rejection mechanism is explained, and the technological advantages of SOI over bulk CMOS in this regard is discussed. At 1-MHz offset, the measured phase noise is -121.67 dBc/Hz at 3.8 GHz, and -111.67 dBc/Hz at 5.7 GHz. The power dissipation is between 2.3 - 2.7-mW, depending on the center frequency, and the buffered output power is -9 dBm. Due to the noise rejection, the VCO is able to operate at very low voltage and low power. At a supply voltage of 0.75 V, the VCO only dissipates 0.8 mW at 5.5 GHz.     

A 2.6-GHz/5.2-GHz frequency synthesizer in 0.4-μm CMOStechnology

This paper describes the design of a CMOS frequency synthesizer targeting wireless local-area network applications in the 5-GHz range. Based on an integer-N architecture, the synthesizer produces a 5.2-GHz output as well as the quadrature phases of a 2.6-GHz carrier. Fabricated in a 0.4-μm digital CMOS technology, the circuit provides a channel spacing of 23.5 MHz at 5.2 GHz while exhibiting a phase noise of -115 dBc/Hz at 2.6 GHz and -100 dBc/Hz at 5.2 GHz (both at 10-MHz offset). The reference sidebands are at -53 dBc at 2.6 GHz, and the power dissipation from a 2.6-V supply is 47 mW     

80-GHz differential VCO in InP SHBTs

A high frequency millimeter-wave voltage-controlled oscillator (VCO) has been designed, manufactured and tested in InP single heterojunction bipolar transistor technology. The fully integrated fundamental differential VCO features high operating frequency up to 80 GHz with low phase noise about -118 dBc/Hz at 1-MHz offset and 5% tuning range. The VCO consumes only 95-mW power at a power supply of -5 V, while providing -2 dBm single-ended output power and 1 dBm for differential output power. The die size is 0.28 mm/sup 2/.     

5-GHz Low-Phase Noise CMOS Quadrature VCO

A 5-GHz low-phase noise CMOS quadrature voltage controlled oscillator (QVCO) is described. Two differential pairs (one for negative gm generation and the other one for the coupling input) of each resonator have separate biasing transistors which are switched on and off by the coupling input of each resonator. The proposed QVCO implemented in a 0.13-mum CMOS technology shows 17-dB phase noise improvement from a conventional QVCO with constant tail current sources while the two QVCOs consume the same power of 5.28mW. The phase noise of the proposed QVCO is measured to be -102dBc/Hz and -117dBc/Hz at 100KHz and 1-MHz offset, respectively     

A compact 43-GHz monolithic differential VCO in 0.5-/spl mu/m InP DHBT technology

A compact monolithic integrated differential voltage controlled oscillator (VCO) using 0.5-/spl mu/m emitter width InP/InGaAs double-heterostructure bipolar transistors with a total chip size of 0.42 mm /spl times/ 0.46 mm is realized by using cross-coupled configuration for extremely high frequency satellite communications system applications. The device performance of F/sub max/ greater than 320 GHz at a current density of 5 mA//spl mu/m/sup 2/ and 5-V BVceo allows us to achieve a low phase noise 42.5-GHz fundamental VCO with -0.67-dBm output power. The VCO exhibits the phase noise of -106.8 dBc/Hz at 1-MHz offset and -122.3 dBc/Hz at 10-MHz offset from the carrier frequency.     

A low-voltage 40-GHz complementary VCO with 15% frequency tuning range in SOI CMOS technology

The design of a low-voltage 40-GHz complementary voltage-controlled oscillator (VCO) with 15% frequency tuning range fabricated in 0.13-/spl mu/m partially depleted silicon-on-insulator (SOI) CMOS technology is reported. Technological advantages of SOI over bulk CMOS are demonstrated, and the accumulation MOS (AMOS) varactor limitations on frequency tuning range are addressed. At 1.5-V supply, the VCO core and each output buffer consumes 11.25 mW and 3 mW of power, respectively. The measured phase noise at 40-GHz is -109.73 dBc/Hz at 4-MHz offset from the carrier, and the output power is -8 dBm. VCO performance using high resistivity substrate (/spl sim/300-/spl Omega//spl middot/cm) has the same frequency tuning range but 2 dB better phase noise compared with using low resistivity substrate (10 /spl Omega//spl middot/cm). The VCO occupies a chip area of only 100 /spl mu/m by 100 /spl mu/m (excluding pads).     

A Low-Voltage Quadrature CMOS VCO Based on Voltage-Voltage Feedback Topology

A novel low-voltage quadrature voltage-controlled oscillator (QVCO) with voltage feedback to the input gate of a switching amplifier is proposed and implemented using the standard TSMC 0.18-mum CMOS 1P6M process. The proposed circuit topology is made up of two low-voltage LC-tank VCOs, where the coupled QVCO is obtained using the transformer coupling technique. At the 0.7-V supply voltage, the output phase noise of the VCO is -124.9 dBc/Hz at 1-MHz offset frequency from the carrier frequency of 2.4GHz, and the figure of merit is -185.35dBc/Hz. Total power consumption is 5.18 mW. Tuning range is about 135 MHz while the control voltage was tuned from 0 to 0.7V