一种新颖双馈电型PIN开关

微波光电二极管（PIN）开关速度和功率容量是相互矛盾的2个指标,为同时兼顾改善2个指标,结合半导体器件特性,采取PIN管芯两极同时馈电的设计形式（即双馈电型开关）,经过优化设计,研制出2 GHz～6 GHz单刀双掷PIN开关。与传统型开关电路相比,开关速度和功率容量都得到较好提升,为后续的工程应用奠定了基础。     

Microstrip PIN diode microwave switch

A possibility of creating narrow-band electrically controlled microwave breakers and switches with enhanced attenuation level in the blocking mode has been considered. The specified devices are based on the structure containing a short-circuited microstrip link with connected capacitor and the loop coupler, in the center of which is located a PIN diode.     

基于PIN管的多路大功率宽带高线性射频开关的研制

设计制作了一款工作于100~400MHz的大功率宽带高线性单刀多掷PIN管收发开关。该开关采用1分6再分6的串联型结构,通过对PIN管的选取和微带线布局来实现对开关插损、隔离度和驻波比的要求。由于采用串联结构而非串并结构,该开关驱动部分大为简化。测试结果表明,该开关插损小于0.3 dB,隔离度大于50 dB,驻波比小于1.2,功率容量为100 W,二次谐波抑制大于70 dBc。     

用来驱动PIN开关二极管的高压混合集成电路的设计及应用

该文介绍了用于驱动PIN开关二极管的一种高压(+100V)驱动器的设计,论述了其设计原理,并结合工程实际,对其主要应用给予举例。     

Wide-band PIN diode SPST switch in unilateral asymmetric finline

This paper reports the design and modelling of a wide-band, low insertion loss finline SPST switch using beam lead PIN diodes at the Ka-band. A unilateral asymmetric finline with an offset slot has been used to realize a transmission line with lower impedance to best match the impedance of the diode. Finline tapered transitions have been designed with exponential profiles for minimum reflection coefficient over the band. Wide-band operation, covering the full Ka-band, has been achieved with reactive tuning by varying the diode spacing. Four PIN diodes have been shunt mounted across the unilateral asymmetric finline slot. An insertion loss of 0.9 dB minimum and 1.65 dB maximum over the entire Ka-band and isolation of >25 dB from 26.5 to 35GHz and >20 dB over the complete Kaband has been achieved.     

一种紧凑型结构的PIN二极管单刀九掷开关

提出了一种紧凑型的PIN二极管微波开关电路设计。在并联型PIN二极管单刀双掷开关电路设计的基础上,提出了单刀九掷开关电路结构。工作频带宽度为800 MHz。该开关电路可承受连续功率为45 d Bm,电路实测结果为所有通路的插入损耗绝对值不大于1.6 d B,关断时的隔离度绝对值不小于53 d B,通路输入输出驻波比小于1.55,开关时间为450 ns。     

基于Q-MMIC技术的W波段低成本PIN管开关

采用低成本方法设计了一款W波段单刀单掷开关。通过在单独加工的石英基片无源电路上安装倒装PIN管,获得了一款W波段准毫米波单片（Q-MMIC）开关。为了获得低损耗、高隔离度性能,开关设计中采用了3-D PIN管模型和电路补偿结构。测试结果表明开关在88GHz时插入损耗最小,最小值为0.5dB;在80-101 GHz频率范围内,开关导通时的插入损耗小于2 dB;在84-104 GHz频率范围内,开关隔离度大于30 dB。整个开关电路尺寸为1.5 mm× 3.0 mm。     

L-band high power silicon p-i-n diode switch

An extremely high power silicon p-i-n diode switch was developed for operation over the 1255- to 1385-MHz frequency range. It was successfully tested at 4-MW peak power with 100-µs pulsewidth. and 2.5-MW peak and 100-kW average power with 200-µs pulsewidth in a balanced duplexer configuration.     

A high performance switch for OC-12 SONET self-healing ringnetworks

The progress of ITU-T and ANSI standards on SDH/SONET is accelerating the evolution of transmission systems all over the world. The advanced operation administration and maintenance (OAM) functions it provides makes it possible to create a self healing ring network which protects against failure. This self-healing ring consists of add/drop multiplexers (ADM's). The switch in the ADM plays an important role in achieving self-healing operation. In this paper, self-healing ring architecture and operations are analyzed in order to determine the requirements for the ADM switch. On the basis of this result, new space division switching methods, which significantly reduce the amount of hardware needed, are proposed. A parallel processing architecture which makes it possible to develop a low-cost large-scale switch is also devised. Finally, a developed switch LSI chip is presented. Combining two identical chips with the proposed parallel processing architecture, a 32×32 STS-3 switch (5 Gb/s throughput) with an STS-1 time slot interchange (TSI) function is realized     

A high performance RDS-detector for low voltage applications

The design and realisation of the analog part for an RDS-receiver, the RDS-detector, is discussed in this paper. The RDS-receiver is developed towards low voltage applications (1.8 V) with low power consumption requirements. A new topology for RDS-receivers is introduced resulting in an important quality improvement, mainly being a higher phase-linearity and a lower power consumption. The performance of the chip is compared to existing RDS-receivers. These receivers use an analog integrated bandpass filter. In the presented topology direct conversion followed by lowpass filtering is used. The chip is realised in a fully differential switched-capacitor technique with correlated double sampling. The latter is used to obtain a very low equivalent input DC-offset. The chip is implemented in a 2µm BiCMOS technology.     

A high breakdown-voltage SiCN/Si heterojunction diode forhigh-temperature applications

Cubic crystalline p-SiCN films are deposited on n-Si(100) substrates to form SiCN/Si heterojunction diodes (HJDs) with a rapid thermal chemical vapor deposition (RTCVD) technique. The developed SiCN/Si HJDs exhibit good rectifying properties up to 200°C. At room temperature, the reverse breakdown voltage is more than 29 V at the leakage current density of 1.2×10^-4 A/cm². Even at 200°C, the typical breakdown voltage of SiCN/Si HJDs is still preserved about 5 V at the leakage current density of 1.47×10^-4 A/cm². These properties are better than the β-SiC on Si HJDs for high temperature applications     

A SiGe MMIC 6-bit PIN diode phase shifter

A 6-bit PIN diode phase shifter has been successfully demonstrated at microwave frequencies in a SiGe bipolar technology. A post-silicon polymer dielectric interconnect technology is implemented to achieve low loss microstrip structures on the silicon substrate. The monolithic microwave integrated circuit exhibits flat phase shift, low VSWR, and low insertion loss variation, over the 7- to 11-GHz band. This phase shifter demonstrates the feasibility of integrating SiGe technology into microwave systems.     

一种端口速率可变的共享存储器交换

针对局域网和城域网中的多种数据传输速率结构,该文提出了一种共享存储器交换结构,在普通共享存储器交换结构的基础上,对支持可变的端口速率,以及支持变长数据包交换进行了改进,所提出的交换结构还具有自同步特点,即各输入输出端口之间不需要全局同步;同时还考虑了对变长数据包的队列管理。     

A novel LDMOS structure using P-trench for high performance applications

In this paper, we propose a new structure of silicon on insulator (SOI) lateral diffused metal oxide semiconductor (LDMOS) field effect transistors to improve the device performance. In the proposed structure, a trench is created in the buried oxide under the drift and drain regions and filled with p-type Si. We called the proposed structure as P-trench SOI-LDMOS (PT-LDMOS). Our simulations with two dimensional ATLAS simulator shows the unique features exhibited by the proposed structure in comparison with a conventional SOI-LDMOS (C-LDMOS). In the PT-LDMOS, the electric field is modified by producing a new additional peak at the electric field distribution, reducing the magnitude of electric field peak near the gate edge, removing of electric field crowding near the drift and drain junction at the bottom surface of the silicon layer, and making the surface electric field distribution more smooth. We optimize the doping concentration and the dimensions of the P-trench in the PT-LDMOS structure. Hence, the results illustrate the benefits of high performance PT-LDMOS over conventional one and expand the application of SOI-LDMOSs to high voltage.     

A code-division switch architecture for satellite applications

This paper introduces a code-division methodology into switching applications. The proposed method is applied in satellite-switched code-division multiple-access (SS/CDMA) systems for routing CDMA traffic channels on board the multibeam satellites. We present code-division switch (CDS) architectures, analyze the CDS performance, and assess its complexity. The CDS has been shown to route CDMA user channels without introducing interference. The proposed CDS architecture is nonblocking, and its hardware complexity and speed are proportional to the size of the switch. We also examine the amplitude distribution of the combined signal in the CDS bus and the interference evaluation of the end-to-end link in the proposed applications. Then we consider the problem of switch control under an optimum or a random algorithm and compare its complexity with the equivalent problem in time-multiplexed switching methods     

A brain-controlled switch for asynchronous control applications

Asynchronous control applications are an important class of application that has not received much attention from the brain-computer interface (BCI) community. This work provides a design for an asynchronous BCI switch and performs the first extensive evaluation of an asynchronous device in attentive, spontaneous electroencephalographic (EEG). The switch design [named the low-frequency asynchronous switch design (LF-ASD)] is based on a new feature set related to imaginary movements in the 1-4 Hz frequency range. This new feature set was identified from a unique analysis of EEG using a bi-scale wavelet. Offline evaluations of a prototype switch demonstrated hit (true positive) rates in the range of 38%-81% with corresponding false positive rates in the range of 0.3%-11.6%. The performance of the LF-ASD was contrasted with two other ASDs: one based on mu-power features and another based on the outlier processing method (OPM) algorithm. The minimum mean error rates for the LF-ASD were shown to be significantly lower than either of these other two switch designs.     

Compact body-worn MIMO antenna with high port isolation for UWB applications

This article investigates the mutual coupling reduction of a compact two elements wearable ultra-wideband (UWB) multiple-input multiple-output (MIMO) antenna. The ground plane of the proposed wearable MIMO antenna structure consists of three connected square ring-shaped stubs and two rectangular slots of narrow height. These ground stubs and slots minimize the mutual coupling effect between antennas and provide high isolation. The suggested MIMO antenna functions from the 1.87 to 13.82 GHz frequency spectrum covering WLAN (2.4–2.484 GHz), UWB (3.1–10.6 GHz), and X band (8–12 GHz) with 152.32% fractional bandwidth. It sustains port isolation above 27 dB throughout the 2 to 13.82 GHz frequency band. Inside the whole working frequency band, the suggested antenna offers a tiny envelope correlation coefficient (ECC < 0.098), greater diversity gain (DG > 9.93 dB), minimum channel capacity loss (CCL < 0.32 bits/s/Hz), and slight magnitude variation in mean effective gain of antenna ports (< 0.1 dB). The recommended antenna yields a SAR level below the designated threshold (<1.6 W/kg), affirming its suitability for body-worn applications. The designed MIMO antenna structure has an overall volume of 32 × 48 × 1.5 mm³.     

A novel silicon Schottky diode for NLTL applications

The design and simulation of a novel silicon Schottky diode for nonlinear transmission line (NLTL) applications is discussed in this paper. The Schottky diode was fabricated on a novel silicon-on-silicide-on-insulator (SSOI) substrate for minimized series resistance. Ion implantation technology was used as a low-cost alternative to molecular beam epitaxy to approximate the delta (/spl delta/) doping profile, which results in strong nonlinear CV characteristics. The equivalent circuit model of the Schottky diode under reverse bias conditions was extracted from the S-parameter measurement performed on the diode. The measured CV characteristics show strong nonlinearity, the junction capacitance varies from 182 to 47.5 fF as the reverse bias voltage is varied from 0 to -5 V. A parasitic inductance of 40 pH was measured for the silicon Schottky diode, which is much smaller than a comparable sized GaAs Schottky diode. This small inductance is an advantage for the silicon Schottky diode offering improvement in the silicon NLTL performance.     

A novel planar diode mixer for submillimeter-wave applications

A mixer employing a planar GaAs Schottky diode has been designed and tested over a 300-365 GHz bandwidth. Using a planar diode eliminates the disadvantages of mechanical instability and labor-intensive assembly associated with conventional whisker-contacted diodes. The mixer design process uses scale model impedance measurements for both the design of individual components and the measurement of impedances presented to the diode terminals by the mixer mount at fundamental and harmonic frequencies. Results from these impedance measurements are used in linear and nonlinear numerical mixer analyses to predict the mixer performance