Description and evaluation of the FAST-Net smart pixel-basedoptical interconnection prototype

The design, packaging approach, and experimental evaluation of the free-space accelerator for switching terabit networks (FAST-Net) smart-pixel-based optical interconnection prototype are described. FAST-Net is a high-throughput data-switching concept that uses a reflective optical system to globally interconnect a multichip array of smart pixel devices. The three-dimensional optical system links each chip directly to every other with a dedicated bidirectional parallel data path. in the experiments, several prototype smart-pixel devices were packaged on a common multichip module (MCM) with interchip registration accuracies of 5-10 μm. The smart-pixel arrays (SPAs) consist of clusters of oxide-confined vertical-cavity surface-emitting lasers and photodetectors that are solder bump-bonded to Si integrated circuits. The optoelectronic elements are arranged within each cluster on a checkerboard pattern with 125-μm pitch. The experimental global optical interconnection module consists of a mirror and lens array that are precisely aligned to achieve the required interchip parallel connections between up to 16 SPAs. Five prototype SPAs were placed on the MCM to allow the evaluation of a variety of interchip links. Measurements verified the global link pattern across several devices on the MCM with high optical resolution and registration. No crosstalk between adjacent channels was observed after alignment. The I/O density and efficiency results suggest that a multi-terabit switch module that incorporates global optical interconnection to overcome conventional interconnection bottlenecks is feasible     

Sliding Banyan network

The sliding Banyan network is described and evaluated. The novel three-dimensional (3-D) multistage network topology employs a macro-lenslet array in a retroreflective configuration to effect the required shuffle link patterns across a single two-dimensional (2-D) multichip array of “smart pixels”. An electronic deflection routing scheme, based on simple destination tag self-routing, is employed within the smart pixels, Internal packet blocking is efficiently avoided because deflected packets are routed through individualized banyan networks that have “slid” in the time dimension to accommodate each packet's routing needs. Simulations show that this self-routing approach reduces the number of stages, and hence the number of switching and interconnection resources necessary to achieve a specified blocking probability. Experimental focusing and registration results, using arrays of vertical cavity surface emitting lasers, show that conventional optical imaging technology is suitable for this architecture. The results indicate that the sliding banyan approach will overcome the current performance constraints of conventional metallic interconnections and be scalable to ATM switching applications with aggregate throughputs in the Tb/s regime     

Parallel optical interconnection for uncoded data transmission with1 Gb/s-per-channel capacity, high dynamic range, and low powerconsumption

The design, realization, and characterization of a multichannel dc-coupled ECL-voltage compatible parallel optical interconnection with a bit rate of up to 1 Gb/s-per-channel is reported. The transmitter module consists of an array of laser diodes with low threshold currents and the 50 Ω matching network, the receiver module of a photo diode array and an amplifier array. All the opto-electronic and electronic components are fabricated as arrays with a pitch of 250 μm. The total power consumption is 110 mW per channel, For a BER <10¹⁴ the dynamic range is 15 dB for a bit rate per channel of 200 Mb/s, 13 dB for 630 Mb/s, and 8 dB for 1 Gb/s. The channel crosstalk is below -48 dB (electrical). The size of the opto-electronic parts (12 channels, without electrical connectors) is only 10 mm (length)×5 mm (width)×4 mm (height)     

自由空间光互连洗牌型神经网络模型

首先介绍一种洗牌型自由空间光互连多层全互连神经网络模型。该模型的高神经元／权重比可以极大地压缩神经网络的互连权矩阵IWM（interconnectweightmatrix）。对于具有N2个神经元的单层二维全互连神经网络的IWM为N2×N2,而洗牌型全互连神经网络的IWM仅为4N2log2N。另外,洗牌型全互连神经网络整齐、简单的结构方便了网络的综合,特别是网络隐单元的综合,并且十分适合于神经网络的光学实现。然后描述了采用数字光技术实现光互连的洗牌型神经网络的系统模型、关键芯片结构以及关键技术。本文提出的模型和方法使实现与人脑神经网络规模（104量级）相当的实用化自适应光电子全互连神经网络成为可能。     

Optical phased array technology

Optical phased arrays represent an enabling new technology that makes possible simple affordable, lightweight, optical sensors offering very precise stabilization, random-access pointing programmable multiple simultaneous beams, a dynamic focus/defocus capability, and moderate to excellent optical power handling capability. These new arrays steer or otherwise operate on an already formed beam. A phase profile is imposed on an optical beam as it is either transmitted through or reflected from the phase shifter array. The imposed phase profile steers, focuses, fans out, or corrects phase aberrations on the beam. The array of optical phase shifters is realized through lithographic patterning of an electrical addressing network on the superstrate of a liquid crystal waveplate. Refractive index changes sufficiently large to realize full-wave differential phase shifts can be effected using low (<10 V) voltages applied to the liquid crystal phase plate electrodes. High efficiency large-angle steering with phased arrays requires phase shifter spacing on the order of a wavelength or less; consequently addressing issues make 1-D optical arrays much more practical than 2-D arrays. Orthogonal oriented 1-D phased arrays are used to deflect a beam in both dimensions. Optical phased arrays with apertures on the order of 4 cm by 4 cm have been fabricated for steering green, red, 1.06 μm, and 10.6 μm radiation. System concepts that include a passive acquisition sensor as well as a laser radar are presented     

Design of a free-space 3-D crossover optical network

A new method is proposed to map an 2-D crossover network into an 3-D spatial structure. It makes use of an 2 × 4 micro-blazed grating array to realize vertical connections and horizontal connections, and provides straight connections using a mirror. A module of the 3-D crossover network integrating a polarizing beam-splitter, half-wave plate, micro-blazed grating array, half silvered mirror, spatial light modulator and mirror, will accomplish the functions of optical signal switching, multicast, and broadcast. The characteristics of this module are switching-transparency, high-speed performance, and easy-integration. It has been proved that this module can be implemented in free spatial optical interconnections and parallel computing systems.     

Fully embedded board-level guided-wave optoelectronic interconnects

A fully embedded board-level guided-wave optical interconnection is presented to solve the packaging compatibility problem. All elements involved in providing high-speed optical communications within one board are demonstrated. Experimental results on a 12-channel linear array of thin-film polyimide waveguides, vertical-cavity surface-emitting lasers (VCSELs) (42 μm), and silicon MSM photodetectors (10 μm) suitable for a fully embedded implementation are provided. Two types of waveguide couplers, titled gratings and 45° total internal reflection mirrors, are fabricated within the polyimide waveguides. Thirty-five to near 100% coupling efficiencies are experimentally confirmed. By doing so, all the real estate of the PC board surface are occupied by electronics, and therefore one only observes the performance enhancement due to the employment of optical interconnection but does not worry about the interface problem between electronic and optoelectronic components unlike conventional approaches. A high speed 1-48 optical clock signal distribution network for Cray T-90 super computer is demonstrated. A waveguide propagation loss of 0.21 dB/cm at 850 nm was experimentally confirmed for the 1-48 clock signal distribution and for point-to-point interconnects. The feasibility of using polyimide as the interlayer dielectric material to form hybrid three-dimensional interconnects is also demonstrated. Finally, a waveguide bus architecture is presented, which provides a realistic bidirectional broadcasting transmission of optical signals. Such a structure is equivalent to such IEEE standard bus protocols as VME bus and FutureBus     

Optically interconnected switching networks

Work on hybrid multistage switching networks is presented. A simple mapping rule is used to form a network using two-dimensional perfect shuffle interconnections, and other 2-D patterns are developed from other mappings. The general conditions for a 1-D net to be mappable into two dimensions are established, and it is pointed out that in practice all multistage interconnection networks (MINs) are mappable-a suitable mapping transformation is what is required. It is shown how to use the mapping process to produce hybrid MINs with a variable electronic island size. It is concluded that the design flexibility exists to take multistage processors and transform them into formats which are highly suitable for the employment of optical interconnects     

Hybrid integration of surface-emitting microlaser chip and planaroptics substrate for interconnection applications

The bonding of a monolithic array of surface-emitting microlasers onto a glass substrate that contains a matching array of microlenses and mirrors is reported. The bonding was achieved by flip-chip solder bump bonding using indium as the solder material. The alignment precision is within ±2 μm. The optical substrate provides a simple interconnection scheme that routes the light from each laser to well defined output positions     

Packaging for a 40-channel parallel optical interconnection modulewith an over-25-Gbit/s throughput

NTT is currently working on developing a high-throughput interconnection module that is both compact and cost effective. The technology being developed is called “parallel inter-board optical interconnection technology”, or “ParaBIT”. The ParaBIT module that has been developed is the first step; it is a front-end module with 40 channels, a throughput of over 25 Gbit/s, and a transmission distance of over 100 m along multimode fibers. One major feature of this module is the use of vertical-cavity surface-emitting laser (VCSEL) arrays as very cost-effective light sources. These arrays enable the same packaging structure to be used for both the transmitter and receiver. To achieve super-multichannel performance, high-density multiport bare-fiber (BF) connectors were developed for the module's optical interface. Unlike conventional optical connectors, these BF connectors do not need a ferrule or spring. This ensures physical contact with an excellent insertion loss (less than 0.1 dB per channel). A polymeric optical waveguide film with a 45° mirror for coupling to the VCSEL and photo-diode (PD) arrays by passive optical alignment was also developed. To facilitate coupling between the VCSEL/PD array chips and the waveguide, a packaging technique was developed to align and die bond the optical array chips on a substrate. This technique is called transferred multichip bonding (TMB); it can be used to mount optical array chips on a substrate with a positioning error of only several micrometers. These packaging techniques enabled ultra-parallel interconnections to be achieved in prototype ParaBIT modules     

OE MCM的自由空间光互连结构及其设计

现代集成电路系统采用的互连技术中,电互连和光互连各有优缺点,ＯＥＭＣＭ可以根据实际情况将二者的特点结合起来。目前国际上流行的自由空间光互连技术已经应用于异步传输模式和并行处理计算机结构中。着重介绍采用自由空间光互连ＯＥ ＭＣＭ的结构和设计考虑。     

An 8-Gb/s optical backplane bus based on microchannelinterconnects: design, fabrication, and performance measurements

We describe the characteristics of a microchannel-based optical backplane including signal-to-noise ratio (SNR), interconnect distances, and data transfer rates. The backplane employs 250 μm-spacing two-dimensional (2-D) vertical cavity surface emitting lasers (VCSELs) and a microlens array to implement 500 μm-, 750 μm-, and 1-mm optical beam arrays. By integrating the transmitter and a multiplexed polymeric hologram as a deflector/beam-splitter for the guided-wave optical backplane, the result demonstrates a multibus line architecture and its high-speed characteristics. Maximum interconnect distances of 6 cm and 14 cm can be achieved to satisfy 10^-12 bit error rate (BER) using 2×2 beams of 500 μm- and 1 mm-spacing array devices. The total data transfer rate of the developed backplane has shown 8 Gb/s from eye diagram measurements     

Optoelectronic multichip module integration for chip level opticalinterconnects

We have integrated an 850-nm vertical-cavity surface-emitting laser (VCSEL), its driver, and a diffractive lenslet array onto a single substrate to produce an integrated optoelectronic multichip module for signal fan-out and distribution. The diffractive element performs optical fan-out of the output beam from the VCSEL into an array of focused spots at a plane 1, 416 μm from the surface of the VCSEL. This corresponds to 160 μm from the surface of the diffractive lens. System design, fabrication, integration, and experimental characterization is presented     

Two-module stage optical switch network

A large-scale optical switch array based on guided-wave technology using two-module-stage network architecture is proposed. Networks are derived from a generalized three-stage switch network. Two types of architecture are demonstrated. In the first, building blocks in each module are 1×n, n×m nonblocking switches or n×r switch that can route limited numbers of input signal. In the second, crossbar, Banyan, or four-stage wide-sense nonblocking network is used as building blocks. The interconnection is simpler than for the first type. Network architectures that use Banyan or wide-sense nonblocking network building blocks are classed as thinned-out Banyan networks     

Breakthrough technologies for the high-performance electrical ATMswitching system

A high-performance electrical asynchronous transfer mode (ATM) switching system is described with the goal of Tb/s ATM switching. The first step system was to use advanced Si-bipolar very large scale integrated (VLSI) technologies and the multichip technique. 1.0 μm bipolar SST technologies and Cu-polyimide multilayer MCM realized a 160 Gb/s throughput ATM system. The performance limitations of the 160 Gb/s system were power supply/cooling and module interconnection. The new ATM switching system, named OPTIMA-1, adopted optical interconnection/distribution to overcome the limitations and achieve 640 Gb/s. The system uses high-performance complementary metal-oxide-semiconductor (CMOS) devices and optical wavelength division multiplexing (WDM) interconnection. Combining OPTIMA-1 with optical cell-by-cell routing functions, i.e., photonic packet routing, can realize variable bandwidth links for 5 Tb/s ATM systems. This paper first reviews high-performance electrical ATM (packet) switching system architecture and hardware technologies. In addition, system limitations are described. Next, the important breakthrough technology of optical WDM interconnection is highlighted. These technologies are adopted to form OPTIMA-1, a prototype of which is demonstrated. The key technologies of the system are advanced 80 Gb/s CMOS/MCM, electrical technologies, and 10 Gb/s, 8 WDM, 8×8 optical interconnection. Details of implementation technologies are also described. Optical cell-by-cell (packet-by-packet) routing is now being studied. From the architectural viewpoint, dynamic link bandwidth sharing will be adopted. In addition, an AWG that performs cell-by-cell routing and a distributed large scale ATM system are realized. Optical routing achieves the 5 Tb/s needed in future B-ISDN ATM backbone systems     

Architectural design for multistage 2-D MEMS optical switches

Next-generation wavelength routing optical networks requiring optical cross connects (OXC) in the network have the ability to direct optical signals from any input interface to suitable output interfaces by configuring their internal embedded optical switch matrices. Microelectromechanical systems (MEMS) switches are regarded as the most promising technology to achieve such functionality. We consider the construction of a multistage MEMS switch network with single two-dimensional (2-D) MEMS switch blocks. A power loss model is developed that calls on a single MEMS block that is then used to develop the model for a three-stage Clos network. An effective model for maximum loss difference between calls is also developed. Based on these, the paper also proposes three connection patterns [Max + Min greedy (MMG), compressed extended generalized shuffle 1 (C-EGS-1), and compressed extended generalized shuffle 2 (C-EGS-2)] to connect outlet ports and inlet ports between two neighboring stages in a three-stage Clos network. These connection patterns are proved to be optimal and efficient enough to reach the minimums of both the maximum power loss of calls and the maximum loss difference between calls     

A pixellated grating array using photoelectrochemical etching on aGaAs waveguide

We have demonstrated and evaluated a grating array outcoupler fabricated by photoelectrochemical (PEC) etching, a manufacturable and practical approach for fabrication of grating-based III-V semiconductor waveguide devices. An array of submicron period gratings was etched into photolithographically delineated areas in a single PEC step. The fabricated devices are: 10-μm wide rib waveguides with 0.35-μm first-order outcoupling gratings; and 10-μm wide rib waveguides with 10 μm×10 μm pixellated areas of gratings. Device characterization demonstrates the effectiveness of outcoupling grating fabrication using PEC and that the pixellated grating outcoupler is an effective and simple means of generating an optical beam array     

Holographic optical switching: the “ROSES” demonstrator

The design, assembly, and performance of a prototype 1×8 free-space switch demonstrator using reconfigurable holograms are reported. Central to the switch fabric is a ferroelectric liquid crystal (FLC) on silicon spatial light modulator (SLM) deposited with a 540×1 array of highly reflective and planar mirror strips. The input and output ports of the switch are fabricated as a linear array of silica planar waveguides connected to single-mode fibers, and the holographic beam-steerer operates without the need for adjustment or dynamic alignment. The waveguide array and the single Fourier transform lens for the 2f holographic replay system are housed in an opto-mechanical mount to provide stability. The switch operates at 1.55 μm wavelength and has a designed optical bandwidth of >60 nm. The first measured insertion loss and crosstalk figures are 16.9 dB and -19.1 dB, respectively. Improvements in SLM performance, the use of new addressing schemes and the introduction of better alignment techniques are expected to improve these figures considerably. The preliminary performance of a 3×3 optical crossconnect is also presented to show that this technology is scalable to N×N switching fabrics     

A novel flip-chip interconnection technique using solder bumps forhigh-speed photoreceivers

A flip-chip interconnection technique using small solder bumps instead of conventional wire bonding for high-speed broadband photoreceivers is described. The technique achieves interconnection with low parasitic elements, no damage to devices, and easy assembly. A photoreceiver composed of a broadband p-i-n photodiode and a laser-speed GaAS metal-semiconductor field-effect transistor (MESFET) preamplifier connected using solder bumps that are about 26 μm in diameter, with a frequency response of over 22 GHz at 1.55 μm, is demonstrated. This confirms the effectiveness of the solder bump interconnection technique for future high-speed broadband optical modules     

Technology development of a high-density 32-channel 16-Gb/s opticaldata link for optical interconnection applications for theoptoelectronic technology consortium (OETC)

A parallel, 32-channel, high density (140 μm pitch), 500 Mb/s NRZ, point-to-point, optical data link has been fabricated using existing GaAs IC, silicon optical bench (SiOB), and multichip module (MCM-D) technologies. The main components of the transmitter and the receiver modules are a GaAs-based vertical cavity surface emitting laser (VCSEL) array at 850 mn with its IC driver array chip and an integrated metal-semiconductor-metal (MSM) receiver (photodetector and signal processing circuits) array at 850 nm. The package module uses a modified 164 I/O JEDEC premolded plastic quad flat pack (PQFP) in combination with a polymer film integrated circuit (POLYFIC) chip carrier. The electrical input and output are 500 Mb/s NRZ binary signals. The optical I/O in both modules consists of a directly-connectorized (nonpigtail) fiber array block that plugs into the 32×1 optical fiber ribbon directly on one side and accepts 32 optical signals from the SEL array or delivers them to the MSM receiver array via a gold-coated 45° polished fiber array mirror. The MACII-32 ribbon cable is an enhanced version of the standard MACII connector ribbon cable. This paper characterizes key components of the optical data link, describes its package design, and discusses preliminary component and optical data link test results